[intel] Add more cliprect modes to cover other meanings for batch emits.

The previous change gave us only two modes, one which looped over the batch
per cliprect (3d drawing) and one that didn't (state updeast).
However, we really want 4:

- Batch doesn't care about cliprects (state updates)
- Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing)
- Batch needs to be executed just once (region fills, copies, etc.)
- Batch already includes cliprect handling, and must be flushed by unlock time
  (copybuffers, clears).

All callers should now be fixed to use one of these states for any batchbuffer
emits.  Thanks to Keith Whitwell for pointing out the failure.

5 files changed, 58 insertions, 41 deletions

diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index a6f19916d8..ff2045dabe 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -87,7 +87,7 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)
    batch->ptr = batch->map;
    batch->dirty_state = ~0;
    batch->id = batch->intel->batch_id++;
-   batch->cliprects_enable = INTEL_BATCH_NO_CLIPRECTS;
+   batch->cliprect_mode = IGNORE_CLIPRECTS;
 }
 
 struct intel_batchbuffer *
@@ -143,18 +143,18 @@ do_flush_locked(struct intel_batchbuffer *batch,
     */
 
    if (!(intel->numClipRects == 0 &&
-	 batch->cliprects_enable == INTEL_BATCH_CLIPRECTS)) {
+	 batch->cliprect_mode == LOOP_CLIPRECTS)) {
       if (intel->ttm == GL_TRUE) {
 	 intel_exec_ioctl(batch->intel,
 			  used,
-			  batch->cliprects_enable == INTEL_BATCH_NO_CLIPRECTS,
+			  batch->cliprect_mode != LOOP_CLIPRECTS,
 			  allow_unlock,
 			  start, count, &batch->last_fence);
       } else {
 	 intel_batch_ioctl(batch->intel,
 			   batch->buf->offset,
 			   used,
-			   batch->cliprects_enable == INTEL_BATCH_NO_CLIPRECTS,
+			   batch->cliprect_mode != LOOP_CLIPRECTS,
 			   allow_unlock);
       }
    }
@@ -162,7 +162,7 @@ do_flush_locked(struct intel_batchbuffer *batch,
    dri_post_submit(batch->buf, &batch->last_fence);
 
    if (intel->numClipRects == 0 &&
-       batch->cliprects_enable == INTEL_BATCH_CLIPRECTS) {
+       batch->cliprect_mode == LOOP_CLIPRECTS) {
       if (allow_unlock) {
 	 /* If we are not doing any actual user-visible rendering,
 	  * do a sched_yield to keep the app from pegging the cpu while
@@ -264,10 +264,10 @@ intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
 void
 intel_batchbuffer_data(struct intel_batchbuffer *batch,
                        const void *data, GLuint bytes,
-		       enum cliprects_enable cliprects_enable)
+		       enum cliprect_mode cliprect_mode)
 {
    assert((bytes & 3) == 0);
-   intel_batchbuffer_require_space(batch, bytes, cliprects_enable);
+   intel_batchbuffer_require_space(batch, bytes, cliprect_mode);
    __memcpy(batch->ptr, data, bytes);
    batch->ptr += bytes;
 }
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.h b/src/mesa/drivers/dri/intel/intel_batchbuffer.h
index 5b6e0a19a5..a3058bc6e6 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.h
@@ -10,9 +10,29 @@ struct intel_context;
 #define BATCH_SZ 16384
 #define BATCH_RESERVED 16
 
-enum cliprects_enable {
-   INTEL_BATCH_CLIPRECTS = 0,
-   INTEL_BATCH_NO_CLIPRECTS = 1
+enum cliprect_mode {
+   /**
+    * Batchbuffer contents may be looped over per cliprect, but do not
+    * require it.
+    */
+   IGNORE_CLIPRECTS,
+   /**
+    * Batchbuffer contents require looping over per cliprect at batch submit
+    * time.
+    */
+   LOOP_CLIPRECTS,
+   /**
+    * Batchbuffer contents contain drawing that should not be executed multiple
+    * times.
+    */
+   NO_LOOP_CLIPRECTS,
+   /**
+    * Batchbuffer contents contain drawing that already handles cliprects, such
+    * as 2D drawing to front/back/depth that doesn't respect DRAWING_RECTANGLE.
+    * Equivalent behavior to NO_LOOP_CLIPRECTS, but may not persist in batch
+    * outside of LOCK/UNLOCK.
+    */
+   REFERENCES_CLIPRECTS
 };
 
 struct intel_batchbuffer
@@ -25,7 +45,7 @@ struct intel_batchbuffer
    GLubyte *map;
    GLubyte *ptr;
 
-   enum cliprects_enable cliprects_enable;
+   enum cliprect_mode cliprect_mode;
 
    GLuint size;
 
@@ -52,7 +72,7 @@ void intel_batchbuffer_reset(struct intel_batchbuffer *batch);
  */
 void intel_batchbuffer_data(struct intel_batchbuffer *batch,
                             const void *data, GLuint bytes,
-			    enum cliprects_enable cliprects_enable);
+			    enum cliprect_mode cliprect_mode);
 
 void intel_batchbuffer_release_space(struct intel_batchbuffer *batch,
                                      GLuint bytes);
@@ -85,36 +105,35 @@ intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, GLuint dword)
 static INLINE void
 intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
                                 GLuint sz,
-				enum cliprects_enable cliprects_enable)
+				enum cliprect_mode cliprect_mode)
 {
    assert(sz < batch->size - 8);
    if (intel_batchbuffer_space(batch) < sz)
       intel_batchbuffer_flush(batch);
 
-   /* Upgrade the buffer to being looped over per cliprect if this batch
-    * emit needs it.  The code used to emit a batch whenever the
-    * cliprects_enable was changed, but reducing the overhead of frequent
-    * batch flushing is more important than reducing state parsing,
-    * particularly as we move towards private backbuffers and number
-    * cliprects always being 1 except at swap.
-    */
-   if (cliprects_enable == INTEL_BATCH_CLIPRECTS)
-      batch->cliprects_enable = INTEL_BATCH_CLIPRECTS;
+   if (cliprect_mode != IGNORE_CLIPRECTS) {
+      if (batch->cliprect_mode == IGNORE_CLIPRECTS) {
+	 batch->cliprect_mode = cliprect_mode;
+      } else {
+	 if (batch->cliprect_mode != cliprect_mode)
+	    intel_batchbuffer_flush(batch);
+      }
+   }
 }
 
 /* Here are the crusty old macros, to be removed:
  */
 #define BATCH_LOCALS
 
-#define BEGIN_BATCH(n, cliprects_enable) do {				\
-   intel_batchbuffer_require_space(intel->batch, (n)*4, cliprects_enable); \
+#define BEGIN_BATCH(n, cliprect_mode) do {				\
+   intel_batchbuffer_require_space(intel->batch, (n)*4, cliprect_mode); \
 } while (0)
 
 #define OUT_BATCH(d)  intel_batchbuffer_emit_dword(intel->batch, d)
 
-#define OUT_RELOC(buf, cliprects_enable, delta) do { 			\
+#define OUT_RELOC(buf, cliprect_mode, delta) do { 			\
    assert((delta) >= 0);						\
-   intel_batchbuffer_emit_reloc(intel->batch, buf, cliprects_enable, delta); \
+   intel_batchbuffer_emit_reloc(intel->batch, buf, cliprect_mode, delta); \
 } while (0)
 
 #define ADVANCE_BATCH() do { } while(0)
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 430327d7f4..f7968db92f 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -142,7 +142,7 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
 	 src_x = box.x1 - dPriv->x + dPriv->backX;
 	 src_y = box.y1 - dPriv->y + dPriv->backY;
 
-	 BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
+	 BEGIN_BATCH(8, REFERENCES_CLIPRECTS);
 	 OUT_BATCH(CMD);
 	 OUT_BATCH(BR13 | dst_pitch);
 	 OUT_BATCH((box.y1 << 16) | box.x1);
@@ -212,7 +212,7 @@ intelEmitFillBlit(struct intel_context *intel,
    assert(w > 0);
    assert(h > 0);
 
-   BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
+   BEGIN_BATCH(6, NO_LOOP_CLIPRECTS);
    OUT_BATCH(CMD);
    OUT_BATCH(BR13 | dst_pitch);
    OUT_BATCH((y << 16) | x);
@@ -324,7 +324,7 @@ intelEmitCopyBlit(struct intel_context *intel,
       assert(dst_x < dst_x2);
       assert(dst_y < dst_y2);
 
-      BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
+      BEGIN_BATCH(8, NO_LOOP_CLIPRECTS);
       OUT_BATCH(CMD);
       OUT_BATCH(BR13 | dst_pitch);
       OUT_BATCH((dst_y << 16) | dst_x);
@@ -341,7 +341,7 @@ intelEmitCopyBlit(struct intel_context *intel,
       assert(dst_x < dst_x2);
       assert(h > 0);
 
-      BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
+      BEGIN_BATCH(8, NO_LOOP_CLIPRECTS);
       OUT_BATCH(CMD);
       OUT_BATCH(BR13 | dst_pitch);
       OUT_BATCH((0 << 16) | dst_x);
@@ -515,12 +515,12 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
                   _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n",
                   buf, irb->Base.Name);
                 */
-	       intel_wait_flips(intel, INTEL_BATCH_NO_CLIPRECTS);
+	       intel_wait_flips(intel);
 
                assert(b.x1 < b.x2);
                assert(b.y1 < b.y2);
 
-               BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
+               BEGIN_BATCH(6, REFERENCES_CLIPRECTS);
                OUT_BATCH(CMD);
                OUT_BATCH(BR13);
                OUT_BATCH((b.y1 << 16) | b.x1);
@@ -574,7 +574,7 @@ intelEmitImmediateColorExpandBlit(struct intel_context *intel,
 				    (8 * 4) +
 				    (3 * 4) +
 				    dwords,
-				    INTEL_BATCH_NO_CLIPRECTS );
+				    NO_LOOP_CLIPRECTS );
 
    opcode = XY_SETUP_BLT_CMD;
    if (cpp == 4)
@@ -592,7 +592,7 @@ intelEmitImmediateColorExpandBlit(struct intel_context *intel,
    if (dst_tiled)
       blit_cmd |= XY_DST_TILED;
 
-   BEGIN_BATCH(8 + 3, INTEL_BATCH_NO_CLIPRECTS);
+   BEGIN_BATCH(8 + 3, NO_LOOP_CLIPRECTS);
    OUT_BATCH(opcode);
    OUT_BATCH(br13);
    OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
@@ -610,5 +610,5 @@ intelEmitImmediateColorExpandBlit(struct intel_context *intel,
    intel_batchbuffer_data( intel->batch,
 			   src_bits,
 			   dwords * 4,
-			   INTEL_BATCH_NO_CLIPRECTS );
+			   NO_LOOP_CLIPRECTS );
 }
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index 73872a97a0..ceb3058351 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -469,9 +469,6 @@ intelClearWithTris(struct intel_context *intel, GLbitfield mask)
 	 intel->vtbl.meta_color_mask(intel, GL_TRUE);
 	 intel->vtbl.meta_draw_region(intel, irbColor->region, NULL);
 
-	 /* XXX: Using INTEL_BATCH_NO_CLIPRECTS here is dangerous as the
-	  * drawing origin may not be correctly emitted.
-	  */
 	 intel->vtbl.meta_draw_quad(intel,
 				    fb->_Xmin,
 				    fb->_Xmax,
@@ -625,7 +622,7 @@ intelClear(GLcontext *ctx, GLbitfield mask)
 
 /* Emit wait for pending flips */
 void
-intel_wait_flips(struct intel_context *intel, GLuint batch_flags)
+intel_wait_flips(struct intel_context *intel)
 {
    struct intel_framebuffer *intel_fb =
       (struct intel_framebuffer *) intel->ctx.DrawBuffer;
@@ -641,7 +638,7 @@ intel_wait_flips(struct intel_context *intel, GLuint batch_flags)
       BATCH_LOCALS;
 
       /* Wait for pending flips to take effect */
-      BEGIN_BATCH(2, batch_flags);
+      BEGIN_BATCH(2, NO_LOOP_CLIPRECTS);
       OUT_BATCH(pf_planes & 0x1 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP)
 		: 0);
       OUT_BATCH(pf_planes & 0x2 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_B_FLIP)
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.h b/src/mesa/drivers/dri/intel/intel_buffers.h
index 13d1a15ffb..a669a85431 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.h
+++ b/src/mesa/drivers/dri/intel/intel_buffers.h
@@ -1,3 +1,4 @@
+
 /**************************************************************************
  * 
  * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
@@ -42,7 +43,7 @@ extern struct intel_region *intel_readbuf_region(struct intel_context *intel);
 
 extern struct intel_region *intel_drawbuf_region(struct intel_context *intel);
 
-extern void intel_wait_flips(struct intel_context *intel, GLuint batch_flags);
+extern void intel_wait_flips(struct intel_context *intel);
 
 extern void intelSwapBuffers(__DRIdrawablePrivate * dPriv);