summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/r200
diff options
context:
space:
mode:
authorPauli Nieminen <suokkos@gmail.com>2010-03-21 20:16:17 +0200
committerPauli Nieminen <suokkos@gmail.com>2010-03-21 20:27:49 +0200
commit1968d8f31d0ac83557c9366dea39b15e92bb1516 (patch)
tree1e943de05e67e0f9569eeed1fb7e6a71e44d9c81 /src/mesa/drivers/dri/r200
parent44e3ec3c05f0806f0940887ed9e30d94bf0748e0 (diff)
r200: Fix swtnl fallback to flush pending rendering before transition.
Flush after transition would emit wrong state that could cause wrong state emited for pending rendering operation. Fixes wan once from extrement tuxracer that is using per vertex materials.
Diffstat (limited to 'src/mesa/drivers/dri/r200')
-rw-r--r--src/mesa/drivers/dri/r200/r200_tcl.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c
index 41b68cc0ca..f52e4fe917 100644
--- a/src/mesa/drivers/dri/r200/r200_tcl.c
+++ b/src/mesa/drivers/dri/r200/r200_tcl.c
@@ -691,20 +691,30 @@ void r200TclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
GLuint oldfallback = rmesa->radeon.TclFallback;
if (mode) {
- rmesa->radeon.TclFallback |= bit;
if (oldfallback == 0) {
+ /* We have to flush before transition */
+ if ( rmesa->radeon.dma.flush )
+ rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+
if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "R200 begin tcl fallback %s\n",
getFallbackString( bit ));
+ rmesa->radeon.TclFallback |= bit;
transition_to_swtnl( ctx );
- }
+ } else
+ rmesa->radeon.TclFallback |= bit;
} else {
- rmesa->radeon.TclFallback &= ~bit;
if (oldfallback == bit) {
+ /* We have to flush before transition */
+ if ( rmesa->radeon.dma.flush )
+ rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+
if (R200_DEBUG & RADEON_FALLBACKS)
fprintf(stderr, "R200 end tcl fallback %s\n",
getFallbackString( bit ));
+ rmesa->radeon.TclFallback &= ~bit;
transition_to_hwtnl( ctx );
- }
+ } else
+ rmesa->radeon.TclFallback &= ~bit;
}
}