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| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2007-03-24 16:42:08 +0100 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2007-03-24 18:11:37 +0100 |
| commit | 0c3ae2ea7fbb9c1087bdbc1048c380ca760b80d2 (patch) | |
| tree | 2e0d1916c4562f688438d0e0f4aa244b81607c47 /src/mesa/drivers/dri/r300/r300_reg.h | |
| parent | d4dd5a95a8a467a696e5160f3c9c72711829d95e (diff) | |
r300: No assertion when accessing incomplete texture images.
There used to be an assertion when a fragment program accesses an incomplete
texture image. Work around this assertion.
Note: I am unsure whether this workaround produces the desired result
(0,0,0,1) on all hardware.
Diffstat (limited to 'src/mesa/drivers/dri/r300/r300_reg.h')
| -rw-r--r-- | src/mesa/drivers/dri/r300/r300_reg.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index 1f4a2d2e64..1f65f9a7e7 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -325,7 +325,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * Most likely this is used to ignore rest of the program in cases * where group of verts arent visible. For some reason this "section" * is sometimes accepted other instruction that have no relationship with - *position calculations. + *position calculations. */ #define R300_VAP_PVS_CNTL_1 0x22D0 # define R300_PVS_CNTL_1_PROGRAM_START_SHIFT 0 @@ -566,8 +566,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R300_RE_FOG_SCALE 0x4294 #define R300_RE_FOG_START 0x4298 -/* Not sure why there are duplicate of factor and constant values. - * My best guess so far is that there are seperate zbiases for test and write. +/* Not sure why there are duplicate of factor and constant values. + * My best guess so far is that there are seperate zbiases for test and write. * Ordering might be wrong. * Some of the tests indicate that fgl has a fallback implementation of zbias * via pixel shaders. @@ -909,7 +909,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* 32 bit chroma key */ #define R300_TX_CHROMA_KEY_0 0x4580 /* ff00ff00 == { 0, 1.0, 0, 1.0 } */ -#define R300_TX_BORDER_COLOR_0 0x45C0 +#define R300_TX_BORDER_COLOR_0 0x45C0 /* END: Texture specification */ @@ -999,6 +999,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_FPITX_OP_KIL 2 # define R300_FPITX_OP_TXP 3 # define R300_FPITX_OP_TXB 4 +# define R300_FPITX_OPCODE_MASK (7 << 15) /* ALU * The ALU instructions register blocks are enumerated according to the order |