diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2009-04-09 10:55:41 -0400 |
---|---|---|
committer | Alex Deucher <alexdeucher@gmail.com> | 2009-04-09 10:55:41 -0400 |
commit | e24e4ae2e8f69447c0917655d25fa96b62b94298 (patch) | |
tree | e5ae60aa2b6ae7dbc89b1046e9557a5609ce8bd0 /src/mesa/drivers/dri/r600/r600_cmdbuf.c | |
parent | 4138bdb3b1e845d8a6172015025e1231fda7dcd1 (diff) |
R6xx/R7xx: r300 -> r600 symbols
Diffstat (limited to 'src/mesa/drivers/dri/r600/r600_cmdbuf.c')
-rw-r--r-- | src/mesa/drivers/dri/r600/r600_cmdbuf.c | 498 |
1 files changed, 249 insertions, 249 deletions
diff --git a/src/mesa/drivers/dri/r600/r600_cmdbuf.c b/src/mesa/drivers/dri/r600/r600_cmdbuf.c index 1ae6dc82bd..73de822397 100644 --- a/src/mesa/drivers/dri/r600/r600_cmdbuf.c +++ b/src/mesa/drivers/dri/r600/r600_cmdbuf.c @@ -55,7 +55,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r600_state.h" #include "radeon_reg.h" -#define R300_VAP_PVS_UPLOAD_ADDRESS 0x2200 +#define R600_VAP_PVS_UPLOAD_ADDRESS 0x2200 # define RADEON_ONE_REG_WR (1 << 15) /** # of dwords reserved for additional instructions that may need to be written @@ -63,9 +63,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #define SPACE_FOR_FLUSHING 4 -static unsigned packet0_count(r300ContextPtr r300, uint32_t *pkt) +static unsigned packet0_count(r600ContextPtr r600, uint32_t *pkt) { - if (r300->radeon.radeonScreen->kernel_mm) { + if (r600->radeon.radeonScreen->kernel_mm) { return ((((*pkt) >> 16) & 0x3FFF) + 1); } else { drm_r300_cmd_header_t *t = (drm_r300_cmd_header_t*)pkt; @@ -79,12 +79,12 @@ static unsigned packet0_count(r300ContextPtr r300, uint32_t *pkt) void emit_vpu(GLcontext *ctx, struct radeon_state_atom * atom) { - r300ContextPtr r300 = R300_CONTEXT(ctx); - BATCH_LOCALS(&r300->radeon); + r600ContextPtr r600 = R600_CONTEXT(ctx); + BATCH_LOCALS(&r600->radeon); drm_r300_cmd_header_t cmd; uint32_t addr, ndw, i; - if (!r300->radeon.radeonScreen->kernel_mm) { + if (!r600->radeon.radeonScreen->kernel_mm) { uint32_t dwords; dwords = (*atom->check) (ctx, atom); BEGIN_BATCH_NO_AUTOSTATE(dwords); @@ -98,38 +98,38 @@ void emit_vpu(GLcontext *ctx, struct radeon_state_atom * atom) ndw = cmd.vpu.count * 4; if (ndw) { - if (r300->vap_flush_needed) { + if (r600->vap_flush_needed) { BEGIN_BATCH_NO_AUTOSTATE(15 + ndw); /* flush processing vertices */ - OUT_BATCH_REGVAL(R300_SC_SCREENDOOR, 0); - OUT_BATCH_REGVAL(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D); + OUT_BATCH_REGVAL(R600_SC_SCREENDOOR, 0); + OUT_BATCH_REGVAL(R600_RB3D_DSTCACHE_CTLSTAT, R600_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D); OUT_BATCH_REGVAL(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN); - OUT_BATCH_REGVAL(R300_SC_SCREENDOOR, 0xffffff); - OUT_BATCH_REGVAL(R300_VAP_PVS_STATE_FLUSH_REG, 0); - r300->vap_flush_needed = GL_FALSE; + OUT_BATCH_REGVAL(R600_SC_SCREENDOOR, 0xffffff); + OUT_BATCH_REGVAL(R600_VAP_PVS_STATE_FLUSH_REG, 0); + r600->vap_flush_needed = GL_FALSE; } else { BEGIN_BATCH_NO_AUTOSTATE(5 + ndw); } - OUT_BATCH_REGVAL(R300_VAP_PVS_UPLOAD_ADDRESS, addr); - OUT_BATCH(CP_PACKET0(R300_VAP_PVS_UPLOAD_DATA, ndw-1) | RADEON_ONE_REG_WR); + OUT_BATCH_REGVAL(R600_VAP_PVS_UPLOAD_ADDRESS, addr); + OUT_BATCH(CP_PACKET0(R600_VAP_PVS_UPLOAD_DATA, ndw-1) | RADEON_ONE_REG_WR); for (i = 0; i < ndw; i++) { OUT_BATCH(atom->cmd[i+1]); } - OUT_BATCH_REGVAL(R300_VAP_PVS_STATE_FLUSH_REG, 0); + OUT_BATCH_REGVAL(R600_VAP_PVS_STATE_FLUSH_REG, 0); END_BATCH(); } } void emit_r500fp(GLcontext *ctx, struct radeon_state_atom * atom) { - r300ContextPtr r300 = R300_CONTEXT(ctx); - BATCH_LOCALS(&r300->radeon); + r600ContextPtr r600 = R600_CONTEXT(ctx); + BATCH_LOCALS(&r600->radeon); drm_r300_cmd_header_t cmd; uint32_t addr, ndw, i, sz; int type, clamp, stride; - if (!r300->radeon.radeonScreen->kernel_mm) { + if (!r600->radeon.radeonScreen->kernel_mm) { uint32_t dwords; dwords = (*atom->check) (ctx, atom); BEGIN_BATCH_NO_AUTOSTATE(dwords); @@ -165,42 +165,42 @@ void emit_r500fp(GLcontext *ctx, struct radeon_state_atom * atom) static void emit_tex_offsets(GLcontext *ctx, struct radeon_state_atom * atom) { - r300ContextPtr r300 = R300_CONTEXT(ctx); - BATCH_LOCALS(&r300->radeon); - int numtmus = packet0_count(r300, r300->hw.tex.offset.cmd); + r600ContextPtr r600 = R600_CONTEXT(ctx); + BATCH_LOCALS(&r600->radeon); + int numtmus = packet0_count(r600, r600->hw.tex.offset.cmd); int notexture = 0; if (numtmus) { int i; for(i = 0; i < numtmus; ++i) { - radeonTexObj *t = r300->hw.textures[i]; + radeonTexObj *t = r600->hw.textures[i]; if (!t) notexture = 1; } - if (r300->radeon.radeonScreen->kernel_mm && notexture) { + if (r600->radeon.radeonScreen->kernel_mm && notexture) { return; } BEGIN_BATCH_NO_AUTOSTATE(4 * numtmus); for(i = 0; i < numtmus; ++i) { - radeonTexObj *t = r300->hw.textures[i]; - OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1); + radeonTexObj *t = r600->hw.textures[i]; + OUT_BATCH_REGSEQ(R600_TX_OFFSET_0 + (i * 4), 1); if (t && !t->image_override) { OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); } else if (!t) { - OUT_BATCH(r300->radeon.radeonScreen->texOffset[0]); + OUT_BATCH(r600->radeon.radeonScreen->texOffset[0]); } else { /* override cases */ if (t->bo) { OUT_BATCH_RELOC(t->tile_bits, t->bo, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); - } else if (!r300->radeon.radeonScreen->kernel_mm) { + } else if (!r600->radeon.radeonScreen->kernel_mm) { OUT_BATCH(t->override_offset); } else - OUT_BATCH(r300->radeon.radeonScreen->texOffset[0]); + OUT_BATCH(r600->radeon.radeonScreen->texOffset[0]); } } END_BATCH(); @@ -209,13 +209,13 @@ static void emit_tex_offsets(GLcontext *ctx, struct radeon_state_atom * atom) static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom) { - r300ContextPtr r300 = R300_CONTEXT(ctx); - BATCH_LOCALS(&r300->radeon); + r600ContextPtr r600 = R600_CONTEXT(ctx); + BATCH_LOCALS(&r600->radeon); struct radeon_renderbuffer *rrb; uint32_t cbpitch; - uint32_t offset = r300->radeon.state.color.draw_offset; + uint32_t offset = r600->radeon.state.color.draw_offset; - rrb = radeon_get_colorbuffer(&r300->radeon); + rrb = radeon_get_colorbuffer(&r600->radeon); if (!rrb || !rrb->bo) { fprintf(stderr, "no rrb\n"); return; @@ -223,34 +223,34 @@ static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom) cbpitch = (rrb->pitch / rrb->cpp); if (rrb->cpp == 4) - cbpitch |= R300_COLOR_FORMAT_ARGB8888; + cbpitch |= R600_COLOR_FORMAT_ARGB8888; else - cbpitch |= R300_COLOR_FORMAT_RGB565; + cbpitch |= R600_COLOR_FORMAT_RGB565; if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) - cbpitch |= R300_COLOR_TILE_ENABLE; + cbpitch |= R600_COLOR_TILE_ENABLE; BEGIN_BATCH_NO_AUTOSTATE(8); - OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1); + OUT_BATCH_REGSEQ(R600_RB3D_COLOROFFSET0, 1); OUT_BATCH_RELOC(offset, rrb->bo, offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_BATCH_REGSEQ(R300_RB3D_COLORPITCH0, 1); + OUT_BATCH_REGSEQ(R600_RB3D_COLORPITCH0, 1); OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0); END_BATCH(); - if (r300->radeon.radeonScreen->driScreen->dri2.enabled) { - if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) { + if (r600->radeon.radeonScreen->driScreen->dri2.enabled) { + if (r600->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) { BEGIN_BATCH_NO_AUTOSTATE(3); - OUT_BATCH_REGSEQ(R300_SC_SCISSORS_TL, 2); + OUT_BATCH_REGSEQ(R600_SC_SCISSORS_TL, 2); OUT_BATCH(0); - OUT_BATCH((rrb->width << R300_SCISSORS_X_SHIFT) | - (rrb->height << R300_SCISSORS_Y_SHIFT)); + OUT_BATCH((rrb->width << R600_SCISSORS_X_SHIFT) | + (rrb->height << R600_SCISSORS_Y_SHIFT)); END_BATCH(); } else { BEGIN_BATCH_NO_AUTOSTATE(3); - OUT_BATCH_REGSEQ(R300_SC_SCISSORS_TL, 2); - OUT_BATCH((R300_SCISSORS_OFFSET << R300_SCISSORS_X_SHIFT) | - (R300_SCISSORS_OFFSET << R300_SCISSORS_Y_SHIFT)); - OUT_BATCH(((rrb->width + R300_SCISSORS_OFFSET) << R300_SCISSORS_X_SHIFT) | - ((rrb->height + R300_SCISSORS_OFFSET) << R300_SCISSORS_Y_SHIFT)); + OUT_BATCH_REGSEQ(R600_SC_SCISSORS_TL, 2); + OUT_BATCH((R600_SCISSORS_OFFSET << R600_SCISSORS_X_SHIFT) | + (R600_SCISSORS_OFFSET << R600_SCISSORS_Y_SHIFT)); + OUT_BATCH(((rrb->width + R600_SCISSORS_OFFSET) << R600_SCISSORS_X_SHIFT) | + ((rrb->height + R600_SCISSORS_OFFSET) << R600_SCISSORS_Y_SHIFT)); END_BATCH(); } } @@ -258,45 +258,45 @@ static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom) static void emit_zb_offset(GLcontext *ctx, struct radeon_state_atom * atom) { - r300ContextPtr r300 = R300_CONTEXT(ctx); - BATCH_LOCALS(&r300->radeon); + r600ContextPtr r600 = R600_CONTEXT(ctx); + BATCH_LOCALS(&r600->radeon); struct radeon_renderbuffer *rrb; uint32_t zbpitch; - rrb = radeon_get_depthbuffer(&r300->radeon); + rrb = radeon_get_depthbuffer(&r600->radeon); if (!rrb) return; zbpitch = (rrb->pitch / rrb->cpp); if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) { - zbpitch |= R300_DEPTHMACROTILE_ENABLE; + zbpitch |= R600_DEPTHMACROTILE_ENABLE; } if (rrb->bo->flags & RADEON_BO_FLAGS_MICRO_TILE){ - zbpitch |= R300_DEPTHMICROTILE_TILED; + zbpitch |= R600_DEPTHMICROTILE_TILED; } BEGIN_BATCH_NO_AUTOSTATE(6); - OUT_BATCH_REGSEQ(R300_ZB_DEPTHOFFSET, 1); + OUT_BATCH_REGSEQ(R600_ZB_DEPTHOFFSET, 1); OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); - OUT_BATCH_REGVAL(R300_ZB_DEPTHPITCH, zbpitch); + OUT_BATCH_REGVAL(R600_ZB_DEPTHPITCH, zbpitch); END_BATCH(); } static void emit_zstencil_format(GLcontext *ctx, struct radeon_state_atom * atom) { - r300ContextPtr r300 = R300_CONTEXT(ctx); - BATCH_LOCALS(&r300->radeon); + r600ContextPtr r600 = R600_CONTEXT(ctx); + BATCH_LOCALS(&r600->radeon); struct radeon_renderbuffer *rrb; uint32_t format = 0; - rrb = radeon_get_depthbuffer(&r300->radeon); + rrb = radeon_get_depthbuffer(&r600->radeon); if (!rrb) format = 0; else { if (rrb->cpp == 2) - format = R300_DEPTHFORMAT_16BIT_INT_Z; + format = R600_DEPTHFORMAT_16BIT_INT_Z; else if (rrb->cpp == 4) - format = R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL; + format = R600_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL; } OUT_BATCH(atom->cmd[0]); @@ -315,12 +315,12 @@ static int check_always(GLcontext *ctx, struct radeon_state_atom *atom) static int check_variable(GLcontext *ctx, struct radeon_state_atom *atom) { - r300ContextPtr r300 = R300_CONTEXT(ctx); + r600ContextPtr r600 = R600_CONTEXT(ctx); int cnt; if (atom->cmd[0] == CP_PACKET2) { return 0; } - cnt = packet0_count(r300, atom->cmd); + cnt = packet0_count(r600, atom->cmd); return cnt ? cnt + 1 : 0; } @@ -350,320 +350,320 @@ int check_r500fp_const(GLcontext *ctx, struct radeon_state_atom *atom) #define ALLOC_STATE( ATOM, CHK, SZ, IDX ) \ do { \ - r300->hw.ATOM.cmd_size = (SZ); \ - r300->hw.ATOM.cmd = (uint32_t*)CALLOC((SZ) * sizeof(uint32_t)); \ - r300->hw.ATOM.name = #ATOM; \ - r300->hw.ATOM.idx = (IDX); \ - r300->hw.ATOM.check = check_##CHK; \ - r300->hw.ATOM.dirty = GL_FALSE; \ - r300->radeon.hw.max_state_size += (SZ); \ - insert_at_tail(&r300->radeon.hw.atomlist, &r300->hw.ATOM); \ + r600->hw.ATOM.cmd_size = (SZ); \ + r600->hw.ATOM.cmd = (uint32_t*)CALLOC((SZ) * sizeof(uint32_t)); \ + r600->hw.ATOM.name = #ATOM; \ + r600->hw.ATOM.idx = (IDX); \ + r600->hw.ATOM.check = check_##CHK; \ + r600->hw.ATOM.dirty = GL_FALSE; \ + r600->radeon.hw.max_state_size += (SZ); \ + insert_at_tail(&r600->radeon.hw.atomlist, &r600->hw.ATOM); \ } while (0) /** * Allocate memory for the command buffer and initialize the state atom - * list. Note that the initial hardware state is set by r300InitState(). + * list. Note that the initial hardware state is set by r600InitState(). */ -void r300InitCmdBuf(r300ContextPtr r300) +void r600InitCmdBuf(r600ContextPtr r600) { int mtu; int has_tcl = 1; int is_r500 = 0; int i; - if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) + if (!(r600->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) has_tcl = 0; - if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) + if (r600->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) is_r500 = 1; - r300->radeon.hw.max_state_size = 2 + 2; /* reserve extra space for WAIT_IDLE and tex cache flush */ + r600->radeon.hw.max_state_size = 2 + 2; /* reserve extra space for WAIT_IDLE and tex cache flush */ - mtu = r300->radeon.glCtx->Const.MaxTextureUnits; + mtu = r600->radeon.glCtx->Const.MaxTextureUnits; if (RADEON_DEBUG & DEBUG_TEXTURE) { fprintf(stderr, "Using %d maximum texture units..\n", mtu); } /* Setup the atom linked list */ - make_empty_list(&r300->radeon.hw.atomlist); - r300->radeon.hw.atomlist.name = "atom-list"; + make_empty_list(&r600->radeon.hw.atomlist); + r600->radeon.hw.atomlist.name = "atom-list"; /* Initialize state atoms */ - ALLOC_STATE(vpt, always, R300_VPT_CMDSIZE, 0); - r300->hw.vpt.cmd[R300_VPT_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_SE_VPORT_XSCALE, 6); - ALLOC_STATE(vap_cntl, always, R300_VAP_CNTL_SIZE, 0); - r300->hw.vap_cntl.cmd[R300_VAP_CNTL_FLUSH] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_PVS_STATE_FLUSH_REG, 1); - r300->hw.vap_cntl.cmd[R300_VAP_CNTL_FLUSH_1] = 0; - r300->hw.vap_cntl.cmd[R300_VAP_CNTL_CMD] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_CNTL, 1); + ALLOC_STATE(vpt, always, R600_VPT_CMDSIZE, 0); + r600->hw.vpt.cmd[R600_VPT_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_SE_VPORT_XSCALE, 6); + ALLOC_STATE(vap_cntl, always, R600_VAP_CNTL_SIZE, 0); + r600->hw.vap_cntl.cmd[R600_VAP_CNTL_FLUSH] = cmdpacket0(r600->radeon.radeonScreen, R600_VAP_PVS_STATE_FLUSH_REG, 1); + r600->hw.vap_cntl.cmd[R600_VAP_CNTL_FLUSH_1] = 0; + r600->hw.vap_cntl.cmd[R600_VAP_CNTL_CMD] = cmdpacket0(r600->radeon.radeonScreen, R600_VAP_CNTL, 1); if (is_r500) { ALLOC_STATE(vap_index_offset, always, 2, 0); - r300->hw.vap_index_offset.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R500_VAP_INDEX_OFFSET, 1); - r300->hw.vap_index_offset.cmd[1] = 0; + r600->hw.vap_index_offset.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R500_VAP_INDEX_OFFSET, 1); + r600->hw.vap_index_offset.cmd[1] = 0; } ALLOC_STATE(vte, always, 3, 0); - r300->hw.vte.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SE_VTE_CNTL, 2); + r600->hw.vte.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_SE_VTE_CNTL, 2); ALLOC_STATE(vap_vf_max_vtx_indx, always, 3, 0); - r300->hw.vap_vf_max_vtx_indx.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_VF_MAX_VTX_INDX, 2); + r600->hw.vap_vf_max_vtx_indx.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_VAP_VF_MAX_VTX_INDX, 2); ALLOC_STATE(vap_cntl_status, always, 2, 0); - r300->hw.vap_cntl_status.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_CNTL_STATUS, 1); - ALLOC_STATE(vir[0], variable, R300_VIR_CMDSIZE, 0); - r300->hw.vir[0].cmd[R300_VIR_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_VAP_PROG_STREAM_CNTL_0, 1); - ALLOC_STATE(vir[1], variable, R300_VIR_CMDSIZE, 1); - r300->hw.vir[1].cmd[R300_VIR_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_VAP_PROG_STREAM_CNTL_EXT_0, 1); - ALLOC_STATE(vic, always, R300_VIC_CMDSIZE, 0); - r300->hw.vic.cmd[R300_VIC_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_VTX_STATE_CNTL, 2); + r600->hw.vap_cntl_status.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_VAP_CNTL_STATUS, 1); + ALLOC_STATE(vir[0], variable, R600_VIR_CMDSIZE, 0); + r600->hw.vir[0].cmd[R600_VIR_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_VAP_PROG_STREAM_CNTL_0, 1); + ALLOC_STATE(vir[1], variable, R600_VIR_CMDSIZE, 1); + r600->hw.vir[1].cmd[R600_VIR_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_VAP_PROG_STREAM_CNTL_EXT_0, 1); + ALLOC_STATE(vic, always, R600_VIC_CMDSIZE, 0); + r600->hw.vic.cmd[R600_VIC_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_VAP_VTX_STATE_CNTL, 2); ALLOC_STATE(vap_psc_sgn_norm_cntl, always, 2, 0); - r300->hw.vap_psc_sgn_norm_cntl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_PSC_SGN_NORM_CNTL, SGN_NORM_ZERO_CLAMP_MINUS_ONE); + r600->hw.vap_psc_sgn_norm_cntl.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_VAP_PSC_SGN_NORM_CNTL, SGN_NORM_ZERO_CLAMP_MINUS_ONE); if (has_tcl) { ALLOC_STATE(vap_clip_cntl, always, 2, 0); - r300->hw.vap_clip_cntl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_CLIP_CNTL, 1); + r600->hw.vap_clip_cntl.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_VAP_CLIP_CNTL, 1); ALLOC_STATE(vap_clip, always, 5, 0); - r300->hw.vap_clip.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_GB_VERT_CLIP_ADJ, 4); + r600->hw.vap_clip.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_VAP_GB_VERT_CLIP_ADJ, 4); ALLOC_STATE(vap_pvs_vtx_timeout_reg, always, 2, 0); - r300->hw.vap_pvs_vtx_timeout_reg.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, VAP_PVS_VTX_TIMEOUT_REG, 1); + r600->hw.vap_pvs_vtx_timeout_reg.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, VAP_PVS_VTX_TIMEOUT_REG, 1); } - ALLOC_STATE(vof, always, R300_VOF_CMDSIZE, 0); - r300->hw.vof.cmd[R300_VOF_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_VAP_OUTPUT_VTX_FMT_0, 2); + ALLOC_STATE(vof, always, R600_VOF_CMDSIZE, 0); + r600->hw.vof.cmd[R600_VOF_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_VAP_OUTPUT_VTX_FMT_0, 2); if (has_tcl) { - ALLOC_STATE(pvs, always, R300_PVS_CMDSIZE, 0); - r300->hw.pvs.cmd[R300_PVS_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_VAP_PVS_CODE_CNTL_0, 3); + ALLOC_STATE(pvs, always, R600_PVS_CMDSIZE, 0); + r600->hw.pvs.cmd[R600_PVS_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_VAP_PVS_CODE_CNTL_0, 3); } ALLOC_STATE(gb_enable, always, 2, 0); - r300->hw.gb_enable.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GB_ENABLE, 1); - ALLOC_STATE(gb_misc, always, R300_GB_MISC_CMDSIZE, 0); - r300->hw.gb_misc.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GB_MSPOS0, 5); - ALLOC_STATE(txe, always, R300_TXE_CMDSIZE, 0); - r300->hw.txe.cmd[R300_TXE_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_TX_ENABLE, 1); + r600->hw.gb_enable.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GB_ENABLE, 1); + ALLOC_STATE(gb_misc, always, R600_GB_MISC_CMDSIZE, 0); + r600->hw.gb_misc.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GB_MSPOS0, 5); + ALLOC_STATE(txe, always, R600_TXE_CMDSIZE, 0); + r600->hw.txe.cmd[R600_TXE_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_TX_ENABLE, 1); ALLOC_STATE(ga_point_s0, always, 5, 0); - r300->hw.ga_point_s0.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_POINT_S0, 4); + r600->hw.ga_point_s0.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GA_POINT_S0, 4); ALLOC_STATE(ga_triangle_stipple, always, 2, 0); - r300->hw.ga_triangle_stipple.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_TRIANGLE_STIPPLE, 1); - ALLOC_STATE(ps, always, R300_PS_CMDSIZE, 0); - r300->hw.ps.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_POINT_SIZE, 1); + r600->hw.ga_triangle_stipple.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GA_TRIANGLE_STIPPLE, 1); + ALLOC_STATE(ps, always, R600_PS_CMDSIZE, 0); + r600->hw.ps.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GA_POINT_SIZE, 1); ALLOC_STATE(ga_point_minmax, always, 4, 0); - r300->hw.ga_point_minmax.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_POINT_MINMAX, 3); + r600->hw.ga_point_minmax.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GA_POINT_MINMAX, 3); ALLOC_STATE(lcntl, always, 2, 0); - r300->hw.lcntl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_LINE_CNTL, 1); + r600->hw.lcntl.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GA_LINE_CNTL, 1); ALLOC_STATE(ga_line_stipple, always, 4, 0); - r300->hw.ga_line_stipple.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_LINE_STIPPLE_VALUE, 3); + r600->hw.ga_line_stipple.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GA_LINE_STIPPLE_VALUE, 3); ALLOC_STATE(shade, always, 5, 0); - r300->hw.shade.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_ENHANCE, 4); + r600->hw.shade.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GA_ENHANCE, 4); ALLOC_STATE(polygon_mode, always, 4, 0); - r300->hw.polygon_mode.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_POLY_MODE, 3); + r600->hw.polygon_mode.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GA_POLY_MODE, 3); ALLOC_STATE(fogp, always, 3, 0); - r300->hw.fogp.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_GA_FOG_SCALE, 2); + r600->hw.fogp.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_GA_FOG_SCALE, 2); ALLOC_STATE(zbias_cntl, always, 2, 0); - r300->hw.zbias_cntl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SU_TEX_WRAP, 1); - ALLOC_STATE(zbs, always, R300_ZBS_CMDSIZE, 0); - r300->hw.zbs.cmd[R300_ZBS_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_SU_POLY_OFFSET_FRONT_SCALE, 4); + r600->hw.zbias_cntl.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_SU_TEX_WRAP, 1); + ALLOC_STATE(zbs, always, R600_ZBS_CMDSIZE, 0); + r600->hw.zbs.cmd[R600_ZBS_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_SU_POLY_OFFSET_FRONT_SCALE, 4); ALLOC_STATE(occlusion_cntl, always, 2, 0); - r300->hw.occlusion_cntl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SU_POLY_OFFSET_ENABLE, 1); - ALLOC_STATE(cul, always, R300_CUL_CMDSIZE, 0); - r300->hw.cul.cmd[R300_CUL_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_SU_CULL_MODE, 1); + r600->hw.occlusion_cntl.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_SU_POLY_OFFSET_ENABLE, 1); + ALLOC_STATE(cul, always, R600_CUL_CMDSIZE, 0); + r600->hw.cul.cmd[R600_CUL_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_SU_CULL_MODE, 1); ALLOC_STATE(su_depth_scale, always, 3, 0); - r300->hw.su_depth_scale.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SU_DEPTH_SCALE, 2); - ALLOC_STATE(rc, always, R300_RC_CMDSIZE, 0); - r300->hw.rc.cmd[R300_RC_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_RS_COUNT, 2); + r600->hw.su_depth_scale.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_SU_DEPTH_SCALE, 2); + ALLOC_STATE(rc, always, R600_RC_CMDSIZE, 0); + r600->hw.rc.cmd[R600_RC_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_RS_COUNT, 2); if (is_r500) { ALLOC_STATE(ri, always, R500_RI_CMDSIZE, 0); - r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R500_RS_IP_0, 16); + r600->hw.ri.cmd[R600_RI_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R500_RS_IP_0, 16); for (i = 0; i < 8; i++) { - r300->hw.ri.cmd[R300_RI_CMD_0 + i +1] = + r600->hw.ri.cmd[R600_RI_CMD_0 + i +1] = (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) | (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) | (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT); } - ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0); - r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R500_RS_INST_0, 1); + ALLOC_STATE(rr, variable, R600_RR_CMDSIZE, 0); + r600->hw.rr.cmd[R600_RR_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R500_RS_INST_0, 1); } else { - ALLOC_STATE(ri, always, R300_RI_CMDSIZE, 0); - r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_RS_IP_0, 8); - ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0); - r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_RS_INST_0, 1); + ALLOC_STATE(ri, always, R600_RI_CMDSIZE, 0); + r600->hw.ri.cmd[R600_RI_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_RS_IP_0, 8); + ALLOC_STATE(rr, variable, R600_RR_CMDSIZE, 0); + r600->hw.rr.cmd[R600_RR_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_RS_INST_0, 1); } ALLOC_STATE(sc_hyperz, always, 3, 0); - r300->hw.sc_hyperz.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_HYPERZ, 2); + r600->hw.sc_hyperz.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_SC_HYPERZ, 2); ALLOC_STATE(sc_screendoor, always, 2, 0); - r300->hw.sc_screendoor.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_SCREENDOOR, 1); + r600->hw.sc_screendoor.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_SC_SCREENDOOR, 1); ALLOC_STATE(us_out_fmt, always, 6, 0); - r300->hw.us_out_fmt.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_US_OUT_FMT, 5); + r600->hw.us_out_fmt.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_US_OUT_FMT, 5); if (is_r500) { ALLOC_STATE(fp, always, R500_FP_CMDSIZE, 0); - r300->hw.fp.cmd[R500_FP_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R500_US_CONFIG, 2); - r300->hw.fp.cmd[R500_FP_CNTL] = R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO; - r300->hw.fp.cmd[R500_FP_CMD_1] = cmdpacket0(r300->radeon.radeonScreen, R500_US_CODE_ADDR, 3); - r300->hw.fp.cmd[R500_FP_CMD_2] = cmdpacket0(r300->radeon.radeonScreen, R500_US_FC_CTRL, 1); - r300->hw.fp.cmd[R500_FP_FC_CNTL] = 0; /* FIXME when we add flow control */ + r600->hw.fp.cmd[R500_FP_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R500_US_CONFIG, 2); + r600->hw.fp.cmd[R500_FP_CNTL] = R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO; + r600->hw.fp.cmd[R500_FP_CMD_1] = cmdpacket0(r600->radeon.radeonScreen, R500_US_CODE_ADDR, 3); + r600->hw.fp.cmd[R500_FP_CMD_2] = cmdpacket0(r600->radeon.radeonScreen, R500_US_FC_CTRL, 1); + r600->hw.fp.cmd[R500_FP_FC_CNTL] = 0; /* FIXME when we add flow control */ ALLOC_STATE(r500fp, r500fp, R500_FPI_CMDSIZE, 0); - r300->hw.r500fp.cmd[R300_FPI_CMD_0] = - cmdr500fp(r300->radeon.radeonScreen, 0, 0, 0, 0); - r300->hw.r500fp.emit = emit_r500fp; + r600->hw.r500fp.cmd[R600_FPI_CMD_0] = + cmdr500fp(r600->radeon.radeonScreen, 0, 0, 0, 0); + r600->hw.r500fp.emit = emit_r500fp; ALLOC_STATE(r500fp_const, r500fp_const, R500_FPP_CMDSIZE, 0); - r300->hw.r500fp_const.cmd[R300_FPI_CMD_0] = - cmdr500fp(r300->radeon.radeonScreen, 0, 0, 1, 0); - r300->hw.r500fp_const.emit = emit_r500fp; + r600->hw.r500fp_const.cmd[R600_FPI_CMD_0] = + cmdr500fp(r600->radeon.radeonScreen, 0, 0, 1, 0); + r600->hw.r500fp_const.emit = emit_r500fp; } else { - ALLOC_STATE(fp, always, R300_FP_CMDSIZE, 0); - r300->hw.fp.cmd[R300_FP_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_US_CONFIG, 3); - r300->hw.fp.cmd[R300_FP_CMD_1] = cmdpacket0(r300->radeon.radeonScreen, R300_US_CODE_ADDR_0, 4); - - ALLOC_STATE(fpt, variable, R300_FPT_CMDSIZE, 0); - r300->hw.fpt.cmd[R300_FPT_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_US_TEX_INST_0, 0); - - ALLOC_STATE(fpi[0], variable, R300_FPI_CMDSIZE, 0); - r300->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_US_ALU_RGB_INST_0, 1); - ALLOC_STATE(fpi[1], variable, R300_FPI_CMDSIZE, 1); - r300->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_US_ALU_RGB_ADDR_0, 1); - ALLOC_STATE(fpi[2], variable, R300_FPI_CMDSIZE, 2); - r300->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_US_ALU_ALPHA_INST_0, 1); - ALLOC_STATE(fpi[3], variable, R300_FPI_CMDSIZE, 3); - r300->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_US_ALU_ALPHA_ADDR_0, 1); - ALLOC_STATE(fpp, variable, R300_FPP_CMDSIZE, 0); - r300->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_PFS_PARAM_0_X, 0); + ALLOC_STATE(fp, always, R600_FP_CMDSIZE, 0); + r600->hw.fp.cmd[R600_FP_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_US_CONFIG, 3); + r600->hw.fp.cmd[R600_FP_CMD_1] = cmdpacket0(r600->radeon.radeonScreen, R600_US_CODE_ADDR_0, 4); + + ALLOC_STATE(fpt, variable, R600_FPT_CMDSIZE, 0); + r600->hw.fpt.cmd[R600_FPT_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_US_TEX_INST_0, 0); + + ALLOC_STATE(fpi[0], variable, R600_FPI_CMDSIZE, 0); + r600->hw.fpi[0].cmd[R600_FPI_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_US_ALU_RGB_INST_0, 1); + ALLOC_STATE(fpi[1], variable, R600_FPI_CMDSIZE, 1); + r600->hw.fpi[1].cmd[R600_FPI_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_US_ALU_RGB_ADDR_0, 1); + ALLOC_STATE(fpi[2], variable, R600_FPI_CMDSIZE, 2); + r600->hw.fpi[2].cmd[R600_FPI_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_US_ALU_ALPHA_INST_0, 1); + ALLOC_STATE(fpi[3], variable, R600_FPI_CMDSIZE, 3); + r600->hw.fpi[3].cmd[R600_FPI_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_US_ALU_ALPHA_ADDR_0, 1); + ALLOC_STATE(fpp, variable, R600_FPP_CMDSIZE, 0); + r600->hw.fpp.cmd[R600_FPP_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_PFS_PARAM_0_X, 0); } - ALLOC_STATE(fogs, always, R300_FOGS_CMDSIZE, 0); - r300->hw.fogs.cmd[R300_FOGS_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_FG_FOG_BLEND, 1); - ALLOC_STATE(fogc, always, R300_FOGC_CMDSIZE, 0); - r300->hw.fogc.cmd[R300_FOGC_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_FG_FOG_COLOR_R, 3); - ALLOC_STATE(at, always, R300_AT_CMDSIZE, 0); - r300->hw.at.cmd[R300_AT_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_FG_ALPHA_FUNC, 2); + ALLOC_STATE(fogs, always, R600_FOGS_CMDSIZE, 0); + r600->hw.fogs.cmd[R600_FOGS_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_FG_FOG_BLEND, 1); + ALLOC_STATE(fogc, always, R600_FOGC_CMDSIZE, 0); + r600->hw.fogc.cmd[R600_FOGC_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_FG_FOG_COLOR_R, 3); + ALLOC_STATE(at, always, R600_AT_CMDSIZE, 0); + r600->hw.at.cmd[R600_AT_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_FG_ALPHA_FUNC, 2); ALLOC_STATE(fg_depth_src, always, 2, 0); - r300->hw.fg_depth_src.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_FG_DEPTH_SRC, 1); + r600->hw.fg_depth_src.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_FG_DEPTH_SRC, 1); ALLOC_STATE(rb3d_cctl, always, 2, 0); - r300->hw.rb3d_cctl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_CCTL, 1); - ALLOC_STATE(bld, always, R300_BLD_CMDSIZE, 0); - r300->hw.bld.cmd[R300_BLD_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_CBLEND, 2); - ALLOC_STATE(cmk, always, R300_CMK_CMDSIZE, 0); - r300->hw.cmk.cmd[R300_CMK_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, RB3D_COLOR_CHANNEL_MASK, 1); + r600->hw.rb3d_cctl.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_RB3D_CCTL, 1); + ALLOC_STATE(bld, always, R600_BLD_CMDSIZE, 0); + r600->hw.bld.cmd[R600_BLD_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_RB3D_CBLEND, 2); + ALLOC_STATE(cmk, always, R600_CMK_CMDSIZE, 0); + r600->hw.cmk.cmd[R600_CMK_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, RB3D_COLOR_CHANNEL_MASK, 1); if (is_r500) { ALLOC_STATE(blend_color, always, 3, 0); - r300->hw.blend_color.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R500_RB3D_CONSTANT_COLOR_AR, 2); + r600->hw.blend_color.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R500_RB3D_CONSTANT_COLOR_AR, 2); } else { ALLOC_STATE(blend_color, always, 2, 0); - r300->hw.blend_color.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_BLEND_COLOR, 1); + r600->hw.blend_color.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_RB3D_BLEND_COLOR, 1); } ALLOC_STATE(rop, always, 2, 0); - r300->hw.rop.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_ROPCNTL, 1); - ALLOC_STATE(cb, always, R300_CB_CMDSIZE, 0); - r300->hw.cb.emit = &emit_cb_offset; + r600->hw.rop.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_RB3D_ROPCNTL, 1); + ALLOC_STATE(cb, always, R600_CB_CMDSIZE, 0); + r600->hw.cb.emit = &emit_cb_offset; ALLOC_STATE(rb3d_dither_ctl, always, 10, 0); - r300->hw.rb3d_dither_ctl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_DITHER_CTL, 9); + r600->hw.rb3d_dither_ctl.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_RB3D_DITHER_CTL, 9); ALLOC_STATE(rb3d_aaresolve_ctl, always, 2, 0); - r300->hw.rb3d_aaresolve_ctl.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_AARESOLVE_CTL, 1); + r600->hw.rb3d_aaresolve_ctl.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_RB3D_AARESOLVE_CTL, 1); ALLOC_STATE(rb3d_discard_src_pixel_lte_threshold, always, 3, 0); - r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 2); - ALLOC_STATE(zs, always, R300_ZS_CMDSIZE, 0); - r300->hw.zs.cmd[R300_ZS_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_ZB_CNTL, 3); + r600->hw.rb3d_discard_src_pixel_lte_threshold.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 2); + ALLOC_STATE(zs, always, R600_ZS_CMDSIZE, 0); + r600->hw.zs.cmd[R600_ZS_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_ZB_CNTL, 3); ALLOC_STATE(zstencil_format, always, 5, 0); - r300->hw.zstencil_format.cmd[0] = - cmdpacket0(r300->radeon.radeonScreen, R300_ZB_FORMAT, 4); - r300->hw.zstencil_format.emit = emit_zstencil_format; + r600->hw.zstencil_format.cmd[0] = + cmdpacket0(r600->radeon.radeonScreen, R600_ZB_FORMAT, 4); + r600->hw.zstencil_format.emit = emit_zstencil_format; - ALLOC_STATE(zb, always, R300_ZB_CMDSIZE, 0); - r300->hw.zb.emit = emit_zb_offset; + ALLOC_STATE(zb, always, R600_ZB_CMDSIZE, 0); + r600->hw.zb.emit = emit_zb_offset; ALLOC_STATE(zb_depthclearvalue, always, 2, 0); - r300->hw.zb_depthclearvalue.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_ZB_DEPTHCLEARVALUE, 1); + r600->hw.zb_depthclearvalue.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_ZB_DEPTHCLEARVALUE, 1); ALLOC_STATE(unk4F30, always, 3, 0); - r300->hw.unk4F30.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, 0x4F30, 2); + r600->hw.unk4F30.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, 0x4F30, 2); ALLOC_STATE(zb_hiz_offset, always, 2, 0); - r300->hw.zb_hiz_offset.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_ZB_HIZ_OFFSET, 1); + r600->hw.zb_hiz_offset.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_ZB_HIZ_OFFSET, 1); ALLOC_STATE(zb_hiz_pitch, always, 2, 0); - r300->hw.zb_hiz_pitch.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_ZB_HIZ_PITCH, 1); + r600->hw.zb_hiz_pitch.cmd[0] = cmdpacket0(r600->radeon.radeonScreen, R600_ZB_HIZ_PITCH, 1); /* VPU only on TCL */ if (has_tcl) { int i; - ALLOC_STATE(vpi, vpu, R300_VPI_CMDSIZE, 0); - r300->hw.vpi.cmd[0] = - cmdvpu(r300->radeon.radeonScreen, R300_PVS_CODE_START, 0); - r300->hw.vpi.emit = emit_vpu; + ALLOC_STATE(vpi, vpu, R600_VPI_CMDSIZE, 0); + r600->hw.vpi.cmd[0] = + cmdvpu(r600->radeon.radeonScreen, R600_PVS_CODE_START, 0); + r600->hw.vpi.emit = emit_vpu; if (is_r500) { - ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0); - r300->hw.vpp.cmd[0] = - cmdvpu(r300->radeon.radeonScreen, R500_PVS_CONST_START, 0); - r300->hw.vpp.emit = emit_vpu; + ALLOC_STATE(vpp, vpu, R600_VPP_CMDSIZE, 0); + r600->hw.vpp.cmd[0] = + cmdvpu(r600->radeon.radeonScreen, R500_PVS_CONST_START, 0); + r600->hw.vpp.emit = emit_vpu; - ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0); - r300->hw.vps.cmd[0] = - cmdvpu(r300->radeon.radeonScreen, R500_POINT_VPORT_SCALE_OFFSET, 1); - r300->hw.vps.emit = emit_vpu; + ALLOC_STATE(vps, vpu, R600_VPS_CMDSIZE, 0); + r600->hw.vps.cmd[0] = + cmdvpu(r600->radeon.radeonScreen, R500_POINT_VPORT_SCALE_OFFSET, 1); + r600->hw.vps.emit = emit_vpu; for (i = 0; i < 6; i++) { - ALLOC_STATE(vpucp[i], vpu, R300_VPUCP_CMDSIZE, 0); - r300->hw.vpucp[i].cmd[0] = - cmdvpu(r300->radeon.radeonScreen, + ALLOC_STATE(vpucp[i], vpu, R600_VPUCP_CMDSIZE, 0); + r600->hw.vpucp[i].cmd[0] = + cmdvpu(r600->radeon.radeonScreen, R500_PVS_UCP_START + i, 1); - r300->hw.vpucp[i].emit = emit_vpu; + r600->hw.vpucp[i].emit = emit_vpu; } } else { - ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0); - r300->hw.vpp.cmd[0] = - cmdvpu(r300->radeon.radeonScreen, R300_PVS_CONST_START, 0); - r300->hw.vpp.emit = emit_vpu; + ALLOC_STATE(vpp, vpu, R600_VPP_CMDSIZE, 0); + r600->hw.vpp.cmd[0] = + cmdvpu(r600->radeon.radeonScreen, R600_PVS_CONST_START, 0); + r600->hw.vpp.emit = emit_vpu; - ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0); - r300->hw.vps.cmd[0] = - cmdvpu(r300->radeon.radeonScreen, R300_POINT_VPORT_SCALE_OFFSET, 1); - r300->hw.vps.emit = emit_vpu; + ALLOC_STATE(vps, vpu, R600_VPS_CMDSIZE, 0); + r600->hw.vps.cmd[0] = + cmdvpu(r600->radeon.radeonScreen, R600_POINT_VPORT_SCALE_OFFSET, 1); + r600->hw.vps.emit = emit_vpu; for (i = 0; i < 6; i++) { - ALLOC_STATE(vpucp[i], vpu, R300_VPUCP_CMDSIZE, 0); - r300->hw.vpucp[i].cmd[0] = - cmdvpu(r300->radeon.radeonScreen, - R300_PVS_UCP_START + i, 1); - r300->hw.vpucp[i].emit = emit_vpu; + ALLOC_STATE(vpucp[i], vpu, R600_VPUCP_CMDSIZE, 0); + r600->hw.vpucp[i].cmd[0] = + cmdvpu(r600->radeon.radeonScreen, + R600_PVS_UCP_START + i, 1); + r600->hw.vpucp[i].emit = emit_vpu; } } } /* Textures */ ALLOC_STATE(tex.filter, variable, mtu + 1, 0); - r300->hw.tex.filter.cmd[R300_TEX_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER0_0, 0); + r600->hw.tex.filter.cmd[R600_TEX_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_TX_FILTER0_0, 0); ALLOC_STATE(tex.filter_1, variable, mtu + 1, 0); - r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER1_0, 0); + r600->hw.tex.filter_1.cmd[R600_TEX_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_TX_FILTER1_0, 0); ALLOC_STATE(tex.size, variable, mtu + 1, 0); - r300->hw.tex.size.cmd[R300_TEX_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_TX_SIZE_0, 0); + r600->hw.tex.size.cmd[R600_TEX_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_TX_SIZE_0, 0); ALLOC_STATE(tex.format, variable, mtu + 1, 0); - r300->hw.tex.format.cmd[R300_TEX_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_TX_FORMAT_0, 0); + r600->hw.tex.format.cmd[R600_TEX_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_TX_FORMAT_0, 0); ALLOC_STATE(tex.pitch, variable, mtu + 1, 0); - r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_TX_FORMAT2_0, 0); + r600->hw.tex.pitch.cmd[R600_TEX_CMD_0] = cmdpacket0(r600->radeon.radeonScreen, R600_TX_FORMAT2_0, 0); ALLOC_STATE(tex.offset, variable, 1, 0); - r300->hw.tex.offset.cmd[R300_TEX_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_TX_OFFSET_0, 0); - r300->hw.tex.offset.emit = &emit_tex_offsets; + r600->hw.tex.offset.cmd[R600_TEX_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_TX_OFFSET_0, 0); + r600->hw.tex.offset.emit = &emit_tex_offsets; ALLOC_STATE(tex.chroma_key, variable, mtu + 1, 0); - r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_TX_CHROMA_KEY_0, 0); + r600->hw.tex.chroma_key.cmd[R600_TEX_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_TX_CHROMA_KEY_0, 0); ALLOC_STATE(tex.border_color, variable, mtu + 1, 0); - r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] = - cmdpacket0(r300->radeon.radeonScreen, R300_TX_BORDER_COLOR_0, 0); + r600->hw.tex.border_color.cmd[R600_TEX_CMD_0] = + cmdpacket0(r600->radeon.radeonScreen, R600_TX_BORDER_COLOR_0, 0); - r300->radeon.hw.is_dirty = GL_TRUE; - r300->radeon.hw.all_dirty = GL_TRUE; + r600->radeon.hw.is_dirty = GL_TRUE; + r600->radeon.hw.all_dirty = GL_TRUE; - rcommonInitCmdBuf(&r300->radeon); + rcommonInitCmdBuf(&r600->radeon); } |