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authorMaciej Cencora <m.cencora@gmail.com>2009-11-18 22:02:48 +0100
committerMaciej Cencora <m.cencora@gmail.com>2009-11-18 22:02:48 +0100
commit7118db870091d4c9c2465e79f361ff0ed36d1f90 (patch)
tree0e2be36fd28c5d7f2f84cf11b135bc0404f6dabb /src/mesa/drivers/dri/r600/r700_chip.c
parentafe84fa698eae3e035e967589f0a8d55f6a83698 (diff)
r600: align for mipmap tree changes
Diffstat (limited to 'src/mesa/drivers/dri/r600/r700_chip.c')
-rw-r--r--src/mesa/drivers/dri/r600/r700_chip.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index ec76fbcb6d..2b2b4d748f 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -54,11 +54,15 @@ static void r700SendTexState(GLcontext *ctx, struct radeon_state_atom *atom)
for (i = 0; i < R700_TEXTURE_NUMBERUNITS; i++) {
if (ctx->Texture.Unit[i]._ReallyEnabled) {
radeonTexObj *t = r700->textures[i];
+ uint32_t offset;
if (t) {
- if (!t->image_override)
+ if (!t->image_override) {
bo = t->mt->bo;
- else
+ offset = get_base_teximage_offset(t);
+ } else {
bo = t->bo;
+ offset = 0;
+ }
if (bo) {
r700SyncSurf(context, bo,
@@ -77,7 +81,7 @@ static void r700SendTexState(GLcontext *ctx, struct radeon_state_atom *atom)
R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE6);
R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE2,
bo,
- 0,
+ offset,
RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE3,
bo,