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| author | Eric Anholt <eric@anholt.net> | 2010-10-21 14:40:49 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-10-21 15:21:28 -0700 |
| commit | 0b77d57394a3712851ec271aa7ad353d56f302a1 (patch) | |
| tree | 1255d015a64b25903a39323709cf9ec3e53d0268 /src/mesa/drivers/dri/r600 | |
| parent | 99b2c8570ea6f46c6564681631f0e0750a0641cc (diff) | |
i965: Don't emit register spill offsets directly into g0.
g0 is used by others, and is expected to be left exactly as it was
dispatched to us. So manually move g0 into our message reg when
spilling/unspilling and update the offset in the MRF. Fixes failures
in texture sampling after having spilled a register.
Diffstat (limited to 'src/mesa/drivers/dri/r600')
0 files changed, 0 insertions, 0 deletions