diff options
author | Andre Maasikas <amaasikas@gmail.com> | 2009-12-08 11:57:24 +0200 |
---|---|---|
committer | Andre Maasikas <amaasikas@gmail.com> | 2009-12-08 11:57:24 +0200 |
commit | b5e256c76dea2182c82af2a4f66224735701d55a (patch) | |
tree | 42ab2283fc94ab3deefc30983aaa10f283897dd6 /src/mesa/drivers/dri/r600 | |
parent | ac66598ed8bc218720cf2a1a7493b7e25ca9d962 (diff) | |
parent | 0d4a05445c6b47b93269a3829afbe509ffec4817 (diff) |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/mesa/drivers/dri/r600/r700_assembler.c
src/mesa/main/version.h
Diffstat (limited to 'src/mesa/drivers/dri/r600')
-rw-r--r-- | src/mesa/drivers/dri/r600/r700_assembler.c | 29 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r600/r700_chip.c | 2 |
2 files changed, 13 insertions, 18 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c index 309c90fdd0..cf64d170ed 100644 --- a/src/mesa/drivers/dri/r600/r700_assembler.c +++ b/src/mesa/drivers/dri/r600/r700_assembler.c @@ -4626,22 +4626,6 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm) need_barrier = GL_TRUE; } - switch (pAsm->pILInst[pAsm->uiCurInst].Opcode) - { - case OPCODE_TEX: - break; - case OPCODE_TXB: - radeon_error("do not support TXB yet\n"); - return GL_FALSE; - break; - case OPCODE_TXP: - break; - default: - radeon_error("Internal error: bad texture op (not TEX)\n"); - return GL_FALSE; - break; - } - if (pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXP) { GLuint tmp = gethelpr(pAsm); @@ -4820,7 +4804,18 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm) } - pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE; + if(pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXB) + { + pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE_L; + } + else + { + pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE; + } + + pAsm->is_tex = GL_TRUE; + if ( GL_TRUE == need_barrier ) + pAsm->is_tex = GL_TRUE; if ( GL_TRUE == need_barrier ) { diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c index 8126777bf4..d702740014 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.c +++ b/src/mesa/drivers/dri/r600/r700_chip.c @@ -1306,9 +1306,9 @@ void r600InitAtoms(context_t *context) ALLOC_STATE(poly, always, 10, r700SendPolyState); ALLOC_STATE(cb, cb, 18, r700SendCBState); ALLOC_STATE(clrcmp, always, 6, r700SendCBCLRCMPState); + ALLOC_STATE(cb_target, always, 25, r700SendRenderTargetState); ALLOC_STATE(blnd, blnd, (6 + (R700_MAX_RENDER_TARGETS * 3)), r700SendCBBlendState); ALLOC_STATE(blnd_clr, always, 6, r700SendCBBlendColorState); - ALLOC_STATE(cb_target, always, 25, r700SendRenderTargetState); ALLOC_STATE(sx, always, 9, r700SendSXState); ALLOC_STATE(vgt, always, 41, r700SendVGTState); ALLOC_STATE(spi, always, (59 + R700_MAX_SHADER_EXPORTS), r700SendSPIState); |