diff options
| author | Dave Airlie <airlied@redhat.com> | 2009-03-23 18:27:49 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2009-03-23 18:54:06 +1000 |
| commit | 8c7e30fb950c83f5e9e29e60735e999ac608145a (patch) | |
| tree | a82ebbc69cd0a814bad66c864113f0941c1c5cb8 /src/mesa/drivers/dri/radeon/radeon_state_init.c | |
| parent | c607a664dd005c001afda1fff1a68d41925fa86e (diff) | |
raedon/r200/r300: mega-FBO commits.
Re work depth issues.
Do a lot more FBO abstactions
fixup depth/stencil buffer interactions
Diffstat (limited to 'src/mesa/drivers/dri/radeon/radeon_state_init.c')
| -rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_state_init.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c index 8b6caf19d3..3d0cd8d3f8 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state_init.c +++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c @@ -592,22 +592,16 @@ void radeonInitState( r100ContextPtr rmesa ) switch ( ctx->Visual.depthBits ) { case 16: rmesa->radeon.state.depth.clear = 0x0000ffff; - rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffff; rmesa->radeon.state.stencil.clear = 0x00000000; break; case 24: rmesa->radeon.state.depth.clear = 0x00ffffff; - rmesa->radeon.state.depth.scale = 1.0 / (GLfloat)0xffffff; rmesa->radeon.state.stencil.clear = 0xffff0000; break; default: break; } - /* Only have hw stencil when depth buffer is 24 bits deep */ - rmesa->radeon.state.stencil.hwBuffer = ( ctx->Visual.stencilBits > 0 && - ctx->Visual.depthBits == 24 ); - rmesa->radeon.Fallback = 0; |