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authorAlan Hourihane <alanh@tungstengraphics.com>2005-08-15 06:59:24 +0000
committerAlan Hourihane <alanh@tungstengraphics.com>2005-08-15 06:59:24 +0000
commitdabec11d277e68b6940e741651e61102767240b9 (patch)
tree12e8d6988b4b20a0d4fbcf4312ee89f66ddb1225 /src/mesa/drivers/dri/radeon/server
parent69dc32cfac945bf664ddfbd6f0116404f893e66e (diff)
Add Egberts fixes for 64bit architectures
Add additional checks for the *DRIRec info structure passed in from the device driver. This ensures that things fallback to indirect rendering if the DDX driver has had modifications (i.e. removal of the drmAddress field).
Diffstat (limited to 'src/mesa/drivers/dri/radeon/server')
-rw-r--r--src/mesa/drivers/dri/radeon/server/radeon_dri.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/radeon/server/radeon_dri.c b/src/mesa/drivers/dri/radeon/server/radeon_dri.c
index 1258b263f5..7f83d868cb 100644
--- a/src/mesa/drivers/dri/radeon/server/radeon_dri.c
+++ b/src/mesa/drivers/dri/radeon/server/radeon_dri.c
@@ -398,7 +398,7 @@ static int RADEONDRIAgpInit( const DRIDriverContext *ctx, RADEONInfoPtr info)
fprintf(stderr, "[gart] Could not add ring mapping\n");
return 0;
}
- fprintf(stderr, "[gart] ring handle = 0x%08lx\n", info->ringHandle);
+ fprintf(stderr, "[gart] ring handle = 0x%08x\n", info->ringHandle);
if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize,
@@ -409,7 +409,7 @@ static int RADEONDRIAgpInit( const DRIDriverContext *ctx, RADEONInfoPtr info)
}
fprintf(stderr,
- "[gart] ring read ptr handle = 0x%08lx\n",
+ "[gart] ring read ptr handle = 0x%08lx\n",
info->ringReadPtrHandle);
if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize,
@@ -419,7 +419,7 @@ static int RADEONDRIAgpInit( const DRIDriverContext *ctx, RADEONInfoPtr info)
return 0;
}
fprintf(stderr,
- "[gart] vertex/indirect buffers handle = 0x%08lx\n",
+ "[gart] vertex/indirect buffers handle = 0x%08x\n",
info->bufHandle);
if (drmAddMap(ctx->drmFD, info->gartTexStart, info->gartTexMapSize,
@@ -429,7 +429,7 @@ static int RADEONDRIAgpInit( const DRIDriverContext *ctx, RADEONInfoPtr info)
return 0;
}
fprintf(stderr,
- "[gart] AGP texture map handle = 0x%08lx\n",
+ "[gart] AGP texture map handle = 0x%08lx\n",
info->gartTexHandle);
/* Initialize Radeon's AGP registers */
@@ -486,7 +486,7 @@ static int RADEONDRIPciInit(const DRIDriverContext *ctx, RADEONInfoPtr info)
return 0;
}
fprintf(stderr,
- "[pci] ring handle = 0x%08lx\n", info->ringHandle);
+ "[pci] ring handle = 0x%08x\n", info->ringHandle);
if (drmAddMap(ctx->drmFD, info->ringReadOffset, info->ringReadMapSize,
DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) {
@@ -495,7 +495,7 @@ static int RADEONDRIPciInit(const DRIDriverContext *ctx, RADEONInfoPtr info)
return 0;
}
fprintf(stderr,
- "[pci] ring read ptr handle = 0x%08lx\n",
+ "[pci] ring read ptr handle = 0x%08lx\n",
info->ringReadPtrHandle);
if (drmAddMap(ctx->drmFD, info->bufStart, info->bufMapSize,
@@ -505,7 +505,7 @@ static int RADEONDRIPciInit(const DRIDriverContext *ctx, RADEONInfoPtr info)
return 0;
}
fprintf(stderr,
- "[pci] vertex/indirect buffers handle = 0x%08lx\n",
+ "[pci] vertex/indirect buffers handle = 0x%08lx\n",
info->bufHandle);
if (drmAddMap(ctx->drmFD, info->gartTexStart, info->gartTexMapSize,
@@ -515,7 +515,7 @@ static int RADEONDRIPciInit(const DRIDriverContext *ctx, RADEONInfoPtr info)
return 0;
}
fprintf(stderr,
- "[pci] GART texture map handle = 0x%08lx\n",
+ "[pci] GART texture map handle = 0x%08x\n",
info->gartTexHandle);
return 1;