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authorRichard Li <richardradeon@gmail.com>2009-11-19 16:17:13 -0500
committerRichard Li <richardradeon@gmail.com>2009-11-19 16:17:13 -0500
commit49b3f4a6bc498d964296f7305b490ec983b9fac4 (patch)
treeb56c8899e2db1a9f2a7a97da038ec943a93daed9 /src/mesa/drivers/dri
parent6345a7ba447d3e04b939ead6fee44fe9201ec2e3 (diff)
parent90e69c81e445136b7d14c569cab5b517b8073498 (diff)
Merge branch 'master' of ssh://richardradeon@git.freedesktop.org/git/mesa/mesa
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/ffb/ffb_vbtmp.h8
-rw-r--r--src/mesa/drivers/dri/gamma/gamma_render.c10
-rw-r--r--src/mesa/drivers/dri/i915/i830_texstate.c10
-rw-r--r--src/mesa/drivers/dri/i915/i830_vtbl.c5
-rw-r--r--src/mesa/drivers/dri/i915/i915_fragprog.c2
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c17
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c3
-rw-r--r--src/mesa/drivers/dri/i915/intel_tris.c78
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h3
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw_upload.c8
-rw-r--r--src/mesa/drivers/dri/i965/brw_vtbl.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_fp.c1
-rw-r--r--src/mesa/drivers/dri/intel/intel_batchbuffer.c7
-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c5
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c44
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h51
-rw-r--r--src/mesa/drivers/dri/intel/intel_extensions.c14
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c16
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_bitmap.c5
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c57
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c38
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.h1
-rw-r--r--src/mesa/drivers/dri/intel/intel_span.c13
-rw-r--r--src/mesa/drivers/dri/intel/intel_state.c20
-rw-r--r--src/mesa/drivers/dri/mach64/mach64_native_vb.c30
-rw-r--r--src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h36
-rw-r--r--src/mesa/drivers/dri/mach64/mach64_vbtmp.h86
-rw-r--r--src/mesa/drivers/dri/r128/r128_tris.c4
-rw-r--r--src/mesa/drivers/dri/r200/r200_swtcl.c2
-rw-r--r--src/mesa/drivers/dri/r300/r300_swtcl.c10
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos_arrays.c42
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h58
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos_verts.c22
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_swtcl.c2
-rw-r--r--src/mesa/drivers/dri/savage/savagerender.c8
-rw-r--r--src/mesa/drivers/dri/savage/savagetris.c18
-rw-r--r--src/mesa/drivers/dri/sis/sis_tris.c4
-rw-r--r--src/mesa/drivers/dri/tdfx/tdfx_vb.c14
-rw-r--r--src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h30
-rw-r--r--src/mesa/drivers/dri/unichrome/via_tris.c4
42 files changed, 266 insertions, 529 deletions
diff --git a/src/mesa/drivers/dri/ffb/ffb_vbtmp.h b/src/mesa/drivers/dri/ffb/ffb_vbtmp.h
index 0495d0e276..c548ef3ad5 100644
--- a/src/mesa/drivers/dri/ffb/ffb_vbtmp.h
+++ b/src/mesa/drivers/dri/ffb/ffb_vbtmp.h
@@ -38,11 +38,11 @@ static void TAG(emit)(GLcontext *ctx, GLuint start, GLuint end)
#endif
#if (IND & (FFB_VB_RGBA_BIT))
- col0 = VB->ColorPtr[0]->data;
- col0_stride = VB->ColorPtr[0]->stride;
+ col0 = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col0_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
#if (IND & (FFB_VB_TWOSIDE_BIT))
- col1 = VB->ColorPtr[1]->data;
- col1_stride = VB->ColorPtr[1]->stride;
+ col1 = VB->BackfaceColorPtr->data;
+ col1_stride = VB->BackfaceColorPtr->stride;
#endif
#endif
diff --git a/src/mesa/drivers/dri/gamma/gamma_render.c b/src/mesa/drivers/dri/gamma/gamma_render.c
index 1b9fd169f4..a03a93d132 100644
--- a/src/mesa/drivers/dri/gamma/gamma_render.c
+++ b/src/mesa/drivers/dri/gamma/gamma_render.c
@@ -53,13 +53,13 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end)
GLfloat (*tc0)[4] = 0;
GLuint tc0_size = 0;
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
if (ctx->Texture.Unit[0]._ReallyEnabled) {
- tc0_stride = VB->TexCoordPtr[0]->stride;
- tc0 = VB->TexCoordPtr[0]->data;
- tc0_size = VB->TexCoordPtr[0]->size;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0]->size;
coord = VB->ClipPtr->data;
coord_stride = VB->ClipPtr->stride;
} else {
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index f4bbb53b86..c62281d341 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -27,6 +27,7 @@
#include "main/mtypes.h"
#include "main/enums.h"
+#include "main/colormac.h"
#include "intel_mipmap_tree.h"
#include "intel_tex.h"
@@ -311,11 +312,10 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
CLAMPED_FLOAT_TO_UBYTE(border[2], tObj->BorderColor[2]);
CLAMPED_FLOAT_TO_UBYTE(border[3], tObj->BorderColor[3]);
- state[I830_TEXREG_TM0S4] = INTEL_PACKCOLOR8888(border[0],
- border[1],
- border[2],
- border[3]);
-
+ state[I830_TEXREG_TM0S4] = PACK_COLOR_8888(border[3],
+ border[0],
+ border[1],
+ border[2]);
I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), GL_TRUE);
/* memcmp was already disabled, but definitely won't work as the
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index a6f554701e..c05c7759ac 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -126,7 +126,7 @@ i830_render_start(struct intel_context *intel)
for (i = 0; i < I830_TEX_UNITS; i++) {
if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_TEX(i))) {
- GLuint sz = VB->TexCoordPtr[i]->size;
+ GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
GLuint emit;
GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] &
~TEXCOORDTYPE_MASK);
@@ -714,9 +714,6 @@ i830_new_batch(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
i830->state.emitted = 0;
-
- /* Check that we didn't just wrap our batchbuffer at a bad time. */
- assert(!intel->no_batch_wrap);
}
static void
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c
index d9c61446f5..9e4d318036 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -1301,7 +1301,7 @@ i915ValidateFragmentProgram(struct i915_context *i915)
for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {
if (inputsRead & FRAG_BIT_TEX(i)) {
- int sz = VB->TexCoordPtr[i]->size;
+ int sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(sz));
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index d6689af53f..1bacd51aec 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -28,6 +28,7 @@
#include "main/mtypes.h"
#include "main/enums.h"
#include "main/macros.h"
+#include "main/colormac.h"
#include "intel_mipmap_tree.h"
#include "intel_tex.h"
@@ -363,15 +364,15 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
* R channel, while the hardware uses A. Spam R into all the channels
* for safety.
*/
- state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0],
- border[0],
- border[0],
- border[0]);
+ state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[0],
+ border[0],
+ border[0],
+ border[0]);
} else {
- state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0],
- border[1],
- border[2],
- border[3]);
+ state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[3],
+ border[0],
+ border[1],
+ border[2]);
}
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 77ba8d5581..3e7b5101cc 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -667,9 +667,6 @@ i915_new_batch(struct intel_context *intel)
* difficulties associated with them (physical address requirements).
*/
i915->state.emitted = 0;
-
- /* Check that we didn't just wrap our batchbuffer at a bad time. */
- assert(!intel->no_batch_wrap);
}
static void
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index bc527aae47..8a3ab39bc2 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -1250,81 +1250,6 @@ union fi
GLint i;
};
-
-/**********************************************************************/
-/* Used only with the metaops callbacks. */
-/**********************************************************************/
-static void
-intel_meta_draw_poly(struct intel_context *intel,
- GLuint n,
- GLfloat xy[][2],
- GLfloat z, GLuint color, GLfloat tex[][2])
-{
- union fi *vb;
- GLint i;
- unsigned int saved_vertex_size = intel->vertex_size;
-
- LOCK_HARDWARE(intel);
-
- intel->vertex_size = 6;
-
- /* All 3d primitives should be emitted with LOOP_CLIPRECTS,
- * otherwise the drawing origin (DR4) might not be set correctly.
- */
- intel_set_prim(intel, PRIM3D_TRIFAN);
- vb = (union fi *) intel_get_prim_space(intel, n);
-
- for (i = 0; i < n; i++) {
- vb[0].f = xy[i][0];
- vb[1].f = xy[i][1];
- vb[2].f = z;
- vb[3].i = color;
- vb[4].f = tex[i][0];
- vb[5].f = tex[i][1];
- vb += 6;
- }
-
- INTEL_FIREVERTICES(intel);
-
- intel->vertex_size = saved_vertex_size;
-
- UNLOCK_HARDWARE(intel);
-}
-
-static void
-intel_meta_draw_quad(struct intel_context *intel,
- GLfloat x0, GLfloat x1,
- GLfloat y0, GLfloat y1,
- GLfloat z,
- GLuint color,
- GLfloat s0, GLfloat s1, GLfloat t0, GLfloat t1)
-{
- GLfloat xy[4][2];
- GLfloat tex[4][2];
-
- xy[0][0] = x0;
- xy[0][1] = y0;
- xy[1][0] = x1;
- xy[1][1] = y0;
- xy[2][0] = x1;
- xy[2][1] = y1;
- xy[3][0] = x0;
- xy[3][1] = y1;
-
- tex[0][0] = s0;
- tex[0][1] = t0;
- tex[1][0] = s1;
- tex[1][1] = t0;
- tex[2][0] = s1;
- tex[2][1] = t1;
- tex[3][0] = s0;
- tex[3][1] = t1;
-
- intel_meta_draw_poly(intel, 4, xy, z, color, tex);
-}
-
-
-
/**********************************************************************/
/* Initialization. */
/**********************************************************************/
@@ -1333,7 +1258,6 @@ intel_meta_draw_quad(struct intel_context *intel,
void
intelInitTriFuncs(GLcontext * ctx)
{
- struct intel_context *intel = intel_context(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
static int firsttime = 1;
@@ -1350,6 +1274,4 @@ intelInitTriFuncs(GLcontext * ctx)
tnl->Driver.Render.BuildVertices = _tnl_build_vertices;
tnl->Driver.Render.CopyPV = _tnl_copy_pv;
tnl->Driver.Render.Interp = _tnl_interp;
-
- intel->vtbl.meta_draw_quad = intel_meta_draw_quad;
}
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index fded47aa2f..e73e21433c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -172,8 +172,8 @@ struct brw_fragment_program {
GLuint id; /**< serial no. to identify frag progs, never re-used */
GLboolean isGLSL; /**< really, any IF/LOOP/CONT/BREAK instructions */
- dri_bo *const_buffer; /** Program constant buffer/surface */
GLboolean use_const_buffer;
+ dri_bo *const_buffer; /** Program constant buffer/surface */
/** for debugging, which texture units are referenced */
GLbitfield tex_units_used;
@@ -438,7 +438,6 @@ struct brw_context
GLuint primitive;
GLboolean emit_state_always;
- GLboolean no_batch_wrap;
struct {
struct brw_state_flags dirty;
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 8bcb6083f7..7ad860898f 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -145,7 +145,7 @@ static void brw_emit_prim(struct brw_context *brw,
prim_packet.base_vert_location = prim->basevertex;
/* Can't wrap here, since we rely on the validated state. */
- brw->no_batch_wrap = GL_TRUE;
+ intel->no_batch_wrap = GL_TRUE;
/* If we're set to always flush, do it before and after the primitive emit.
* We want to catch both missed flushes that hurt instruction/state cache
@@ -163,7 +163,7 @@ static void brw_emit_prim(struct brw_context *brw,
intel_batchbuffer_emit_mi_flush(intel->batch);
}
- brw->no_batch_wrap = GL_FALSE;
+ intel->no_batch_wrap = GL_FALSE;
}
static void brw_merge_inputs( struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 271a88dae0..7c796dae93 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -243,14 +243,6 @@ static void wrap_buffers( struct brw_context *brw,
dri_bo_unreference(brw->vb.upload.bo);
brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO",
size, 1);
-
- /* Set the internal VBO\ to no-backing-store. We only use them as a
- * temporary within a brw_try_draw_prims while the lock is held.
- */
- /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH
- FAKE TO PUSH THIS STUFF */
-// if (!brw->intel.ttm)
-// dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);
}
static void get_space( struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index 114e6bd018..dc47f08dd4 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -144,9 +144,6 @@ static void brw_new_batch( struct intel_context *intel )
{
struct brw_context *brw = brw_context(&intel->ctx);
- /* Check that we didn't just wrap our batchbuffer at a bad time. */
- assert(!brw->no_batch_wrap);
-
brw->curbe.need_new_bo = GL_TRUE;
/* Mark all context state as needing to be re-emitted.
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 9dcb6e14bb..b9b987ea70 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -76,10 +76,10 @@ struct brw_wm_prog_key {
GLushort tex_swizzles[BRW_MAX_TEX_UNIT];
- GLuint program_string_id:32;
GLushort origin_x, origin_y;
GLushort drawable_height;
GLbitfield64 vp_outputs_written;
+ GLuint program_string_id:32;
};
diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c
index 7d03179588..3737faf26f 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
@@ -138,7 +138,6 @@ static struct prog_dst_register dst_reg(GLuint file, GLuint idx)
reg.CondMask = COND_TR;
reg.CondSwizzle = 0;
reg.CondSrc = 0;
- reg.pad = 0;
return reg;
}
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index ca6e2fa5b1..2eae9b66d8 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -80,7 +80,7 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)
batch->buf = NULL;
}
- if (!batch->buffer && intel->ttm == GL_TRUE)
+ if (!batch->buffer)
batch->buffer = malloc (intel->maxBatchSize);
batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
@@ -212,7 +212,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
batch->reserved_space = 0;
/* Emit a flush if the bufmgr doesn't do it for us. */
- if (intel->always_flush_cache || !intel->ttm) {
+ if (intel->always_flush_cache) {
intel_batchbuffer_emit_mi_flush(batch);
used = batch->ptr - batch->map;
}
@@ -244,6 +244,9 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
if (intel->vtbl.finish_batch)
intel->vtbl.finish_batch(intel);
+ /* Check that we didn't just wrap our batchbuffer at a bad time. */
+ assert(!intel->no_batch_wrap);
+
batch->reserved_space = BATCH_RESERVED;
/* TODO: Just pass the relocation list and dma buffer up to the
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 817223da41..f14854602b 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -499,10 +499,11 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
switch (irb->texformat) {
case MESA_FORMAT_ARGB8888:
case MESA_FORMAT_XRGB8888:
- clearVal = intel->ClearColor8888;
+ clearVal = PACK_COLOR_8888(clear[3], clear[0],
+ clear[1], clear[2]);
break;
case MESA_FORMAT_RGB565:
- clearVal = intel->ClearColor565;
+ clearVal = PACK_COLOR_565(clear[0], clear[1], clear[2]);
break;
case MESA_FORMAT_ARGB4444:
clearVal = PACK_COLOR_4444(clear[3], clear[0],
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 2aeca6b81b..1434ae530b 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -176,9 +176,7 @@ intelGetString(GLcontext * ctx, GLenum name)
break;
}
- (void) driGetRendererString(buffer, chipset,
- (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE,
- 0);
+ (void) driGetRendererString(buffer, chipset, DRIVER_DATE_GEM, 0);
return (GLubyte *) buffer;
default:
@@ -601,6 +599,7 @@ intelInitContext(struct intel_context *intel,
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
int fthrottle_mode;
+ int bo_reuse_mode;
if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
functions, (void *) intel)) {
@@ -635,18 +634,14 @@ intelInitContext(struct intel_context *intel,
intel->maxBatchSize = BATCH_SZ;
intel->bufmgr = intelScreen->bufmgr;
- intel->ttm = intelScreen->ttm;
- if (intel->ttm) {
- int bo_reuse_mode;
- bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
- switch (bo_reuse_mode) {
- case DRI_CONF_BO_REUSE_DISABLED:
- break;
- case DRI_CONF_BO_REUSE_ALL:
- intel_bufmgr_gem_enable_reuse(intel->bufmgr);
- break;
- }
+ bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse");
+ switch (bo_reuse_mode) {
+ case DRI_CONF_BO_REUSE_DISABLED:
+ break;
+ case DRI_CONF_BO_REUSE_ALL:
+ intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+ break;
}
/* This doesn't yet catch all non-conformant rendering, but it's a
@@ -733,12 +728,6 @@ intelInitContext(struct intel_context *intel,
intel->RenderIndex = ~0;
fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
- intel->irqsEmitted = 0;
-
- intel->do_irqs = (intel->intelScreen->irq_active &&
- fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
-
- intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
if (intel->gen >= 4 && !intel->intelScreen->irq_active) {
_mesa_printf("IRQs not active. Exiting\n");
@@ -1058,21 +1047,6 @@ intelContendedLock(struct intel_context *intel, GLuint flags)
sarea->ctxOwner = me;
}
- /* If the last consumer of the texture memory wasn't us, notify the fake
- * bufmgr and record the new owner. We should have the memory shared
- * between contexts of a single fake bufmgr, but this will at least make
- * things correct for now.
- */
- if (!intel->ttm && sarea->texAge != intel->hHWContext) {
- sarea->texAge = intel->hHWContext;
- intel_bufmgr_fake_contended_lock_take(intel->bufmgr);
- if (INTEL_DEBUG & DEBUG_BATCH)
- intel_decode_context_reset();
- if (INTEL_DEBUG & DEBUG_BUFMGR)
- fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n",
- sarea->ctxOwner, intel->hHWContext);
- }
-
/* Drawable changed?
*/
if (dPriv && intel->lastStamp != dPriv->lastStamp) {
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index eb7be7ddd0..481202c971 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -135,14 +135,6 @@ struct intel_context
struct intel_region * draw_region,
struct intel_region * depth_region);
- void (*meta_draw_quad)(struct intel_context *intel,
- GLfloat x0, GLfloat x1,
- GLfloat y0, GLfloat y1,
- GLfloat z,
- GLuint color, /* ARGB32 */
- GLfloat s0, GLfloat s1,
- GLfloat t0, GLfloat t1);
-
void (*meta_color_mask) (struct intel_context * intel, GLboolean);
void (*meta_stencil_replace) (struct intel_context * intel,
@@ -189,12 +181,6 @@ struct intel_context
struct intel_region *back_region;
struct intel_region *depth_region;
- /**
- * This value indicates that the kernel memory manager is being used
- * instead of the fake client-side memory manager.
- */
- GLboolean ttm;
-
struct intel_batchbuffer *batch;
drm_intel_bo *first_post_swapbuffers_batch;
GLboolean no_batch_wrap;
@@ -217,10 +203,6 @@ struct intel_context
char *prevLockFile;
int prevLockLine;
- GLuint ClearColor565;
- GLuint ClearColor8888;
-
-
/* Offsets of fields within the current vertex:
*/
GLuint coloroffset;
@@ -237,6 +219,7 @@ struct intel_context
GLboolean hw_stipple;
GLboolean depth_buffer_is_float;
GLboolean no_rast;
+ GLboolean no_hw;
GLboolean always_flush_batch;
GLboolean always_flush_cache;
@@ -302,13 +285,6 @@ struct intel_context
GLboolean use_early_z;
drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
- int perf_boxes;
-
- GLuint do_usleeps;
- int do_irqs;
- GLuint irqsEmitted;
-
- GLboolean scissor;
drm_clip_rect_t draw_rect;
drm_clip_rect_t scissor_rect;
@@ -325,8 +301,6 @@ struct intel_context
GLuint lastStamp;
- GLboolean no_hw;
-
/**
* Configuration cache
*/
@@ -374,29 +348,6 @@ do { \
} while (0)
/* ================================================================
- * Color packing:
- */
-
-#define INTEL_PACKCOLOR4444(r,g,b,a) \
- ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define INTEL_PACKCOLOR1555(r,g,b,a) \
- ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
- ((a) ? 0x8000 : 0))
-
-#define INTEL_PACKCOLOR565(r,g,b) \
- ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define INTEL_PACKCOLOR8888(r,g,b,a) \
- ((a<<24) | (r<<16) | (g<<8) | b)
-
-#define INTEL_PACKCOLOR(format, r, g, b, a) \
-(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) : \
- (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) : \
- (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) : \
- 0)))
-
-/* ================================================================
* From linux kernel i386 header files, copes with odd sizes better
* than COPY_DWORDS would:
* XXX Put this in src/mesa/main/imports.h ???
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c
index 1682e115cc..f5fe543b5d 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -79,6 +79,7 @@ static const struct dri_extension card_extensions[] = {
{ "GL_ARB_half_float_pixel", NULL },
{ "GL_ARB_map_buffer_range", GL_ARB_map_buffer_range_functions },
{ "GL_ARB_multitexture", NULL },
+ { "GL_ARB_pixel_buffer_object", NULL },
{ "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
{ "GL_ARB_point_sprite", NULL },
{ "GL_ARB_shader_objects", GL_ARB_shader_objects_functions },
@@ -104,6 +105,8 @@ static const struct dri_extension card_extensions[] = {
{ "GL_EXT_blend_logic_op", NULL },
{ "GL_EXT_blend_subtract", NULL },
{ "GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions },
+ { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions },
+ { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
{ "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
{ "GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions },
{ "GL_EXT_packed_depth_stencil", NULL },
@@ -176,14 +179,6 @@ static const struct dri_extension arb_oq_extensions[] = {
{ NULL, NULL }
};
-
-static const struct dri_extension ttm_extensions[] = {
- { "GL_ARB_pixel_buffer_object", NULL },
- { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions },
- { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
- { NULL, NULL }
-};
-
static const struct dri_extension fragment_shader_extensions[] = {
{ "GL_ARB_fragment_shader", NULL },
{ NULL, NULL }
@@ -202,9 +197,6 @@ intelInitExtensions(GLcontext *ctx)
*/
driInitExtensions(ctx, card_extensions, GL_FALSE);
- if (intel->ttm)
- driInitExtensions(ctx, ttm_extensions, GL_FALSE);
-
if (IS_965(intel->intelScreen->deviceID))
driInitExtensions(ctx, brw_extensions, GL_FALSE);
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index abb3024bfb..6a565f80cf 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -224,16 +224,12 @@ int intel_miptree_pitch_align (struct intel_context *intel,
if (!mt->compressed) {
int pitch_align;
- if (intel->ttm) {
- /* XXX: Align pitch to multiple of 64 bytes for now to allow
- * render-to-texture to work in all cases. This should probably be
- * replaced at some point by some scheme to only do this when really
- * necessary.
- */
- pitch_align = 64;
- } else {
- pitch_align = 4;
- }
+ /* XXX: Align pitch to multiple of 64 bytes for now to allow
+ * render-to-texture to work in all cases. This should probably be
+ * replaced at some point by some scheme to only do this when really
+ * necessary.
+ */
+ pitch_align = 64;
if (tiling == I915_TILING_X)
pitch_align = 512;
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 99330b6ddf..9572b67326 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -228,10 +228,9 @@ do_blit_bitmap( GLcontext *ctx,
UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[3], tmpColor[3]);
if (dst->cpp == 2)
- color = INTEL_PACKCOLOR565(ubcolor[0], ubcolor[1], ubcolor[2]);
+ color = PACK_COLOR_565(ubcolor[0], ubcolor[1], ubcolor[2]);
else
- color = INTEL_PACKCOLOR8888(ubcolor[0], ubcolor[1],
- ubcolor[2], ubcolor[3]);
+ color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]);
if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F))
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 80975163d4..d6b9dc4446 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -542,55 +542,18 @@ intel_recreate_static(struct intel_context *intel,
region->buffer = NULL;
}
- if (intel->ttm) {
- assert(region_desc->bo_handle != -1);
- region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
- name,
- region_desc->bo_handle);
-
- ret = dri_bo_get_tiling(region->buffer, &region->tiling,
- &region->bit_6_swizzle);
- if (ret != 0) {
- fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
- region_desc->bo_handle, name, strerror(-ret));
- intel_region_release(&region);
- return NULL;
- }
- } else {
- if (region->classic_map != NULL) {
- drmUnmap(region->classic_map,
- region->pitch * region->cpp * region->height);
- region->classic_map = NULL;
- }
- ret = drmMap(intel->driFd, region_desc->handle,
- region->pitch * region->cpp * region->height,
- &region->classic_map);
- if (ret != 0) {
- fprintf(stderr, "Failed to drmMap %s buffer\n", name);
- free(region);
- return NULL;
- }
-
- region->buffer = intel_bo_fake_alloc_static(intel->bufmgr,
+ assert(region_desc->bo_handle != -1);
+ region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,
name,
- region_desc->offset,
- region->pitch * region->cpp *
- region->height,
- region->classic_map);
-
- /* The sarea just gives us a boolean for whether it's tiled or not,
- * instead of which tiling mode it is. Guess.
- */
- if (region_desc->tiled) {
- if (intel->gen >= 4 && region_desc == &intelScreen->depth)
- region->tiling = I915_TILING_Y;
- else
- region->tiling = I915_TILING_X;
- } else {
- region->tiling = I915_TILING_NONE;
- }
+ region_desc->bo_handle);
- region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
+ ret = dri_bo_get_tiling(region->buffer, &region->tiling,
+ &region->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ region_desc->bo_handle, name, strerror(-ret));
+ intel_region_release(&region);
+ return NULL;
}
assert(region->buffer != NULL);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 789135b49f..2c5a884a9b 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -605,7 +605,6 @@ intelFillInModes(__DRIscreenPrivate *psp,
static GLboolean
intel_init_bufmgr(intelScreenPrivate *intelScreen)
{
- GLboolean gem_disable = getenv("INTEL_NO_GEM") != NULL;
int gem_kernel = 0;
GLboolean gem_supported;
struct drm_i915_getparam gp;
@@ -622,43 +621,24 @@ intel_init_bufmgr(intelScreenPrivate *intelScreen)
/* If we've got a new enough DDX that's initializing GEM and giving us
* object handles for the shared buffers, use that.
*/
- intelScreen->ttm = GL_FALSE;
if (intelScreen->driScrnPriv->dri2.enabled)
gem_supported = GL_TRUE;
else if (intelScreen->driScrnPriv->ddx_version.minor >= 9 &&
gem_kernel &&
intelScreen->front.bo_handle != -1)
gem_supported = GL_TRUE;
- else
- gem_supported = GL_FALSE;
-
- if (!gem_disable && gem_supported) {
- intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
- if (intelScreen->bufmgr != NULL)
- intelScreen->ttm = GL_TRUE;
+ else {
+ fprintf(stderr, "[%s:%u] Error initializing GEM.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
}
+
+ intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
/* Otherwise, use the classic buffer manager. */
if (intelScreen->bufmgr == NULL) {
- if (gem_disable) {
- _mesa_warning(NULL, "GEM disabled. Using classic.");
- } else {
- _mesa_warning(NULL,
- "Failed to initialize GEM. Falling back to classic.");
- }
-
- if (intelScreen->tex.size == 0) {
- fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
- __func__, __LINE__);
- return GL_FALSE;
- }
-
- intelScreen->bufmgr =
- intel_bufmgr_fake_init(spriv->fd,
- intelScreen->tex.offset,
- intelScreen->tex.map,
- intelScreen->tex.size,
- (unsigned int * volatile)
- &intelScreen->sarea->last_dispatch);
+ fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
+ __func__, __LINE__);
+ return GL_FALSE;
}
if (intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences))
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index a9b9e109a6..14ca0903b6 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -77,7 +77,6 @@ typedef struct
GLboolean no_hw;
GLboolean no_vbo;
- int ttm;
dri_bufmgr *bufmgr;
GLboolean kernel_exec_fencing;
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 3607c7dded..2c89a66a95 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -613,15 +613,7 @@ intel_set_span_functions(struct intel_context *intel,
struct gl_renderbuffer *rb)
{
struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb;
- uint32_t tiling;
-
- /* If in GEM mode, we need to do the tile address swizzling ourselves,
- * instead of the fence registers handling it.
- */
- if (intel->ttm)
- tiling = irb->region->tiling;
- else
- tiling = I915_TILING_NONE;
+ uint32_t tiling = irb->region->tiling;
if (intel->intelScreen->kernel_exec_fencing) {
switch (irb->texformat) {
@@ -673,6 +665,9 @@ intel_set_span_functions(struct intel_context *intel,
return;
}
+ /* If in GEM mode, we need to do the tile address swizzling ourselves,
+ * instead of the fence registers handling it.
+ */
switch (irb->texformat) {
case MESA_FORMAT_RGB565:
switch (tiling) {
diff --git a/src/mesa/drivers/dri/intel/intel_state.c b/src/mesa/drivers/dri/intel/intel_state.c
index 4ee742377d..aefae53eb2 100644
--- a/src/mesa/drivers/dri/intel/intel_state.c
+++ b/src/mesa/drivers/dri/intel/intel_state.c
@@ -196,25 +196,6 @@ intel_translate_logic_op(GLenum opcode)
}
}
-
-static void
-intelClearColor(GLcontext *ctx, const GLfloat color[4])
-{
- struct intel_context *intel = intel_context(ctx);
- GLubyte clear[4];
-
- CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
- CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
- CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
- CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
-
- /* compute both 32 and 16-bit clear values */
- intel->ClearColor8888 = INTEL_PACKCOLOR8888(clear[0], clear[1],
- clear[2], clear[3]);
- intel->ClearColor565 = INTEL_PACKCOLOR565(clear[0], clear[1], clear[2]);
-}
-
-
/* Fallback to swrast for select and feedback.
*/
static void
@@ -229,5 +210,4 @@ void
intelInitStateFuncs(struct dd_function_table *functions)
{
functions->RenderMode = intelRenderMode;
- functions->ClearColor = intelClearColor;
}
diff --git a/src/mesa/drivers/dri/mach64/mach64_native_vb.c b/src/mesa/drivers/dri/mach64/mach64_native_vb.c
index 99f1a14e17..816682ec5f 100644
--- a/src/mesa/drivers/dri/mach64/mach64_native_vb.c
+++ b/src/mesa/drivers/dri/mach64/mach64_native_vb.c
@@ -207,19 +207,19 @@ INTERP_QUALIFIER void TAG(interp_extras)( GLcontext *ctx,
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat));
+ if (VB->BackfaceColorPtr) {
+ assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));
INTERP_4F( t,
- GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], out),
- GET_COLOR(VB->ColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, out),
+ GET_COLOR(VB->BackfaceColorPtr, in) );
- if (VB->SecondaryColorPtr[1]) {
+ if (VB->BackfaceSecondaryColorPtr) {
INTERP_3F( t,
- GET_COLOR(VB->SecondaryColorPtr[1], dst),
- GET_COLOR(VB->SecondaryColorPtr[1], out),
- GET_COLOR(VB->SecondaryColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, out),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, in) );
}
}
@@ -236,13 +236,13 @@ INTERP_QUALIFIER void TAG(copy_pv_extras)( GLcontext *ctx,
LOCALVARS
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], src) );
+ if (VB->BackfaceColorPtr) {
+ COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, src) );
- if (VB->SecondaryColorPtr[1]) {
- COPY_4FV( GET_COLOR(VB->SecondaryColorPtr[1], dst),
- GET_COLOR(VB->SecondaryColorPtr[1], src) );
+ if (VB->BackfaceSecondaryColorPtr) {
+ COPY_4FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst),
+ GET_COLOR(VB->BackfaceSecondaryColorPtr, src) );
}
}
diff --git a/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h b/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h
index 684f2acc89..6e5fa3520e 100644
--- a/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h
+++ b/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h
@@ -103,10 +103,10 @@ static void TAG(emit)( GLcontext *ctx,
#if DO_TEX1
{
const GLuint t1 = GET_TEXSOURCE(1);
- tc1 = VB->TexCoordPtr[t1]->data;
- tc1_stride = VB->TexCoordPtr[t1]->stride;
+ tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;
#if DO_PTEX
- tc1_size = VB->TexCoordPtr[t1]->size;
+ tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;
#endif
}
#endif
@@ -114,18 +114,18 @@ static void TAG(emit)( GLcontext *ctx,
#if DO_TEX0
{
const GLuint t0 = GET_TEXSOURCE(0);
- tc0 = VB->TexCoordPtr[t0]->data;
- tc0_stride = VB->TexCoordPtr[t0]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;
#if DO_PTEX
- tc0_size = VB->TexCoordPtr[t0]->size;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;
#endif
}
#endif
#if DO_SPEC
- if (VB->SecondaryColorPtr[0]) {
- spec = VB->SecondaryColorPtr[0]->data;
- spec_stride = VB->SecondaryColorPtr[0]->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
+ spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
+ spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
} else {
spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];
spec_stride = 0;
@@ -133,9 +133,9 @@ static void TAG(emit)( GLcontext *ctx,
#endif
#if DO_FOG
- if (VB->FogCoordPtr) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_FOG]) {
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
} else {
static GLfloat tmp[4] = {0, 0, 0, 0};
fog = &tmp;
@@ -144,8 +144,8 @@ static void TAG(emit)( GLcontext *ctx,
#endif
#if DO_RGBA
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
#endif
coord = VB->NdcPtr->data;
@@ -319,8 +319,8 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* Force 'missing' texcoords to something valid.
*/
- if (DO_TEX1 && VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
if (DO_PTEX)
return GL_TRUE;
@@ -328,12 +328,12 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* No hardware support for projective texture. Can fake it for
* TEX0 only.
*/
- if ((DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) {
+ if ((DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {
PTEX_FALLBACK();
return GL_FALSE;
}
- if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) {
+ if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {
if (DO_TEX1) {
PTEX_FALLBACK();
}
diff --git a/src/mesa/drivers/dri/mach64/mach64_vbtmp.h b/src/mesa/drivers/dri/mach64/mach64_vbtmp.h
index 938804af9e..60bfab8f6d 100644
--- a/src/mesa/drivers/dri/mach64/mach64_vbtmp.h
+++ b/src/mesa/drivers/dri/mach64/mach64_vbtmp.h
@@ -156,53 +156,53 @@ static void TAG(emit)( GLcontext *ctx,
if (DO_TEX3) {
const GLuint t3 = GET_TEXSOURCE(3);
- tc3 = VB->TexCoordPtr[t3]->data;
- tc3_stride = VB->TexCoordPtr[t3]->stride;
+ tc3 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->data;
+ tc3_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->stride;
if (DO_PTEX)
- tc3_size = VB->TexCoordPtr[t3]->size;
+ tc3_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->size;
}
if (DO_TEX2) {
const GLuint t2 = GET_TEXSOURCE(2);
- tc2 = VB->TexCoordPtr[t2]->data;
- tc2_stride = VB->TexCoordPtr[t2]->stride;
+ tc2 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data;
+ tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride;
if (DO_PTEX)
- tc2_size = VB->TexCoordPtr[t2]->size;
+ tc2_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size;
}
if (DO_TEX1) {
const GLuint t1 = GET_TEXSOURCE(1);
- tc1 = VB->TexCoordPtr[t1]->data;
- tc1_stride = VB->TexCoordPtr[t1]->stride;
+ tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;
if (DO_PTEX)
- tc1_size = VB->TexCoordPtr[t1]->size;
+ tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;
}
if (DO_TEX0) {
const GLuint t0 = GET_TEXSOURCE(0);
- tc0_stride = VB->TexCoordPtr[t0]->stride;
- tc0 = VB->TexCoordPtr[t0]->data;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;
if (DO_PTEX)
- tc0_size = VB->TexCoordPtr[t0]->size;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;
}
if (DO_RGBA) {
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
}
if (DO_SPEC) {
- spec = VB->SecondaryColorPtr[0]->data;
- spec_stride = VB->SecondaryColorPtr[0]->stride;
+ spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
+ spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
} else {
spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];
spec_stride = 0;
}
if (DO_FOG) {
- if (VB->FogCoordPtr) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_FOG]) {
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
} else {
static GLfloat tmp[4] = {0, 0, 0, 0};
fog = &tmp;
@@ -384,8 +384,8 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end,
ASSERT(stride == 4);
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
/* Pack what's left into a 4-dword vertex. Color is in a different
* place, and there is no 'w' coordinate.
@@ -432,8 +432,8 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end,
GLfloat *v = (GLfloat *)dest;
int i;
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
if (start)
STRIDE_4F(col, col_stride * start);
@@ -473,22 +473,22 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* Force 'missing' texcoords to something valid.
*/
- if (DO_TEX3 && VB->TexCoordPtr[2] == 0)
- VB->TexCoordPtr[2] = VB->TexCoordPtr[3];
+ if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3];
- if (DO_TEX2 && VB->TexCoordPtr[1] == 0)
- VB->TexCoordPtr[1] = VB->TexCoordPtr[2];
+ if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2];
- if (DO_TEX1 && VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
if (DO_PTEX)
return GL_TRUE;
- if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) ||
- (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) ||
- (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4) ||
- (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4))
+ if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) ||
+ (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) ||
+ (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4) ||
+ (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4))
return GL_FALSE;
return GL_TRUE;
@@ -501,14 +501,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* Force 'missing' texcoords to something valid.
*/
- if (DO_TEX3 && VB->TexCoordPtr[2] == 0)
- VB->TexCoordPtr[2] = VB->TexCoordPtr[3];
+ if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3];
- if (DO_TEX2 && VB->TexCoordPtr[1] == 0)
- VB->TexCoordPtr[1] = VB->TexCoordPtr[2];
+ if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2];
- if (DO_TEX1 && VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
if (DO_PTEX)
return GL_TRUE;
@@ -516,14 +516,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
/* No hardware support for projective texture. Can fake it for
* TEX0 only.
*/
- if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) ||
- (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) ||
- (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) {
+ if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) ||
+ (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) ||
+ (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {
PTEX_FALLBACK();
return GL_FALSE;
}
- if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) {
+ if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {
if (DO_TEX1 || DO_TEX2 || DO_TEX3) {
PTEX_FALLBACK();
}
diff --git a/src/mesa/drivers/dri/r128/r128_tris.c b/src/mesa/drivers/dri/r128/r128_tris.c
index 5b91271d74..448e34e047 100644
--- a/src/mesa/drivers/dri/r128/r128_tris.c
+++ b/src/mesa/drivers/dri/r128/r128_tris.c
@@ -650,12 +650,12 @@ static void r128RenderStart( GLcontext *ctx )
}
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[0]) )) {
- if ( VB->TexCoordPtr[rmesa->tmu_source[0]]->size > 2 )
+ if ( VB->AttribPtr[_TNL_ATTRIB_TEX0 + rmesa->tmu_source[0]]->size > 2 )
fallback_projtex = GL_TRUE;
EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_2F, R128_CCE_VC_FRMT_S_T, 8 );
}
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[1]) )) {
- if ( VB->TexCoordPtr[rmesa->tmu_source[1]]->size > 2 )
+ if ( VB->AttribPtr[_TNL_ATTRIB_TEX0 + rmesa->tmu_source[1]]->size > 2 )
fallback_projtex = GL_TRUE;
EMIT_ATTR( _TNL_ATTRIB_TEX1, EMIT_2F, R128_CCE_VC_FRMT_S2_T2, 8 );
}
diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c
index 240fb45078..fadc766b49 100644
--- a/src/mesa/drivers/dri/r200/r200_swtcl.c
+++ b/src/mesa/drivers/dri/r200/r200_swtcl.c
@@ -168,7 +168,7 @@ static void r200SetVertexFormat( GLcontext *ctx )
for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
- GLuint sz = VB->TexCoordPtr[i]->size;
+ GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
fmt_1 |= sz << (3 * i);
EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_1F + sz - 1, 0 );
diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c
index ee2c71e1a7..99bd22edac 100644
--- a/src/mesa/drivers/dri/r300/r300_swtcl.c
+++ b/src/mesa/drivers/dri/r300/r300_swtcl.c
@@ -124,7 +124,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
}
if (ctx->Light.Enabled && ctx->Light.Model.TwoSide) {
- VB->AttribPtr[VERT_ATTRIB_GENERIC0] = VB->ColorPtr[1];
+ VB->AttribPtr[VERT_ATTRIB_GENERIC0] = VB->BackfaceColorPtr;
OutputsWritten |= 1 << VERT_RESULT_BFC0;
#if MESA_LITTLE_ENDIAN
EMIT_ATTR( _TNL_ATTRIB_GENERIC0, EMIT_4UB_4F_RGBA );
@@ -134,7 +134,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
ADD_ATTR(VERT_ATTRIB_GENERIC0, R300_DATA_TYPE_BYTE, SWTCL_OVM_COLOR2, SWIZZLE_XYZW, MASK_XYZW, 1);
#endif
if (fp_reads & FRAG_BIT_COL1) {
- VB->AttribPtr[VERT_ATTRIB_GENERIC1] = VB->SecondaryColorPtr[1];
+ VB->AttribPtr[VERT_ATTRIB_GENERIC1] = VB->BackfaceSecondaryColorPtr;
GLuint swiz = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE);
OutputsWritten |= 1 << VERT_RESULT_BFC1;
#if MESA_LITTLE_ENDIAN
@@ -159,7 +159,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
int tex_id = rmesa->selected_fp->wpos_attr - FRAG_ATTRIB_TEX0;
VB->AttribPtr[VERT_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_POS];
- VB->TexCoordPtr[tex_id] = VB->AttribPtr[VERT_ATTRIB_POS];
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_POS];
RENDERINPUTS_SET(tnl->render_inputs_bitset, _TNL_ATTRIB_TEX0 + tex_id);
}
@@ -167,7 +167,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
int tex_id = rmesa->selected_fp->fog_attr - FRAG_ATTRIB_TEX0;
VB->AttribPtr[VERT_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG];
- VB->TexCoordPtr[tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG];
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG];
RENDERINPUTS_SET(tnl->render_inputs_bitset, _TNL_ATTRIB_TEX0 + tex_id);
}
@@ -180,7 +180,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_
GLuint swiz, format, hw_format;
for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
if (fp_reads & FRAG_BIT_TEX(i)) {
- switch (VB->TexCoordPtr[i]->size) {
+ switch (VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size) {
case 1:
format = EMIT_1F;
hw_format = R300_DATA_TYPE_FLOAT_1;
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
index 08e1c5d00d..de18d2ddd6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
@@ -196,12 +196,12 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.obj.buf)
rcommon_emit_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->ObjPtr->data,
- VB->ObjPtr->size,
- VB->ObjPtr->stride,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_POS]->data,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->size,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->stride,
count);
- switch( VB->ObjPtr->size ) {
+ switch( VB->AttribPtr[_TNL_ATTRIB_POS]->size ) {
case 4: vfmt |= RADEON_CP_VC_FRMT_W0;
case 3: vfmt |= RADEON_CP_VC_FRMT_Z;
case 2: vfmt |= RADEON_CP_VC_FRMT_XY;
@@ -216,9 +216,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.norm.buf)
rcommon_emit_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->NormalPtr->data,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_NORMAL]->data,
3,
- VB->NormalPtr->stride,
+ VB->AttribPtr[_TNL_ATTRIB_NORMAL]->stride,
count);
vfmt |= RADEON_CP_VC_FRMT_N0;
@@ -227,9 +227,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (inputs & VERT_BIT_COLOR0) {
int emitsize;
- if (VB->ColorPtr[0]->size == 4 &&
- (VB->ColorPtr[0]->stride != 0 ||
- VB->ColorPtr[0]->data[0][3] != 1.0)) {
+ if (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size == 4 &&
+ (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride != 0 ||
+ VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data[0][3] != 1.0)) {
vfmt |= RADEON_CP_VC_FRMT_FPCOLOR | RADEON_CP_VC_FRMT_FPALPHA;
emitsize = 4;
}
@@ -242,9 +242,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.rgba.buf)
rcommon_emit_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->ColorPtr[0]->data,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data,
emitsize,
- VB->ColorPtr[0]->stride,
+ VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride,
count);
nr++;
@@ -256,9 +256,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
rcommon_emit_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->SecondaryColorPtr[0]->data,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data,
3,
- VB->SecondaryColorPtr[0]->stride,
+ VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride,
count);
}
@@ -273,8 +273,8 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.fog.buf)
emit_vecfog( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->FogCoordPtr->data,
- VB->FogCoordPtr->stride,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_FOG]->data,
+ VB->AttribPtr[_TNL_ATTRIB_FOG]->stride,
count);
vfmt |= RADEON_CP_VC_FRMT_FPFOG;
@@ -290,24 +290,24 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (!rmesa->tcl.tex[unit].buf)
emit_tex_vector( ctx,
&(rmesa->tcl.aos[nr]),
- (char *)VB->TexCoordPtr[unit]->data,
- VB->TexCoordPtr[unit]->size,
- VB->TexCoordPtr[unit]->stride,
+ (char *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->data,
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size,
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->stride,
count );
nr++;
vfmt |= RADEON_ST_BIT(unit);
/* assume we need the 3rd coord if texgen is active for r/q OR at least
3 coords are submitted. This may not be 100% correct */
- if (VB->TexCoordPtr[unit]->size >= 3) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) {
vtx |= RADEON_Q_BIT(unit);
vfmt |= RADEON_Q_BIT(unit);
}
if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) )
vtx |= RADEON_Q_BIT(unit);
- else if ((VB->TexCoordPtr[unit]->size >= 3) &&
+ else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) &&
((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) {
- GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3);
+ GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3);
if (((rmesa->NeedTexMatrix >> unit) & 1) &&
(swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1)))
radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ;
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
index 515783135d..d764ccb982 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
@@ -56,18 +56,18 @@ static void TAG(emit)( GLcontext *ctx,
radeon_print(RADEON_SWRENDER, RADEON_VERBOSE, "%s\n", __FUNCTION__);
- coord = (GLuint (*)[4])VB->ObjPtr->data;
- coord_stride = VB->ObjPtr->stride;
+ coord = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_POS]->data;
+ coord_stride = VB->AttribPtr[_TNL_ATTRIB_POS]->stride;
if (DO_TEX2) {
- if (VB->TexCoordPtr[2]) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX2]) {
const GLuint t2 = GET_TEXSOURCE(2);
- tc2 = (GLuint (*)[4])VB->TexCoordPtr[t2]->data;
- tc2_stride = VB->TexCoordPtr[t2]->stride;
- if (DO_PTEX && VB->TexCoordPtr[t2]->size < 3) {
+ tc2 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data;
+ tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride;
+ if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 3) {
fill_tex |= (1<<2);
}
- else if (DO_PTEX && VB->TexCoordPtr[t2]->size < 4) {
+ else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 4) {
rqcoordsnoswap |= (1<<2);
}
} else {
@@ -77,14 +77,14 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_TEX1) {
- if (VB->TexCoordPtr[1]) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) {
const GLuint t1 = GET_TEXSOURCE(1);
- tc1 = (GLuint (*)[4])VB->TexCoordPtr[t1]->data;
- tc1_stride = VB->TexCoordPtr[t1]->stride;
- if (DO_PTEX && VB->TexCoordPtr[t1]->size < 3) {
+ tc1 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;
+ if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 3) {
fill_tex |= (1<<1);
}
- else if (DO_PTEX && VB->TexCoordPtr[t1]->size < 4) {
+ else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 4) {
rqcoordsnoswap |= (1<<1);
}
} else {
@@ -94,14 +94,14 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_TEX0) {
- if (VB->TexCoordPtr[0]) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) {
const GLuint t0 = GET_TEXSOURCE(0);
- tc0_stride = VB->TexCoordPtr[t0]->stride;
- tc0 = (GLuint (*)[4])VB->TexCoordPtr[t0]->data;
- if (DO_PTEX && VB->TexCoordPtr[t0]->size < 3) {
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;
+ tc0 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;
+ if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size < 3) {
fill_tex |= (1<<0);
}
- else if (DO_PTEX && VB->TexCoordPtr[t0]->size < 4) {
+ else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size < 4) {
rqcoordsnoswap |= (1<<0);
}
} else {
@@ -112,9 +112,9 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_NORM) {
- if (VB->NormalPtr) {
- norm_stride = VB->NormalPtr->stride;
- norm = (GLuint (*)[4])VB->NormalPtr->data;
+ if (VB->AttribPtr[_TNL_ATTRIB_NORMAL]) {
+ norm_stride = VB->AttribPtr[_TNL_ATTRIB_NORMAL]->stride;
+ norm = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_NORMAL]->data;
} else {
norm_stride = 0;
norm = (GLuint (*)[4])&ctx->Current.Attrib[VERT_ATTRIB_NORMAL];
@@ -122,9 +122,9 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_RGBA) {
- if (VB->ColorPtr[0]) {
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_COLOR0]) {
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
} else {
col = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR0];
col_stride = 0;
@@ -132,9 +132,9 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_SPEC_OR_FOG) {
- if (VB->SecondaryColorPtr[0]) {
- spec = VB->SecondaryColorPtr[0]->data;
- spec_stride = VB->SecondaryColorPtr[0]->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {
+ spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;
+ spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;
} else {
spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];
spec_stride = 0;
@@ -142,9 +142,9 @@ static void TAG(emit)( GLcontext *ctx,
}
if (DO_SPEC_OR_FOG) {
- if (VB->FogCoordPtr) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ if (VB->AttribPtr[_TNL_ATTRIB_FOG]) {
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
} else {
fog = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_FOG];
fog_stride = 0;
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
index 78ec119302..5ed11d0a9d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
@@ -326,7 +326,7 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
if (1) {
req |= RADEON_CP_VC_FRMT_Z;
- if (VB->ObjPtr->size == 4) {
+ if (VB->AttribPtr[_TNL_ATTRIB_POS]->size == 4) {
req |= RADEON_CP_VC_FRMT_W0;
}
}
@@ -348,15 +348,15 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
req |= RADEON_ST_BIT(unit);
/* assume we need the 3rd coord if texgen is active for r/q OR at least
3 coords are submitted. This may not be 100% correct */
- if (VB->TexCoordPtr[unit]->size >= 3) {
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) {
req |= RADEON_Q_BIT(unit);
vtx |= RADEON_Q_BIT(unit);
}
if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) )
vtx |= RADEON_Q_BIT(unit);
- else if ((VB->TexCoordPtr[unit]->size >= 3) &&
+ else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) &&
((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) {
- GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3);
+ GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3);
if (((rmesa->NeedTexMatrix >> unit) & 1) &&
(swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1)))
radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ;
@@ -390,19 +390,19 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
* this, add more vertex code (for obj-2, obj-3) or preferably move
* to maos.
*/
- if (VB->ObjPtr->size < 3 ||
- (VB->ObjPtr->size == 3 &&
+ if (VB->AttribPtr[_TNL_ATTRIB_POS]->size < 3 ||
+ (VB->AttribPtr[_TNL_ATTRIB_POS]->size == 3 &&
(setup_tab[i].vertex_format & RADEON_CP_VC_FRMT_W0))) {
_math_trans_4f( rmesa->tcl.ObjClean.data,
- VB->ObjPtr->data,
- VB->ObjPtr->stride,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->data,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->stride,
GL_FLOAT,
- VB->ObjPtr->size,
+ VB->AttribPtr[_TNL_ATTRIB_POS]->size,
0,
VB->Count );
- switch (VB->ObjPtr->size) {
+ switch (VB->AttribPtr[_TNL_ATTRIB_POS]->size) {
case 1:
_mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 1);
case 2:
@@ -416,7 +416,7 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
break;
}
- VB->ObjPtr = &rmesa->tcl.ObjClean;
+ VB->AttribPtr[_TNL_ATTRIB_POS] = &rmesa->tcl.ObjClean;
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index e61f59eaea..6bbe8e252e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -179,7 +179,7 @@ static void radeonSetVertexFormat( GLcontext *ctx )
for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
- GLuint sz = VB->TexCoordPtr[i]->size;
+ GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;
switch (sz) {
case 1:
diff --git a/src/mesa/drivers/dri/savage/savagerender.c b/src/mesa/drivers/dri/savage/savagerender.c
index 32c74f9467..8221edf387 100644
--- a/src/mesa/drivers/dri/savage/savagerender.c
+++ b/src/mesa/drivers/dri/savage/savagerender.c
@@ -252,13 +252,13 @@ static GLboolean run_texnorm_stage( GLcontext *ctx,
const GLboolean normalizeS = (texObj->WrapS == GL_REPEAT);
const GLboolean normalizeT = (reallyEnabled & TEXTURE_2D_BIT) &&
(texObj->WrapT == GL_REPEAT);
- const GLfloat *in = (GLfloat *)VB->TexCoordPtr[i]->data;
- const GLint instride = VB->TexCoordPtr[i]->stride;
+ const GLfloat *in = (GLfloat *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->data;
+ const GLint instride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->stride;
GLfloat (*out)[4] = store->texcoord[i].data;
GLint j;
if (!ctx->Texture.Unit[i]._ReallyEnabled ||
- VB->TexCoordPtr[i]->size == 4)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size == 4)
/* Never try to normalize homogenous tex coords! */
continue;
@@ -297,7 +297,7 @@ static GLboolean run_texnorm_stage( GLcontext *ctx,
}
if (normalizeS || normalizeT)
- VB->AttribPtr[VERT_ATTRIB_TEX0+i] = VB->TexCoordPtr[i] = &store->texcoord[i];
+ VB->AttribPtr[_TNL_ATTRIB_TEX0 + i] = &store->texcoord[i];
}
}
diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c
index c04763b40e..e9529d1939 100644
--- a/src/mesa/drivers/dri/savage/savagetris.c
+++ b/src/mesa/drivers/dri/savage/savagetris.c
@@ -879,13 +879,13 @@ static GLboolean savageCheckPTexHack( GLcontext *ctx )
RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
- if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) {
+ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) {
if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX ))
return GL_TRUE; /* apply ptex hack */
else
FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE);
}
- if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4)
+ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)
FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE);
return GL_FALSE; /* don't apply ptex hack */
@@ -976,13 +976,13 @@ static INLINE GLuint savageChooseVertexFormat_s3d( GLcontext *ctx )
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) {
if (imesa->ptexHack)
EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_3F_XYW, SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0);
- else if (VB->TexCoordPtr[0]->size == 4)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)
assert (0); /* should be caught by savageCheckPTexHack */
- else if (VB->TexCoordPtr[0]->size >= 2)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size >= 2)
/* The chromium menu emits some 3D tex coords even though no
* 3D texture is enabled. Ignore the 3rd coordinate. */
EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_2F, SAVAGE_EMIT_ST0, SAVAGE_SKIP_ST0 );
- else if (VB->TexCoordPtr[0]->size == 1) {
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 1) {
EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_1F, SAVAGE_EMIT_S0, SAVAGE_SKIP_S0 );
EMIT_PAD( 4 );
} else
@@ -1025,9 +1025,9 @@ static INLINE GLuint savageChooseVertexFormat_s4( GLcontext *ctx )
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) {
if (imesa->ptexHack)
NEED_ATTR( SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0);
- else if (VB->TexCoordPtr[0]->size == 4)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)
assert (0); /* should be caught by savageCheckPTexHack */
- else if (VB->TexCoordPtr[0]->size >= 2)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size >= 2)
/* The chromium menu emits some 3D tex coords even though no
* 3D texture is enabled. Ignore the 3rd coordinate. */
NEED_ATTR( SAVAGE_EMIT_ST0, SAVAGE_SKIP_ST0 );
@@ -1035,10 +1035,10 @@ static INLINE GLuint savageChooseVertexFormat_s4( GLcontext *ctx )
NEED_ATTR( SAVAGE_EMIT_S0, SAVAGE_SKIP_S0 );
}
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) {
- if (VB->TexCoordPtr[1]->size == 4)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)
/* projective textures are not supported by the hardware */
assert (0); /* should be caught by savageCheckPTexHack */
- else if (VB->TexCoordPtr[1]->size >= 2)
+ else if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size >= 2)
NEED_ATTR( SAVAGE_EMIT_ST1, SAVAGE_SKIP_ST1 );
else
NEED_ATTR( SAVAGE_EMIT_S1, SAVAGE_SKIP_S1 );
diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c
index 76d12d07b3..3cf10007b5 100644
--- a/src/mesa/drivers/dri/sis/sis_tris.c
+++ b/src/mesa/drivers/dri/sis/sis_tris.c
@@ -903,14 +903,14 @@ static void sisRenderStart( GLcontext *ctx )
/* projective textures are not supported by the hardware */
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) {
- if (VB->TexCoordPtr[0]->size > 2)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size > 2)
tex_fallback = GL_TRUE;
EMIT_ATTR(_TNL_ATTRIB_TEX0, EMIT_2F);
AGPParseSet |= SiS_PS_HAS_UV0;
}
/* Will only hit tex1 on SiS300 */
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) {
- if (VB->TexCoordPtr[1]->size > 2)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size > 2)
tex_fallback = GL_TRUE;
EMIT_ATTR(_TNL_ATTRIB_TEX1, EMIT_2F);
AGPParseSet |= SiS_PS_HAS_UV1;
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vb.c b/src/mesa/drivers/dri/tdfx/tdfx_vb.c
index 4928802232..c200ba3255 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_vb.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_vb.c
@@ -69,11 +69,11 @@ static void interp_extras( GLcontext *ctx,
/*fprintf(stderr, "%s\n", __FUNCTION__);*/
- if (VB->ColorPtr[1]) {
+ if (VB->BackfaceColorPtr) {
INTERP_4F( t,
- GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], out),
- GET_COLOR(VB->ColorPtr[1], in) );
+ GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, out),
+ GET_COLOR(VB->BackfaceColorPtr, in) );
}
if (VB->EdgeFlag) {
@@ -88,9 +88,9 @@ static void copy_pv_extras( GLcontext *ctx, GLuint dst, GLuint src )
{
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
- if (VB->ColorPtr[1]) {
- COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst),
- GET_COLOR(VB->ColorPtr[1], src) );
+ if (VB->BackfaceColorPtr) {
+ COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst),
+ GET_COLOR(VB->BackfaceColorPtr, src) );
}
setup_tab[TDFX_CONTEXT(ctx)->SetupIndex].copy_pv(ctx, dst, src);
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h b/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h
index 9b780761f4..19baf7d0d2 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h
@@ -58,32 +58,32 @@ static void TAG(emit)( GLcontext *ctx,
/* fprintf(stderr, "%s\n", __FUNCTION__); */
if (IND & TDFX_TEX0_BIT) {
- tc0_stride = VB->TexCoordPtr[tmu0_source]->stride;
- tc0 = VB->TexCoordPtr[tmu0_source]->data;
+ tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->stride;
+ tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->data;
u0scale = fxMesa->sScale0;
v0scale = fxMesa->tScale0;
if (IND & TDFX_PTEX_BIT)
- tc0_size = VB->TexCoordPtr[tmu0_source]->size;
+ tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->size;
}
if (IND & TDFX_TEX1_BIT) {
- tc1 = VB->TexCoordPtr[tmu1_source]->data;
- tc1_stride = VB->TexCoordPtr[tmu1_source]->stride;
+ tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->data;
+ tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->stride;
u1scale = fxMesa->sScale1;
v1scale = fxMesa->tScale1;
if (IND & TDFX_PTEX_BIT)
- tc1_size = VB->TexCoordPtr[tmu1_source]->size;
+ tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->size;
}
if (IND & TDFX_RGBA_BIT) {
- col = VB->ColorPtr[0]->data;
- col_stride = VB->ColorPtr[0]->stride;
- col_size = VB->ColorPtr[0]->size;
+ col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;
+ col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;
+ col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
}
if (IND & TDFX_FOGC_BIT) {
- fog = VB->FogCoordPtr->data;
- fog_stride = VB->FogCoordPtr->stride;
+ fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data;
+ fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;
}
{
@@ -168,14 +168,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
if (IND & TDFX_TEX1_BIT) {
- if (VB->TexCoordPtr[0] == 0)
- VB->TexCoordPtr[0] = VB->TexCoordPtr[1];
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0)
+ VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];
- if (VB->TexCoordPtr[1]->size == 4)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)
return GL_FALSE;
}
- if (VB->TexCoordPtr[0]->size == 4)
+ if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)
return GL_FALSE;
}
diff --git a/src/mesa/drivers/dri/unichrome/via_tris.c b/src/mesa/drivers/dri/unichrome/via_tris.c
index 79e67620c9..ab457d41dc 100644
--- a/src/mesa/drivers/dri/unichrome/via_tris.c
+++ b/src/mesa/drivers/dri/unichrome/via_tris.c
@@ -832,13 +832,13 @@ static GLboolean viaCheckPTexHack( GLcontext *ctx )
RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
- if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) {
+ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) {
if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX ))
ptexHack = GL_TRUE;
else
fallback = GL_TRUE;
}
- if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4)
+ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)
fallback = GL_TRUE;
FALLBACK(VIA_CONTEXT(ctx), VIA_FALLBACK_PROJ_TEXTURE, fallback);