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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-09-17 11:17:26 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2010-09-28 15:58:19 +0800
commitb016a78b983295c112421c01d378fbe2862412d4 (patch)
tree9216bc15fd03cf005ffbbfcbef320cb5fa455cb1 /src/mesa/drivers/dri
parentbf60f3593452f6ab6340c7a8737cc74f223f2a62 (diff)
i965: new state dump for sandybridge
Dump new state object on sandybridge for cc viewport, clip viewport, depth stencil, cc and blend state.
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_dump.c140
1 files changed, 135 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state_dump.c b/src/mesa/drivers/dri/i965/brw_state_dump.c
index d410861bdf..b79b33c2e3 100644
--- a/src/mesa/drivers/dri/i965/brw_state_dump.c
+++ b/src/mesa/drivers/dri/i965/brw_state_dump.c
@@ -161,6 +161,123 @@ static void dump_sf_viewport_state(struct brw_context *brw)
drm_intel_bo_unmap(brw->sf.vp_bo);
}
+static void dump_clip_viewport_state(struct brw_context *brw)
+{
+ const char *name = "CLIP VP";
+ struct brw_clipper_viewport *vp;
+ uint32_t vp_off;
+
+ if (brw->clip.vp_bo == NULL)
+ return;
+
+ drm_intel_bo_map(brw->clip.vp_bo, GL_FALSE);
+
+ vp = brw->clip.vp_bo->virtual;
+ vp_off = brw->clip.vp_bo->offset;
+
+ state_out(name, vp, vp_off, 0, "xmin = %f\n", vp->xmin);
+ state_out(name, vp, vp_off, 1, "xmax = %f\n", vp->xmax);
+ state_out(name, vp, vp_off, 2, "ymin = %f\n", vp->ymin);
+ state_out(name, vp, vp_off, 3, "ymax = %f\n", vp->ymax);
+ drm_intel_bo_unmap(brw->clip.vp_bo);
+}
+
+static void dump_cc_viewport_state(struct brw_context *brw)
+{
+ const char *name = "CC VP";
+ struct brw_cc_viewport *vp;
+ uint32_t vp_off;
+
+ if (brw->cc.vp_bo == NULL)
+ return;
+
+ drm_intel_bo_map(brw->cc.vp_bo, GL_FALSE);
+
+ vp = brw->cc.vp_bo->virtual;
+ vp_off = brw->cc.vp_bo->offset;
+
+ state_out(name, vp, vp_off, 0, "min_depth = %f\n", vp->min_depth);
+ state_out(name, vp, vp_off, 1, "max_depth = %f\n", vp->max_depth);
+ drm_intel_bo_unmap(brw->cc.vp_bo);
+}
+
+static void dump_depth_stencil_state(struct brw_context *brw)
+{
+ const char *name = "DEPTH STENCIL";
+ struct gen6_depth_stencil_state *ds;
+ uint32_t ds_off;
+
+ if (brw->cc.depth_stencil_state_bo == NULL)
+ return;
+
+ drm_intel_bo_map(brw->cc.depth_stencil_state_bo, GL_FALSE);
+
+ ds = brw->cc.depth_stencil_state_bo->virtual;
+ ds_off = brw->cc.depth_stencil_state_bo->offset;
+
+ state_out(name, ds, ds_off, 0, "stencil %sable, func %d, write %sable\n",
+ ds->ds0.stencil_enable ? "en" : "dis",
+ ds->ds0.stencil_func,
+ ds->ds0.stencil_write_enable ? "en" : "dis");
+ state_out(name, ds, ds_off, 1, "stencil test mask 0x%x, write mask 0x%x\n",
+ ds->ds1.stencil_test_mask, ds->ds1.stencil_write_mask);
+ state_out(name, ds, ds_off, 2, "depth test %sable, func %d, write %sable\n",
+ ds->ds2.depth_test_enable ? "en" : "dis",
+ ds->ds2.depth_test_func,
+ ds->ds2.depth_write_enable ? "en" : "dis");
+ drm_intel_bo_unmap(brw->cc.depth_stencil_state_bo);
+}
+
+static void dump_cc_state(struct brw_context *brw)
+{
+ const char *name = "CC";
+ struct gen6_color_calc_state *cc;
+ uint32_t cc_off;
+
+ if (brw->cc.state_bo == NULL)
+ return;
+
+ drm_intel_bo_map(brw->cc.state_bo, GL_FALSE);
+ cc = brw->cc.state_bo->virtual;
+ cc_off = brw->cc.state_bo->offset;
+
+ state_out(name, cc, cc_off, 0, "alpha test format %s, round disable %d, stencil ref %d,"
+ "bf stencil ref %d\n",
+ cc->cc0.alpha_test_format ? "FLOAT32" : "UNORM8",
+ cc->cc0.round_disable,
+ cc->cc0.stencil_ref,
+ cc->cc0.bf_stencil_ref);
+ state_out(name, cc, cc_off, 1, "\n");
+ state_out(name, cc, cc_off, 2, "constant red %f\n", cc->constant_r);
+ state_out(name, cc, cc_off, 3, "constant green %f\n", cc->constant_g);
+ state_out(name, cc, cc_off, 4, "constant blue %f\n", cc->constant_b);
+ state_out(name, cc, cc_off, 5, "constant alpha %f\n", cc->constant_a);
+
+ drm_intel_bo_unmap(brw->cc.state_bo);
+
+}
+
+static void dump_blend_state(struct brw_context *brw)
+{
+ const char *name = "BLEND";
+ struct gen6_blend_state *blend;
+ uint32_t blend_off;
+
+ if (brw->cc.blend_state_bo == NULL)
+ return;
+
+ drm_intel_bo_map(brw->cc.blend_state_bo, GL_FALSE);
+
+ blend = brw->cc.blend_state_bo->virtual;
+ blend_off = brw->cc.blend_state_bo->offset;
+
+ state_out(name, blend, blend_off, 0, "\n");
+ state_out(name, blend, blend_off, 1, "\n");
+
+ drm_intel_bo_unmap(brw->cc.blend_state_bo);
+
+}
+
static void brw_debug_prog(const char *name, drm_intel_bo *prog)
{
unsigned int i;
@@ -208,16 +325,29 @@ void brw_debug_batch(struct intel_context *intel)
state_struct_out("WM bind", brw->wm.bind_bo, 4 * brw->wm.nr_surfaces);
dump_wm_surface_state(brw);
- state_struct_out("VS", brw->vs.state_bo, sizeof(struct brw_vs_unit_state));
+ if (intel->gen < 6)
+ state_struct_out("VS", brw->vs.state_bo, sizeof(struct brw_vs_unit_state));
brw_debug_prog("VS prog", brw->vs.prog_bo);
- state_struct_out("GS", brw->gs.state_bo, sizeof(struct brw_gs_unit_state));
+ if (intel->gen < 6)
+ state_struct_out("GS", brw->gs.state_bo, sizeof(struct brw_gs_unit_state));
brw_debug_prog("GS prog", brw->gs.prog_bo);
- state_struct_out("SF", brw->sf.state_bo, sizeof(struct brw_sf_unit_state));
+ if (intel->gen < 6) {
+ state_struct_out("SF", brw->sf.state_bo, sizeof(struct brw_sf_unit_state));
+ brw_debug_prog("SF prog", brw->sf.prog_bo);
+ }
dump_sf_viewport_state(brw);
- brw_debug_prog("SF prog", brw->sf.prog_bo);
- state_struct_out("WM", brw->wm.state_bo, sizeof(struct brw_wm_unit_state));
+ if (intel->gen < 6)
+ state_struct_out("WM", brw->wm.state_bo, sizeof(struct brw_wm_unit_state));
brw_debug_prog("WM prog", brw->wm.prog_bo);
+
+ if (intel->gen >= 6) {
+ dump_cc_viewport_state(brw);
+ dump_clip_viewport_state(brw);
+ dump_depth_stencil_state(brw);
+ dump_cc_state(brw);
+ dump_blend_state(brw);
+ }
}