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authorEric Anholt <eric@anholt.net>2010-06-04 15:34:31 -0700
committerEric Anholt <eric@anholt.net>2010-06-08 13:42:02 -0700
commit4527faa3440ffbd4a4ecc356630071fa1e94e7e8 (patch)
treede101c7d4067d46f12d9f030ecc1df69d19cf8f5 /src/mesa/drivers
parent551467d4ef28786597cc215e9b7159e70a8e742c (diff)
intel: Update comment in intel_tex_copy from before miptree x/y rework.
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_copy.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index ddc2c337c8..224b506c05 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -132,7 +132,7 @@ do_copy_texsubimage(struct intel_context *intel,
0,
&image_x, &image_y);
- /* Can't blit to tiled buffers with non-tile-aligned offset. */
+ /* The blitter can't handle Y-tiled buffers. */
if (intelImage->mt->region->tiling == I915_TILING_Y) {
return GL_FALSE;
}