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authorBen Skeggs <skeggsb@gmail.com>2008-02-09 16:15:14 +1100
committerBen Skeggs <skeggsb@gmail.com>2008-02-09 16:15:14 +1100
commitfb2760c5a64ada7b0f0a9635e7865b415a8aa286 (patch)
treec70e82ce993cfbbb789860516d667a6a44528668 /src/mesa/pipe/cell/ppu/cell_context.h
parentae905056d4feb5a39d956a38ab377f4d78bf4065 (diff)
parent479b5e9b5d9e0e387332c6fbeaffffa7612a0c52 (diff)
Merge branch 'upstream-gallium-0.1' into darktama-gallium-0.1
Diffstat (limited to 'src/mesa/pipe/cell/ppu/cell_context.h')
-rw-r--r--src/mesa/pipe/cell/ppu/cell_context.h20
1 files changed, 12 insertions, 8 deletions
diff --git a/src/mesa/pipe/cell/ppu/cell_context.h b/src/mesa/pipe/cell/ppu/cell_context.h
index 3bd88bfd5b..3b63419b5e 100644
--- a/src/mesa/pipe/cell/ppu/cell_context.h
+++ b/src/mesa/pipe/cell/ppu/cell_context.h
@@ -38,9 +38,6 @@
#include "pipe/cell/common.h"
-#define CELL_MAX_SPUS 6
-
-
struct cell_vbuf_render;
struct cell_vertex_shader_state
@@ -76,7 +73,7 @@ struct cell_context
struct pipe_framebuffer_state framebuffer;
struct pipe_poly_stipple poly_stipple;
struct pipe_scissor_state scissor;
- struct pipe_texture *texture[PIPE_MAX_SAMPLERS];
+ struct cell_texture *texture[PIPE_MAX_SAMPLERS];
struct pipe_viewport_state viewport;
struct pipe_vertex_buffer vertex_buffer[PIPE_ATTRIB_MAX];
struct pipe_vertex_element vertex_element[PIPE_ATTRIB_MAX];
@@ -84,6 +81,9 @@ struct cell_context
ubyte *cbuf_map[PIPE_MAX_COLOR_BUFS];
ubyte *zsbuf_map;
+ struct pipe_surface *tex_surf;
+ uint *tex_map;
+
uint dirty;
/** The primitive drawing context */
@@ -102,12 +102,14 @@ struct cell_context
uint num_spus;
- uint batch_buffer_size[CELL_NUM_BATCH_BUFFERS];
- ubyte batch_buffer[CELL_NUM_BATCH_BUFFERS][CELL_BATCH_BUFFER_SIZE] ALIGN16_ATTRIB;
- int cur_batch; /**< which batch buffer is being filled */
+ /** Buffers for command batches, vertex/index data */
+ uint buffer_size[CELL_NUM_BUFFERS];
+ ubyte buffer[CELL_NUM_BUFFERS][CELL_BUFFER_SIZE] ALIGN16_ATTRIB;
+
+ int cur_batch; /**< which buffer is being filled w/ commands */
/** [4] to ensure 16-byte alignment for each status word */
- uint buffer_status[CELL_MAX_SPUS][CELL_NUM_BATCH_BUFFERS][4] ALIGN16_ATTRIB;
+ uint buffer_status[CELL_MAX_SPUS][CELL_NUM_BUFFERS][4] ALIGN16_ATTRIB;
};
@@ -124,6 +126,8 @@ cell_context(struct pipe_context *pipe)
extern struct pipe_context *
cell_create_context(struct pipe_winsys *ws, struct cell_winsys *cws);
+extern void
+cell_vertex_shader_queue_flush(struct draw_context *draw);