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author | Brian <brian.paul@tungstengraphics.com> | 2008-01-28 17:23:44 -0700 |
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committer | Brian <brian.paul@tungstengraphics.com> | 2008-01-28 18:18:46 -0700 |
commit | 425f270fcbfdbfce98adaf9da4b8eb7360f34447 (patch) | |
tree | aeb424c4598456849ca32ac2b2ae90874edff9f7 /src/mesa/pipe/cell/spu/spu_main.h | |
parent | c2372cc7481bf3985a6a3126952ab9d5dab4bf77 (diff) |
Cell: basic texture mapping
Texture images are tiled in PPU code. SPUs use a texture cache for getting
texels from textures.
This is very rough code, but demos/texcyl.c works.
Diffstat (limited to 'src/mesa/pipe/cell/spu/spu_main.h')
-rw-r--r-- | src/mesa/pipe/cell/spu/spu_main.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mesa/pipe/cell/spu/spu_main.h b/src/mesa/pipe/cell/spu/spu_main.h index 5bc5d9fa99..480c54ebd0 100644 --- a/src/mesa/pipe/cell/spu/spu_main.h +++ b/src/mesa/pipe/cell/spu/spu_main.h @@ -60,6 +60,7 @@ struct spu_global struct pipe_depth_stencil_alpha_state depth_stencil; struct pipe_blend_state blend; struct pipe_sampler_state sampler[PIPE_MAX_SAMPLERS]; + struct cell_command_texture texture; struct vertex_info vertex_info; @@ -84,6 +85,8 @@ extern struct spu_global spu; #define TAG_INDEX_BUFFER 16 #define TAG_BATCH_BUFFER 17 #define TAG_MISC 18 +#define TAG_TEXTURE_TILE 19 + extern void |