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authorBen Skeggs <skeggsb@gmail.com>2008-01-27 12:35:33 +1100
committerBen Skeggs <skeggsb@gmail.com>2008-01-27 12:35:33 +1100
commita556034514582dc8e1b8b65f56020031d513331b (patch)
tree182aaf4be24733e2943f9e39cfb86bc22f942efb /src/mesa/pipe/i965simple
parent9043323f1437f9c6791845b3ddbb9af912b45110 (diff)
parentb717de3238a028a3fdfbaf13eb02dbde262f03e7 (diff)
Merge branch 'upstream-gallium-0.1' into darktama-gallium-0.1
Diffstat (limited to 'src/mesa/pipe/i965simple')
-rw-r--r--src/mesa/pipe/i965simple/brw_batch.h3
-rw-r--r--src/mesa/pipe/i965simple/brw_blit.c6
-rw-r--r--src/mesa/pipe/i965simple/brw_blit.h8
-rw-r--r--src/mesa/pipe/i965simple/brw_context.h6
-rw-r--r--src/mesa/pipe/i965simple/brw_curbe.c7
-rw-r--r--src/mesa/pipe/i965simple/brw_draw.c4
-rw-r--r--src/mesa/pipe/i965simple/brw_draw.h2
-rw-r--r--src/mesa/pipe/i965simple/brw_draw_upload.c10
-rw-r--r--src/mesa/pipe/i965simple/brw_misc_state.c8
-rw-r--r--src/mesa/pipe/i965simple/brw_state.h2
-rw-r--r--src/mesa/pipe/i965simple/brw_state_pool.c17
-rw-r--r--src/mesa/pipe/i965simple/brw_surface.c6
-rw-r--r--src/mesa/pipe/i965simple/brw_tex_layout.c17
-rw-r--r--src/mesa/pipe/i965simple/brw_vs_emit.c34
-rw-r--r--src/mesa/pipe/i965simple/brw_winsys.h12
-rw-r--r--src/mesa/pipe/i965simple/brw_wm_surface_state.c2
16 files changed, 63 insertions, 81 deletions
diff --git a/src/mesa/pipe/i965simple/brw_batch.h b/src/mesa/pipe/i965simple/brw_batch.h
index 8605d7c108..5f5932a488 100644
--- a/src/mesa/pipe/i965simple/brw_batch.h
+++ b/src/mesa/pipe/i965simple/brw_batch.h
@@ -44,7 +44,8 @@
#define OUT_RELOC( buf, flags, delta ) \
brw->winsys->batch_reloc(brw->winsys, buf, flags, delta)
-#define ADVANCE_BATCH()
+#define ADVANCE_BATCH() \
+ brw->winsys->batch_end( brw->winsys )
/* XXX: this is bogus - need proper handling for out-of-memory in batchbuffer.
*/
diff --git a/src/mesa/pipe/i965simple/brw_blit.c b/src/mesa/pipe/i965simple/brw_blit.c
index 4692129e40..bbd366294f 100644
--- a/src/mesa/pipe/i965simple/brw_blit.c
+++ b/src/mesa/pipe/i965simple/brw_blit.c
@@ -42,7 +42,7 @@
void brw_fill_blit(struct brw_context *brw,
unsigned cpp,
short dst_pitch,
- struct pipe_buffer_handle *dst_buffer,
+ struct pipe_buffer *dst_buffer,
unsigned dst_offset,
boolean dst_tiled,
short x, short y,
@@ -113,11 +113,11 @@ static unsigned translate_raster_op(unsigned logicop)
void brw_copy_blit(struct brw_context *brw,
unsigned cpp,
short src_pitch,
- struct pipe_buffer_handle *src_buffer,
+ struct pipe_buffer *src_buffer,
unsigned src_offset,
boolean src_tiled,
short dst_pitch,
- struct pipe_buffer_handle *dst_buffer,
+ struct pipe_buffer *dst_buffer,
unsigned dst_offset,
boolean dst_tiled,
short src_x, short src_y,
diff --git a/src/mesa/pipe/i965simple/brw_blit.h b/src/mesa/pipe/i965simple/brw_blit.h
index 371a135375..7f17a70173 100644
--- a/src/mesa/pipe/i965simple/brw_blit.h
+++ b/src/mesa/pipe/i965simple/brw_blit.h
@@ -3,13 +3,13 @@
#include "pipe/p_compiler.h"
-struct pipe_buffer_handle;
+struct pipe_buffer;
struct brw_context;
void brw_fill_blit(struct brw_context *intel,
unsigned cpp,
short dst_pitch,
- struct pipe_buffer_handle *dst_buffer,
+ struct pipe_buffer *dst_buffer,
unsigned dst_offset,
boolean dst_tiled,
short x, short y,
@@ -18,11 +18,11 @@ void brw_fill_blit(struct brw_context *intel,
void brw_copy_blit(struct brw_context *intel,
unsigned cpp,
short src_pitch,
- struct pipe_buffer_handle *src_buffer,
+ struct pipe_buffer *src_buffer,
unsigned src_offset,
boolean src_tiled,
short dst_pitch,
- struct pipe_buffer_handle *dst_buffer,
+ struct pipe_buffer *dst_buffer,
unsigned dst_offset,
boolean dst_tiled,
short src_x, short src_y,
diff --git a/src/mesa/pipe/i965simple/brw_context.h b/src/mesa/pipe/i965simple/brw_context.h
index c610a435e0..65664d853d 100644
--- a/src/mesa/pipe/i965simple/brw_context.h
+++ b/src/mesa/pipe/i965simple/brw_context.h
@@ -260,7 +260,7 @@ struct brw_texture {
/* The data is held here:
*/
- struct pipe_buffer_handle *buffer;
+ struct pipe_buffer *buffer;
};
/* Data about a particular attempt to compile a program. Note that
@@ -350,7 +350,7 @@ struct brw_surface_binding_table {
struct brw_cache;
struct brw_mem_pool {
- struct pipe_buffer_handle *buffer;
+ struct pipe_buffer *buffer;
unsigned size;
unsigned offset; /* offset of first free byte */
@@ -615,7 +615,7 @@ struct brw_context
unsigned nr_surfaces;
unsigned max_threads;
- struct pipe_buffer_handle *scratch_buffer;
+ struct pipe_buffer *scratch_buffer;
unsigned scratch_buffer_size;
unsigned sampler_count;
diff --git a/src/mesa/pipe/i965simple/brw_curbe.c b/src/mesa/pipe/i965simple/brw_curbe.c
index 4d79a7abe2..2733eb4e75 100644
--- a/src/mesa/pipe/i965simple/brw_curbe.c
+++ b/src/mesa/pipe/i965simple/brw_curbe.c
@@ -255,15 +255,12 @@ static void upload_constant_buffer(struct brw_context *brw)
/* FIXME: buffer size is num_consts + num_immediates */
if (brw->vs.prog_data->num_consts) {
/* map the vertex constant buffer and copy to curbe: */
- ws->buffer_map(ws, cbuffer->buffer, 0);
+ void *data = ws->buffer_map(ws, cbuffer->buffer, 0);
/* FIXME: this is wrong. the cbuffer->size currently
* represents size of consts + immediates. so if we'll
* have both we'll copy over the end of the buffer
* with the subsequent memcpy */
- ws->buffer_get_subdata(ws, cbuffer->buffer,
- 0,
- cbuffer->size,
- &buf[offset]);
+ memcpy(&buf[offset], data, cbuffer->size);
ws->buffer_unmap(ws, cbuffer->buffer);
offset += cbuffer->size;
}
diff --git a/src/mesa/pipe/i965simple/brw_draw.c b/src/mesa/pipe/i965simple/brw_draw.c
index acfb524a30..7598e3dc8a 100644
--- a/src/mesa/pipe/i965simple/brw_draw.c
+++ b/src/mesa/pipe/i965simple/brw_draw.c
@@ -144,7 +144,7 @@ static boolean brw_emit_prim( struct brw_context *brw,
* fallback conditions.
*/
static boolean brw_try_draw_elements( struct pipe_context *pipe,
- struct pipe_buffer_handle *index_buffer,
+ struct pipe_buffer *index_buffer,
unsigned index_size,
unsigned mode,
unsigned start,
@@ -183,7 +183,7 @@ static boolean brw_try_draw_elements( struct pipe_context *pipe,
static boolean brw_draw_elements( struct pipe_context *pipe,
- struct pipe_buffer_handle *indexBuffer,
+ struct pipe_buffer *indexBuffer,
unsigned indexSize,
unsigned mode,
unsigned start,
diff --git a/src/mesa/pipe/i965simple/brw_draw.h b/src/mesa/pipe/i965simple/brw_draw.h
index 053f2efb9d..62fe0d5d0e 100644
--- a/src/mesa/pipe/i965simple/brw_draw.h
+++ b/src/mesa/pipe/i965simple/brw_draw.h
@@ -42,7 +42,7 @@ boolean brw_upload_vertices( struct brw_context *brw,
unsigned max_index );
boolean brw_upload_indices(struct brw_context *brw,
- const struct pipe_buffer_handle *index_buffer,
+ const struct pipe_buffer *index_buffer,
int ib_size, int start, int count);
boolean brw_upload_vertex_buffers( struct brw_context *brw );
diff --git a/src/mesa/pipe/i965simple/brw_draw_upload.c b/src/mesa/pipe/i965simple/brw_draw_upload.c
index 88d6c9d111..aa85d93866 100644
--- a/src/mesa/pipe/i965simple/brw_draw_upload.c
+++ b/src/mesa/pipe/i965simple/brw_draw_upload.c
@@ -47,7 +47,7 @@ struct brw_array_state {
unsigned dword;
} vb0;
- struct pipe_buffer_handle *buffer;
+ struct pipe_buffer *buffer;
unsigned offset;
unsigned max_index;
@@ -240,7 +240,7 @@ boolean brw_upload_vertex_buffers( struct brw_context *brw )
for (i = 0; i < nr_enabled; i++) {
OUT_BATCH( vbp.vb[i].vb0.dword );
- OUT_RELOC( vbp.vb[i].buffer, PIPE_BUFFER_FLAG_READ,
+ OUT_RELOC( vbp.vb[i].buffer, PIPE_BUFFER_USAGE_GPU_READ,
vbp.vb[i].offset);
OUT_BATCH( vbp.vb[i].max_index );
OUT_BATCH( vbp.vb[i].instance_data_step_rate );
@@ -272,7 +272,7 @@ boolean brw_upload_vertex_elements( struct brw_context *brw )
}
boolean brw_upload_indices( struct brw_context *brw,
- const struct pipe_buffer_handle *index_buffer,
+ const struct pipe_buffer *index_buffer,
int ib_size, int start, int count)
{
/* Emit the indexbuffer packet:
@@ -290,8 +290,8 @@ boolean brw_upload_indices( struct brw_context *brw,
BEGIN_BATCH(4, 0);
OUT_BATCH( ib.header.dword );
- OUT_RELOC( index_buffer, PIPE_BUFFER_FLAG_READ, start);
- OUT_RELOC( index_buffer, PIPE_BUFFER_FLAG_READ, start + count);
+ OUT_RELOC( index_buffer, PIPE_BUFFER_USAGE_GPU_READ, start);
+ OUT_RELOC( index_buffer, PIPE_BUFFER_USAGE_GPU_READ, start + count);
OUT_BATCH( 0 );
ADVANCE_BATCH();
}
diff --git a/src/mesa/pipe/i965simple/brw_misc_state.c b/src/mesa/pipe/i965simple/brw_misc_state.c
index 13b3b1671d..925049ecc1 100644
--- a/src/mesa/pipe/i965simple/brw_misc_state.c
+++ b/src/mesa/pipe/i965simple/brw_misc_state.c
@@ -211,7 +211,7 @@ const struct brw_tracked_state brw_psp_urb_cbs = {
*/
static void upload_depthbuffer(struct brw_context *brw)
{
- struct pipe_surface *depth_surface = brw->attribs.FrameBuffer.zbuf;
+ struct pipe_surface *depth_surface = brw->attribs.FrameBuffer.zsbuf;
BEGIN_BATCH(5, INTEL_BATCH_NO_CLIPRECTS);
OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (5 - 2));
@@ -245,7 +245,7 @@ static void upload_depthbuffer(struct brw_context *brw)
// (depth_surface->region->tiled << 27) |
(BRW_SURFACE_2D << 29));
OUT_RELOC(depth_surface->buffer,
- PIPE_BUFFER_FLAG_READ | PIPE_BUFFER_FLAG_WRITE, 0);
+ PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE, 0);
OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) |
((depth_surface->pitch - 1) << 6) |
((depth_surface->height - 1) << 19));
@@ -465,10 +465,10 @@ static void upload_state_base_address( struct brw_context *brw )
BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (6 - 2));
OUT_RELOC(brw->pool[BRW_GS_POOL].buffer,
- PIPE_BUFFER_FLAG_READ,
+ PIPE_BUFFER_USAGE_GPU_READ,
1); /* General state base address */
OUT_RELOC(brw->pool[BRW_SS_POOL].buffer,
- PIPE_BUFFER_FLAG_READ,
+ PIPE_BUFFER_USAGE_GPU_READ,
1); /* Surface state base address */
OUT_BATCH(1); /* Indirect object base address */
OUT_BATCH(1); /* General state upper bound */
diff --git a/src/mesa/pipe/i965simple/brw_state.h b/src/mesa/pipe/i965simple/brw_state.h
index 8b4d7aabf0..258e9a556e 100644
--- a/src/mesa/pipe/i965simple/brw_state.h
+++ b/src/mesa/pipe/i965simple/brw_state.h
@@ -106,7 +106,7 @@ boolean brw_search_cache( struct brw_cache *cache,
void brw_init_caches( struct brw_context *brw );
void brw_destroy_caches( struct brw_context *brw );
-static inline struct pipe_buffer_handle *brw_cache_buffer(struct brw_context *brw,
+static inline struct pipe_buffer *brw_cache_buffer(struct brw_context *brw,
enum brw_cache_id id)
{
return brw->cache[id].pool->buffer;
diff --git a/src/mesa/pipe/i965simple/brw_state_pool.c b/src/mesa/pipe/i965simple/brw_state_pool.c
index 78268ed8f2..7c67f0ee25 100644
--- a/src/mesa/pipe/i965simple/brw_state_pool.c
+++ b/src/mesa/pipe/i965simple/brw_state_pool.c
@@ -44,6 +44,7 @@
#include "pipe/p_winsys.h"
#include "pipe/p_util.h"
+#include "pipe/p_inlines.h"
#include "brw_context.h"
#include "brw_state.h"
@@ -91,13 +92,9 @@ static void brw_init_pool( struct brw_context *brw,
pool->brw = brw;
pool->buffer = brw->pipe.winsys->buffer_create(brw->pipe.winsys,
- 4096, 0, 0);
-
- brw->pipe.winsys->buffer_data(brw->pipe.winsys,
- pool->buffer,
- size,
- NULL,
- 0 /* DRM_BO_FLAG_MEM_TT */);
+ 4096,
+ 0 /* DRM_BO_FLAG_MEM_TT */,
+ size);
}
static void brw_destroy_pool( struct brw_context *brw,
@@ -105,9 +102,9 @@ static void brw_destroy_pool( struct brw_context *brw,
{
struct brw_mem_pool *pool = &brw->pool[pool_id];
- pool->brw->pipe.winsys->buffer_reference( pool->brw->pipe.winsys,
- &pool->buffer,
- NULL );
+ pipe_buffer_reference( pool->brw->pipe.winsys,
+ &pool->buffer,
+ NULL );
}
diff --git a/src/mesa/pipe/i965simple/brw_surface.c b/src/mesa/pipe/i965simple/brw_surface.c
index 76b8c73d5c..eb7835836e 100644
--- a/src/mesa/pipe/i965simple/brw_surface.c
+++ b/src/mesa/pipe/i965simple/brw_surface.c
@@ -64,7 +64,7 @@ brw_get_tex_surface(struct pipe_context *pipe,
if (ps) {
assert(ps->format);
assert(ps->refcount);
- pipe->winsys->buffer_reference(pipe->winsys, &ps->buffer, tex->buffer);
+ pipe_buffer_reference(pipe->winsys, &ps->buffer, tex->buffer);
ps->format = pt->format;
ps->cpp = pt->cpp;
ps->width = pt->width[level];
@@ -203,10 +203,6 @@ void
brw_init_surface_functions(struct brw_context *brw)
{
brw->pipe.get_tex_surface = brw_get_tex_surface;
- brw->pipe.get_tile = pipe_get_tile_raw;
- brw->pipe.put_tile = pipe_put_tile_raw;
-
- brw->pipe.surface_data = brw_surface_data;
brw->pipe.surface_copy = brw_surface_copy;
brw->pipe.surface_fill = brw_surface_fill;
}
diff --git a/src/mesa/pipe/i965simple/brw_tex_layout.c b/src/mesa/pipe/i965simple/brw_tex_layout.c
index 2b2bf16f1b..b8b6b579e2 100644
--- a/src/mesa/pipe/i965simple/brw_tex_layout.c
+++ b/src/mesa/pipe/i965simple/brw_tex_layout.c
@@ -39,6 +39,7 @@
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
#include "pipe/p_util.h"
+#include "pipe/p_inlines.h"
#include "pipe/p_winsys.h"
#include "brw_context.h"
@@ -308,15 +309,11 @@ brw_texture_create(struct pipe_context *pipe, struct pipe_texture **pt)
memset(&tex->base + 1, 0,
sizeof(struct brw_texture) - sizeof(struct pipe_texture));
- if (brw_miptree_layout(pipe, tex)) {
- tex->buffer = pipe->winsys->buffer_create(pipe->winsys, 64, 0, 0);
-
- if (tex->buffer)
- pipe->winsys->buffer_data(pipe->winsys, tex->buffer,
- tex->pitch * tex->base.cpp *
- tex->total_height, NULL,
- PIPE_BUFFER_USAGE_PIXEL);
- }
+ if (brw_miptree_layout(pipe, tex))
+ tex->buffer = pipe->winsys->buffer_create(pipe->winsys, 64,
+ PIPE_BUFFER_USAGE_PIXEL,
+ tex->pitch * tex->base.cpp *
+ tex->total_height);
if (!tex->buffer) {
FREE(tex);
@@ -345,7 +342,7 @@ brw_texture_release(struct pipe_context *pipe, struct pipe_texture **pt)
DBG("%s deleting %p\n", __FUNCTION__, (void *) tex);
*/
- pipe->winsys->buffer_reference(pipe->winsys, &tex->buffer, NULL);
+ pipe_buffer_reference(pipe->winsys, &tex->buffer, NULL);
for (i = 0; i < PIPE_MAX_TEXTURE_LEVELS; i++)
if (tex->image_offset[i])
diff --git a/src/mesa/pipe/i965simple/brw_vs_emit.c b/src/mesa/pipe/i965simple/brw_vs_emit.c
index 5f212bd055..b32c233dd2 100644
--- a/src/mesa/pipe/i965simple/brw_vs_emit.c
+++ b/src/mesa/pipe/i965simple/brw_vs_emit.c
@@ -988,33 +988,24 @@ post_vs_emit( struct brw_vs_compile *c, struct brw_instruction *end_inst )
static void process_declaration(const struct tgsi_full_declaration *decl,
struct brw_prog_info *info)
{
+ int first = decl->u.DeclarationRange.First;
+ int last = decl->u.DeclarationRange.Last;
+
+ assert (decl->Declaration.Declare != TGSI_DECLARE_MASK);
+
switch(decl->Declaration.File) {
- case TGSI_FILE_CONSTANT: {
- if (decl->Declaration.Declare == TGSI_DECLARE_MASK) {
- printf("DECLARATION MASK = %d\n",
- decl->u.DeclarationMask.Mask);
- assert(0);
- } else { /*range*/
- info->num_consts += decl->u.DeclarationRange.Last - decl->u.DeclarationRange.First + 1;
- }
- }
+ case TGSI_FILE_CONSTANT:
+ info->num_consts += last - first + 1;
break;
case TGSI_FILE_INPUT: {
}
break;
case TGSI_FILE_OUTPUT: {
+ assert(last == first); /* for now */
if (decl->Declaration.Semantic) {
- int idx = 0;
- if (decl->Declaration.Declare == TGSI_DECLARE_MASK) {
- printf("DECLARATION MASK = %d\n",
- decl->u.DeclarationMask.Mask);
- assert(0);
- } else { /*range*/
- idx = decl->u.DeclarationRange.First;
- }
switch (decl->Semantic.SemanticName) {
case TGSI_SEMANTIC_POSITION: {
- info->pos_idx = idx;
+ info->pos_idx = first;
}
break;
case TGSI_SEMANTIC_COLOR:
@@ -1025,7 +1016,7 @@ static void process_declaration(const struct tgsi_full_declaration *decl,
break;
case TGSI_SEMANTIC_PSIZE: {
info->writes_psize = TRUE;
- info->psize_idx = idx;
+ info->psize_idx = first;
}
break;
case TGSI_SEMANTIC_GENERIC:
@@ -1035,14 +1026,14 @@ static void process_declaration(const struct tgsi_full_declaration *decl,
}
break;
case TGSI_FILE_TEMPORARY: {
- info->num_temps++;
+ info->num_temps += (last - first) + 1;
}
break;
case TGSI_FILE_SAMPLER: {
}
break;
case TGSI_FILE_ADDRESS: {
- info->num_addrs++;
+ info->num_addrs += (last - first) + 1;
}
break;
case TGSI_FILE_IMMEDIATE: {
@@ -1303,7 +1294,6 @@ void brw_vs_emit(struct brw_vs_compile *c)
}
break;
case TGSI_TOKEN_TYPE_IMMEDIATE: {
- int i;
struct tgsi_full_immediate *imm = &parse.FullToken.FullImmediate;
/*assert(imm->Immediate.Size == 4);*/
c->prog_data.imm_buf[c->prog_data.num_imm][0] = imm->u.ImmediateFloat32[0].Float;
diff --git a/src/mesa/pipe/i965simple/brw_winsys.h b/src/mesa/pipe/i965simple/brw_winsys.h
index 253599896c..3523a58614 100644
--- a/src/mesa/pipe/i965simple/brw_winsys.h
+++ b/src/mesa/pipe/i965simple/brw_winsys.h
@@ -50,7 +50,7 @@
* etc.
*/
-struct pipe_buffer_handle;
+struct pipe_buffer;
struct pipe_fence_handle;
struct pipe_winsys;
@@ -136,7 +136,7 @@ struct brw_winsys {
* I915_BUFFER_ACCESS_READ macros.
*/
void (*batch_reloc)(struct brw_winsys *sws,
- struct pipe_buffer_handle *buf,
+ struct pipe_buffer *buf,
unsigned access_flags,
unsigned delta);
@@ -159,7 +159,7 @@ struct brw_winsys {
* simulator:
*/
void (*buffer_subdata_typed)(struct brw_winsys *sws,
- struct pipe_buffer_handle *buf,
+ struct pipe_buffer *buf,
unsigned long offset,
unsigned long size,
const void *data,
@@ -170,7 +170,7 @@ struct brw_winsys {
* of places yet:
*/
unsigned (*get_buffer_offset)( struct brw_winsys *sws,
- struct pipe_buffer_handle *buf,
+ struct pipe_buffer *buf,
unsigned flags );
};
@@ -193,9 +193,13 @@ static inline boolean brw_batchbuffer_data(struct brw_winsys *winsys,
uint i;
const unsigned *udata = (const unsigned*)(data);
unsigned size = bytes/incr;
+
+ winsys->batch_start(winsys, size, 0);
for (i = 0; i < size; ++i) {
winsys->batch_dword(winsys, udata[i]);
}
+ winsys->batch_end(winsys);
+
return (i == size);
}
#endif
diff --git a/src/mesa/pipe/i965simple/brw_wm_surface_state.c b/src/mesa/pipe/i965simple/brw_wm_surface_state.c
index fc40e0438c..cbb4f2efd3 100644
--- a/src/mesa/pipe/i965simple/brw_wm_surface_state.c
+++ b/src/mesa/pipe/i965simple/brw_wm_surface_state.c
@@ -127,7 +127,7 @@ static unsigned translate_tex_format( enum pipe_format pipe_format )
}
static unsigned brw_buffer_offset(struct brw_context *brw,
- struct pipe_buffer_handle *buffer)
+ struct pipe_buffer *buffer)
{
return brw->winsys->get_buffer_offset(brw->winsys,
buffer,