diff options
| author | Ben Skeggs <skeggsb@gmail.com> | 2007-12-11 16:02:14 +1100 |
|---|---|---|
| committer | Ben Skeggs <skeggsb@gmail.com> | 2007-12-11 16:02:14 +1100 |
| commit | c23d0f4c501b9e80ba18d6ccf09d4c95353c1a28 (patch) | |
| tree | af46b03b00004e6db55a94d8a90dd2f80ef0ebe3 /src/mesa/pipe/nv40/nv40_shader.h | |
| parent | b34952c758cf009927e7d7091205e7c13052efad (diff) | |
nv40: allow reading from fragprog result regs
Diffstat (limited to 'src/mesa/pipe/nv40/nv40_shader.h')
| -rw-r--r-- | src/mesa/pipe/nv40/nv40_shader.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/pipe/nv40/nv40_shader.h b/src/mesa/pipe/nv40/nv40_shader.h index 207dafd748..01c0652b4d 100644 --- a/src/mesa/pipe/nv40/nv40_shader.h +++ b/src/mesa/pipe/nv40/nv40_shader.h @@ -292,9 +292,9 @@ //== Opcode / Destination selection == #define NV40_FP_OP_PROGRAM_END (1 << 0) #define NV40_FP_OP_OUT_REG_SHIFT 1 -#define NV40_FP_OP_OUT_REG_MASK (31 << 1) +#define NV40_FP_OP_OUT_REG_MASK (63 << 1) /* Needs to be set when writing outputs to get expected result.. */ -#define NV40_FP_OP_UNK0_7 (1 << 7) +#define NV40_FP_OP_OUT_REG_HALF (1 << 7) #define NV40_FP_OP_COND_WRITE_ENABLE (1 << 8) #define NV40_FP_OP_OUTMASK_SHIFT 9 #define NV40_FP_OP_OUTMASK_MASK (0xF << 9) @@ -456,8 +456,8 @@ # define NV40_FP_REG_TYPE_INPUT 1 # define NV40_FP_REG_TYPE_CONST 2 #define NV40_FP_REG_SRC_SHIFT 2 -#define NV40_FP_REG_SRC_MASK (31 << 2) -#define NV40_FP_REG_UNK_0 (1 << 8) +#define NV40_FP_REG_SRC_MASK (63 << 2) +#define NV40_FP_REG_SRC_HALF (1 << 8) #define NV40_FP_REG_SWZ_ALL_SHIFT 9 #define NV40_FP_REG_SWZ_ALL_MASK (255 << 9) #define NV40_FP_REG_SWZ_X_SHIFT 9 |