diff options
| author | Roland Scheidegger <sroland@vmware.com> | 2010-06-05 16:44:31 +0200 |
|---|---|---|
| committer | Roland Scheidegger <sroland@vmware.com> | 2010-06-05 16:54:36 +0200 |
| commit | c00065e5c2ba8a1bcaa543b079abc883af0844f3 (patch) | |
| tree | 184383c8895b51141d4e2ee161f6e417c6c065c4 /src/mesa/state_tracker/st_cb_clear.c | |
| parent | acb20e7208341fb6a2b81ac10aa01f17e93a1dea (diff) | |
st/mesa: fix bug in depthstencil optimizing clear logic
Diffstat (limited to 'src/mesa/state_tracker/st_cb_clear.c')
| -rw-r--r-- | src/mesa/state_tracker/st_cb_clear.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/state_tracker/st_cb_clear.c b/src/mesa/state_tracker/st_cb_clear.c index a819d30530..b15792504a 100644 --- a/src/mesa/state_tracker/st_cb_clear.c +++ b/src/mesa/state_tracker/st_cb_clear.c @@ -540,7 +540,8 @@ st_Clear(GLcontext *ctx, GLbitfield mask) * required from the visual. Hence fix this up to avoid potential * read-modify-write in the driver. */ - if (((clear_buffers & PIPE_CLEAR_DEPTHSTENCIL) != PIPE_CLEAR_DEPTHSTENCIL) && + if ((clear_buffers & PIPE_CLEAR_DEPTHSTENCIL) && + ((clear_buffers & PIPE_CLEAR_DEPTHSTENCIL) != PIPE_CLEAR_DEPTHSTENCIL) && (depthRb == stencilRb) && (ctx->DrawBuffer->Visual.depthBits == 0 || ctx->DrawBuffer->Visual.stencilBits == 0)) |