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authorPeter Clifton <pcjc2@cam.ac.uk>2010-11-06 09:23:06 +0000
committerEric Anholt <eric@anholt.net>2010-11-08 10:14:17 -0800
commit10b9e018ca4b37c66a6e0215d4551ed74b4981a6 (patch)
treefd831d46c5810e40e361b3e863323289e499d87e /src/mesa
parent5b15b5f4a8fffa07d8051e6cd4cd0a6c9288fc9f (diff)
intel: Fix emit_linear_blit to use DWORD aligned width blits
The width of the 2D blits used to copy the data is defined as a 16-bit signed integer, but the pitch must be DWORD aligned. Limit to an integral number of DWORDs, (1 << 15 - 4) rather than (1 << 15 -1). Fixes corruption to data uploaded with glBufferSubData. Signed-off-by: Peter Clifton <pcjc2@cam.ac.uk>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index a74e21720f..7118898830 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -483,8 +483,11 @@ intel_emit_linear_blit(struct intel_context *intel,
/* Blits are in a different ringbuffer so we don't use them. */
assert(intel->gen < 6);
- /* The pitch is a signed value. */
- pitch = MIN2(size, (1 << 15) - 1);
+ /* The pitch hits the GPU as a is a signed value, IN DWORDs.
+ * But we want width to match pitch. Max width is (1 << 15 - 1),
+ * rounding that down to the nearest DWORD is 1 << 15 - 4
+ */
+ pitch = MIN2(size, (1 << 15) - 4);
height = size / pitch;
ok = intelEmitCopyBlit(intel, 1,
pitch, src_bo, src_offset, I915_TILING_NONE,