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authorDave Airlie <airlied@redhat.com>2008-03-20 14:21:10 +1000
committerDave Airlie <airlied@redhat.com>2008-03-20 14:21:10 +1000
commit2b8e422b3173388075b010f10e935c735edcd9a1 (patch)
tree2b2ed903d5f9f4f72e269a41e1a06945370b7b94 /src
parent9e6e4ae49a49c60f9b15d9276a44a1ad25865c81 (diff)
mesa: cleanup state emission and rs for r500
trivial clear app now renders
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/r300/r300_emit.h13
-rw-r--r--src/mesa/drivers/dri/r300/r300_ioctl.c86
-rw-r--r--src/mesa/drivers/dri/r300/r300_state.c10
3 files changed, 104 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_emit.h b/src/mesa/drivers/dri/r300/r300_emit.h
index a4f6ab997e..50e7e4f149 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.h
+++ b/src/mesa/drivers/dri/r300/r300_emit.h
@@ -178,6 +178,19 @@ static inline uint32_t cmdpacify(void)
cmd[0].i = cmdvpu((dest), _n/4); \
} while (0);
+#define r500fp_start_fragment(dest, length) \
+ do { \
+ int _n; \
+ _n = (length); \
+ cmd = (drm_radeon_cmd_header_t*) \
+ r300AllocCmdBuf(rmesa, \
+ (_n+1), \
+ __FUNCTION__); \
+ cmd_reserved = _n+1; \
+ cmd_written =1; \
+ cmd[0].i = cmdr500fp((dest), _n/6); \
+ } while (0);
+
#define start_packet3(packet, count) \
{ \
int _n; \
diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c
index 2ad1bc3bcd..63555d5f3a 100644
--- a/src/mesa/drivers/dri/r300/r300_ioctl.c
+++ b/src/mesa/drivers/dri/r300/r300_ioctl.c
@@ -292,6 +292,26 @@ static void r300EmitClearState(GLcontext * ctx)
R300_STATECHANGE(r300, rr);
reg_start(R300_RS_ROUTE_0, 0);
e32(R300_RS_ROUTE_0_COLOR);
+ } else {
+
+ R300_STATECHANGE(r300, ri);
+ reg_start(R500_RS_IP_0, 8);
+ for (i = 0; i < 8; ++i) {
+ e32((1 << R500_RS_IP_TEX_PTR_T_SHIFT) |
+ (2 << R500_RS_IP_TEX_PTR_R_SHIFT) |
+ (3 << R500_RS_IP_TEX_PTR_Q_SHIFT) );
+ }
+
+ R300_STATECHANGE(r300, rc);
+ /* The second constant is needed to get glxgears display anything .. */
+ reg_start(R300_RS_COUNT, 1);
+ e32((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
+ e32(0x0);
+
+ R300_STATECHANGE(r300, rr);
+ reg_start(R500_RS_INST_0, 0);
+ e32(R500_RS_INST_COL_CN_WRITE);
+
}
if (!is_r500) {
@@ -322,6 +342,72 @@ static void r300EmitClearState(GLcontext * ctx)
reg_start(R300_PFS_INSTR3_0, 0);
e32(FP_SELA(0, NO, W, FP_TMP(0), 0, 0));
+ } else {
+ R300_STATECHANGE(r300, r500fp);
+ r500fp_start_fragment(0, 12);
+
+ e32(0x7808);
+ e32(R500_TEX_ID(0) | R500_TEX_INST_LD | R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED);
+ e32(R500_TEX_SRC_ADDR(0) | R500_TEX_SRC_S_SWIZ_R |
+ R500_TEX_SRC_T_SWIZ_G |
+ R500_TEX_DST_ADDR(0) |
+ R500_TEX_DST_R_SWIZ_R |
+ R500_TEX_DST_G_SWIZ_G |
+ R500_TEX_DST_B_SWIZ_B |
+ R500_TEX_DST_A_SWIZ_A);
+ e32(R500_DX_ADDR(0) |
+ R500_DX_S_SWIZ_R |
+ R500_DX_T_SWIZ_R |
+ R500_DX_R_SWIZ_R |
+ R500_DX_Q_SWIZ_R |
+ R500_DY_ADDR(0) |
+ R500_DY_S_SWIZ_R |
+ R500_DY_T_SWIZ_R |
+ R500_DY_R_SWIZ_R |
+ R500_DY_Q_SWIZ_R);
+ e32(0x0);
+ e32(0x0);
+
+ e32(R500_INST_TYPE_OUT |
+ R500_INST_TEX_SEM_WAIT |
+ R500_INST_LAST |
+ R500_INST_RGB_OMASK_R |
+ R500_INST_RGB_OMASK_G |
+ R500_INST_RGB_OMASK_B |
+ R500_INST_ALPHA_OMASK);
+
+ e32(R500_RGB_ADDR0(0) |
+ R500_RGB_ADDR1(0) |
+ R500_RGB_ADDR1_CONST |
+ R500_RGB_ADDR2(0) |
+ R500_RGB_ADDR2_CONST |
+ R500_RGB_SRCP_OP_1_MINUS_2RGB0);
+
+ e32(R500_ALPHA_ADDR0(0) |
+ R500_ALPHA_ADDR1(0) |
+ R500_ALPHA_ADDR1_CONST |
+ R500_ALPHA_ADDR2(0) |
+ R500_ALPHA_ADDR2_CONST |
+ R500_ALPHA_SRCP_OP_1_MINUS_2A0);
+
+ e32(R500_ALU_RGB_SEL_A_SRC0 |
+ R500_ALU_RGB_R_SWIZ_A_R |
+ R500_ALU_RGB_G_SWIZ_A_G |
+ R500_ALU_RGB_B_SWIZ_A_B |
+ R500_ALU_RGB_SEL_B_SRC0 |
+ R500_ALU_RGB_R_SWIZ_B_1 |
+ R500_ALU_RGB_B_SWIZ_B_1 |
+ R500_ALU_RGB_G_SWIZ_B_1);
+
+ e32(R500_ALPHA_OP_MAD |
+ R500_ALPHA_SWIZ_A_A |
+ R500_ALPHA_SWIZ_B_1);
+
+ e32(R500_ALU_RGBA_OP_MAD |
+ R500_ALU_RGBA_R_SWIZ_0 |
+ R500_ALU_RGBA_G_SWIZ_0 |
+ R500_ALU_RGBA_B_SWIZ_0 |
+ R500_ALU_RGBA_A_SWIZ_0);
}
if (has_tcl) {
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index e30404f652..e7e10ba935 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1661,10 +1661,10 @@ static void r500SetupRSUnit(GLcontext * ctx)
// r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0 | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | (in_texcoords << R300_RS_INTERP_SRC_SHIFT)
- r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = (0 << R500_TEX_PTR_S_SHIFT) |
- (1 << R500_TEX_PTR_T_SHIFT) |
- (2 << R500_TEX_PTR_R_SHIFT) |
- (3 << R500_TEX_PTR_Q_SHIFT) |
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = (0 << R500_RS_IP_TEX_PTR_S_SHIFT) |
+ (1 << R500_RS_IP_TEX_PTR_T_SHIFT) |
+ (2 << R500_RS_IP_TEX_PTR_R_SHIFT) |
+ (3 << R500_RS_IP_TEX_PTR_Q_SHIFT) |
(in_texcoords << 0) | interp_magic[i];
r300->hw.rr.cmd[R300_RR_ROUTE_0 + fp_reg] = 0;
@@ -1702,7 +1702,7 @@ static void r500SetupRSUnit(GLcontext * ctx)
if (InputsRead & FRAG_BIT_COL1) {
if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
// r300->hw.rr.cmd[R300_RR_ROUTE_1] |= R300_RS_ROUTE_1_UNKNOWN11 | R300_RS_ROUTE_1_COLOR1 | (fp_reg++ << R300_RS_ROUTE_1_COLOR1_DEST_SHIFT);
- r300->hw.rr.cmd[R300_RR_ROUTE_1] |= (1 << 12) | R500_RS_INST_COL_CN_WRITER300_RS_ROUTE_1_UNKNOWN11 | (fp_reg++ << R500_RS_INST_COL_COL_ADDR_SHIFT);
+ r300->hw.rr.cmd[R300_RR_ROUTE_1] |= (1 << 12) | R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_COL_ADDR_SHIFT);
InputsRead &= ~FRAG_BIT_COL1;
if (high_rr < 1)
high_rr = 1;