Adjustments to make everything use IOCTL/sarea defines in DRM instead

of glx/mini. removes glx/mini/drm.h glx/mini/sarea.h

88 files changed, 416 insertions, 1178 deletions

diff --git a/src/glx/mini/Makefile.solo b/src/glx/mini/Makefile.solo
index 94e54f46a5..a35ecb5ec5 100644
--- a/src/glx/mini/Makefile.solo
+++ b/src/glx/mini/Makefile.solo
@@ -28,7 +28,8 @@ INCLUDE_DIRS = \
 	-I$(TOP)/src/mesa/math \
 	-I$(TOP)/src/mesa/transform \
 	-I$(TOP)/src/mesa/swrast \
-	-I$(TOP)/src/mesa/swrast_setup
+	-I$(TOP)/src/mesa/swrast_setup \
+	-I$(TOP)/src/mesa/drivers/dri/drm/shared
 
 
 ##### RULES #####
diff --git a/src/glx/mini/dri_util.c b/src/glx/mini/dri_util.c
index 6d79d2037c..23b9b9d5fb 100644
--- a/src/glx/mini/dri_util.c
+++ b/src/glx/mini/dri_util.c
@@ -28,7 +28,6 @@
 #include <sys/mman.h>
 #include <sys/shm.h>
 
-#include "sarea.h"
 #include "dri_util.h"
 
 /**
@@ -270,7 +269,7 @@ static void *driCreateDrawable(__DRIscreen *screen,
     pdp->w = width;
     pdp->h = height;
     pdp->numClipRects = 0;
-    pdp->pClipRects = (XF86DRIClipRectPtr) malloc(sizeof(XF86DRIClipRectRec));
+    pdp->pClipRects = (drm_clip_rect_t *) malloc(sizeof(drm_clip_rect_t));
     (pdp->pClipRects)[0].x1 = 0;
     (pdp->pClipRects)[0].y1 = 0;
     (pdp->pClipRects)[0].x2 = width;
diff --git a/src/glx/mini/dri_util.h b/src/glx/mini/dri_util.h
index 0430c60623..a3934da4b9 100644
--- a/src/glx/mini/dri_util.h
+++ b/src/glx/mini/dri_util.h
@@ -50,7 +50,9 @@
 
 #include <inttypes.h>
 #include "dri.h"		/* public entry points */
-#include "sarea.h"		/* for XF86DRISAREAPtr */
+#include "xf86drm.h"
+#include "drm.h"
+#include "drm_sarea.h"
 
 #define _SOLO
 
@@ -290,7 +292,7 @@ struct __DRIdrawablePrivateRec {
     int w;
     int h;
     int numClipRects;
-    XF86DRIClipRectPtr pClipRects;
+    drm_clip_rect_t *pClipRects;
     /*@}*/
 
     /**
@@ -302,7 +304,7 @@ struct __DRIdrawablePrivateRec {
     int backY;
     int backClipRectType;
     int numBackClipRects;
-    XF86DRIClipRectPtr pBackClipRects;
+    drm_clip_rect_t *pBackClipRects;
     /*@}*/
 
     /**
@@ -431,7 +433,7 @@ struct __DRIscreenPrivateRec {
      *   - the device lock
      *   - the device-independent per-drawable and per-context(?) information
      */
-    XF86DRISAREAPtr pSAREA;
+    drm_sarea_t *pSAREA;
 
     /**
      * \name Direct frame buffer access information 
diff --git a/src/glx/mini/driver.h b/src/glx/mini/driver.h
index a3ec96083b..a619ad4449 100644
--- a/src/glx/mini/driver.h
+++ b/src/glx/mini/driver.h
@@ -52,15 +52,8 @@
 #include "GL/gl.h"
 #include "GL/internal/glcore.h"
 
-/**
- * \brief Clip rectangle definition.
- */
-typedef struct _XF86DRIClipRect {
-    unsigned short	x1; /**< \brief Upper: inclusive */
-    unsigned short	y1; /**< \brief Left: inclusive */
-    unsigned short	x2; /**< \brief Lower: exclusive */
-    unsigned short	y2; /**< \brief Right: exclusive */
-} XF86DRIClipRectRec, *XF86DRIClipRectPtr;
+#include "drm.h"
+#include "drm_sarea.h"
 
 /**
  * \brief DRIDriverContext type.
@@ -105,7 +98,7 @@ typedef struct DRIDriverContextRec {
     */
    /*@{*/
    int drmFD;  /**< \brief DRM device file descriptor */
-   struct _XF86DRISAREA *pSAREA;
+   drm_sarea_t *pSAREA;
    unsigned int serverContext;	/**< \brief DRM context only active on server */
    /*@}*/
    
diff --git a/src/glx/mini/drm.h b/src/glx/mini/drm.h
deleted file mode 100644
index 4180d1eb1a..0000000000
--- a/src/glx/mini/drm.h
+++ /dev/null
@@ -1,657 +0,0 @@
-/**
- * \file drm.h 
- * \brief Header for the Direct Rendering Manager
- * 
- * This file defines the DRM device ioctls and the strucutre of respective user
- * arguments.
- *
- * \sa xf86drm.h and xf86drm.c for an user-friendlier interface.
- * 
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- *
- * \par Acknowledgements:
- * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
- */
-
-/*
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-
-#ifndef _DRM_H_
-#define _DRM_H_
-
-#if defined(__linux__)
-#include <linux/config.h>
-#include <asm/ioctl.h>		/* For _IO* macros */
-#define DRM_IOCTL_NR(n)		_IOC_NR(n)
-#define DRM_IOC_VOID		_IOC_NONE
-#define DRM_IOC_READ		_IOC_READ
-#define DRM_IOC_WRITE		_IOC_WRITE
-#define DRM_IOC_READWRITE	_IOC_READ|_IOC_WRITE
-#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
-#elif defined(__FreeBSD__) || defined(__NetBSD__)
-#if defined(__FreeBSD__) && defined(XFree86Server)
-/* Prevent name collision when including sys/ioccom.h */
-#undef ioctl
-#include <sys/ioccom.h>
-#define ioctl(a,b,c)		xf86ioctl(a,b,c)
-#else
-#include <sys/ioccom.h>
-#endif /* __FreeBSD__ && xf86ioctl */
-#define DRM_IOCTL_NR(n)		((n) & 0xff)
-#define DRM_IOC_VOID		IOC_VOID
-#define DRM_IOC_READ		IOC_OUT
-#define DRM_IOC_WRITE		IOC_IN
-#define DRM_IOC_READWRITE	IOC_INOUT
-#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
-#endif
-
-#define XFREE86_VERSION(major,minor,patch,snap) \
-		((major << 16) | (minor << 8) | patch)
-
-#ifndef CONFIG_XFREE86_VERSION
-#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
-#endif
-
-#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
-#define DRM_PROC_DEVICES "/proc/devices"
-#define DRM_PROC_MISC	 "/proc/misc"
-#define DRM_PROC_DRM	 "/proc/drm"
-#define DRM_DEV_DRM	 "/dev/drm"
-#define DRM_DEV_MODE	 (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
-#define DRM_DEV_UID	 0
-#define DRM_DEV_GID	 0
-#endif
-
-#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
-#define DRM_MAJOR       226
-#define DRM_MAX_MINOR   15
-#endif
-#define DRM_NAME	"drm"	  /**< Name in kernel, /dev, and /proc */
-#define DRM_MIN_ORDER	5	  /**< At least 2^5 bytes = 32 bytes */
-#define DRM_MAX_ORDER	22	  /**< Up to 2^22 bytes = 4MB */
-#define DRM_RAM_PERCENT 10	  /**< How much system ram can we lock? */
-
-#define _DRM_LOCK_HELD	0x80000000 /**< Hardware lock is held */
-#define _DRM_LOCK_CONT	0x40000000 /**< Hardware lock is contended */
-#define _DRM_LOCK_IS_HELD(lock)	   ((lock) & _DRM_LOCK_HELD)
-#define _DRM_LOCK_IS_CONT(lock)	   ((lock) & _DRM_LOCK_CONT)
-#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
-
-
-typedef unsigned long drm_handle_t;
-typedef unsigned int  drm_context_t;
-typedef unsigned int  drm_drawable_t;
-typedef unsigned int  drm_magic_t;
-
-
-/**
- * Cliprect.
- * 
- * \warning: If you change this structure, make sure you change
- * XF86DRIClipRectRec in the server as well
- *
- * \note KW: Actually it's illegal to change either for
- * backwards-compatibility reasons.
- */
-typedef struct drm_clip_rect {
-	unsigned short	x1;
-	unsigned short	y1;
-	unsigned short	x2;
-	unsigned short	y2;
-} drm_clip_rect_t;
-
-
-/**
- * Texture region,
- */
-typedef struct drm_tex_region {
-	unsigned char	next;
-	unsigned char	prev;
-	unsigned char	in_use;
-	unsigned char	padding;
-	unsigned int	age;
-} drm_tex_region_t;
-
-
-/**
- * \brief DRM_IOCTL_VERSION ioctl argument type.
- * 
- * \sa drmGetVersion().
- */
-typedef struct drm_version {
-	int    version_major;	  /**< Major version */
-	int    version_minor;	  /**< Minor version */
-	int    version_patchlevel;/**< Patch level */
-	size_t name_len;	  /**< Length of name buffer */
-	char   *name;		  /**< Name of driver */
-	size_t date_len;	  /**< Length of date buffer */
-	char   *date;		  /**< User-space buffer to hold date */
-	size_t desc_len;	  /**< Length of desc buffer */
-	char   *desc;		  /**< User-space buffer to hold desc */
-} drm_version_t;
-
-
-/**
- * \brief DRM_IOCTL_GET_UNIQUE ioctl argument type.
- *
- * \sa drmGetBusid() and drmSetBusId().
- */
-typedef struct drm_unique {
-	size_t unique_len;	  /**< Length of unique */
-	char   *unique;		  /**< Unique name for driver instantiation */
-} drm_unique_t;
-
-
-typedef struct drm_list {
-	int		 count;	  /**< Length of user-space structures */
-	drm_version_t	 *version;
-} drm_list_t;
-
-
-typedef struct drm_block {
-	int		 unused;
-} drm_block_t;
-
-
-/**
- * \brief DRM_IOCTL_CONTROL ioctl argument type.
- *
- * \sa drmCtlInstHandler() and drmCtlUninstHandler().
- */
-typedef struct drm_control {
-	enum {
-		DRM_ADD_COMMAND,
-		DRM_RM_COMMAND,
-		DRM_INST_HANDLER,
-		DRM_UNINST_HANDLER
-	}		 func;
-	int		 irq;
-} drm_control_t;
-
-
-/**
- * \brief Type of memory to map.
- */
-typedef enum drm_map_type {
-	_DRM_FRAME_BUFFER   = 0,  /**< WC (no caching), no core dump */
-	_DRM_REGISTERS	    = 1,  /**< no caching, no core dump */
-	_DRM_SHM	    = 2,  /**< shared, cached */
-	_DRM_AGP            = 3,  /**< AGP/GART */
-	_DRM_SCATTER_GATHER = 4	  /**< Scatter/gather memory for PCI DMA */
-} drm_map_type_t;
-
-
-/**
- * \brief Memory mapping flags.
- */
-typedef enum drm_map_flags {
-	_DRM_RESTRICTED	     = 0x01, /**< Cannot be mapped to user-virtual */
-	_DRM_READ_ONLY	     = 0x02,
-	_DRM_LOCKED	     = 0x04, /**< shared, cached, locked */
-	_DRM_KERNEL	     = 0x08, /**< kernel requires access */
-	_DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
-	_DRM_CONTAINS_LOCK   = 0x20, /**< SHM page that contains lock */
-	_DRM_REMOVABLE	     = 0x40  /**< Removable mapping */
-} drm_map_flags_t;
-
-
-typedef struct drm_ctx_priv_map {
-	unsigned int	ctx_id;  /**< Context requesting private mapping */
-	void		*handle; /**< Handle of map */
-} drm_ctx_priv_map_t;
-
-
-/**
- * \brief DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
- * argument type.
- *
- * \sa drmAddMap().
- */
-typedef struct drm_map {
-	unsigned long	offset;	 /**< Requested physical address (0 for SAREA)*/
-	unsigned long	size;	 /**< Requested physical size (bytes) */
-	drm_map_type_t	type;	 /**< Type of memory to map */
-	drm_map_flags_t flags;	 /**< Flags */
-	void		*handle; /**< User-space: "Handle" to pass to mmap() */
-				 /**< Kernel-space: kernel-virtual address */
-	int		mtrr;	 /**< MTRR slot used */
-				 /*   Private data */
-} drm_map_t;
-
-
-/**
- * \brief DRM_IOCTL_GET_CLIENT ioctl argument type.
- */
-typedef struct drm_client {
-	int		idx;	/**< Which client desired? */
-	int		auth;	/**< Is client authenticated? */
-	unsigned long	pid;	/**< Process ID */
-	unsigned long	uid;	/**< User ID */
-	unsigned long	magic;	/**< Magic */
-	unsigned long	iocs;	/**< Ioctl count */
-} drm_client_t;
-
-
-typedef enum {
-	_DRM_STAT_LOCK,
-	_DRM_STAT_OPENS,
-	_DRM_STAT_CLOSES,
-	_DRM_STAT_IOCTLS,
-	_DRM_STAT_LOCKS,
-	_DRM_STAT_UNLOCKS,
-	_DRM_STAT_VALUE,	/**< Generic value */
-	_DRM_STAT_BYTE,		/**< Generic byte counter (1024bytes/K) */
-	_DRM_STAT_COUNT,	/**< Generic non-byte counter (1000/k) */
-
-	_DRM_STAT_IRQ,		/**< IRQ */
-	_DRM_STAT_PRIMARY,	/**< Primary DMA bytes */
-	_DRM_STAT_SECONDARY,	/**< Secondary DMA bytes */
-	_DRM_STAT_DMA,		/**< DMA */
-	_DRM_STAT_SPECIAL,	/**< Special DMA (e.g., priority or polled) */
-	_DRM_STAT_MISSED	/**< Missed DMA opportunity */
-
-				/* Add to the *END* of the list */
-} drm_stat_type_t;
-
-
-/**
- * \brief DRM_IOCTL_GET_STATS ioctl argument type.
- */
-typedef struct drm_stats {
-	unsigned long count;
-	struct {
-		unsigned long   value;
-		drm_stat_type_t type;
-	} data[15];
-} drm_stats_t;
-
-
-/**
- * \brief Hardware locking flags.
- */
-typedef enum drm_lock_flags {
-	_DRM_LOCK_READY	     = 0x01, /**< Wait until hardware is ready for DMA */
-	_DRM_LOCK_QUIESCENT  = 0x02, /**< Wait until hardware quiescent */
-	_DRM_LOCK_FLUSH	     = 0x04, /**< Flush this context's DMA queue first */
-	_DRM_LOCK_FLUSH_ALL  = 0x08, /**< Flush all DMA queues first */
-				/* These *HALT* flags aren't supported yet
-				   -- they will be used to support the
-				   full-screen DGA-like mode. */
-	_DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
-	_DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
-} drm_lock_flags_t;
-
-
-/**
- * \brief DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
- * 
- * \sa drmGetLock() and drmUnlock().
- */
-typedef struct drm_lock {
-	int		 context;
-	drm_lock_flags_t flags;
-} drm_lock_t;
-
-
-/**
- * \brief DMA flags
- *
- * \warning 
- * These values \e must match xf86drm.h.
- *
- * \sa drm_dma.
- */
-typedef enum drm_dma_flags {	      
-				      /* Flags for DMA buffer dispatch */
-	_DRM_DMA_BLOCK	      = 0x01, /**<
-				       * Block until buffer dispatched.
-				       * 
-				       * \note The buffer may not yet have
-				       * been processed by the hardware --
-				       * getting a hardware lock with the
-				       * hardware quiescent will ensure
-				       * that the buffer has been
-				       * processed.
-				       */
-	_DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
-	_DRM_DMA_PRIORITY     = 0x04, /**< High priority dispatch */
-
-				      /* Flags for DMA buffer request */
-	_DRM_DMA_WAIT	      = 0x10, /**< Wait for free buffers */
-	_DRM_DMA_SMALLER_OK   = 0x20, /**< Smaller-than-requested buffers OK */
-	_DRM_DMA_LARGER_OK    = 0x40  /**< Larger-than-requested buffers OK */
-} drm_dma_flags_t;
-
-
-/**
- * \brief DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
- *
- * \sa drmAddBufs().
- */
-typedef struct drm_buf_desc {
-	int	      count;	 /**< Number of buffers of this size */
-	int	      size;	 /**< Size in bytes */
-	int	      low_mark;	 /**< Low water mark */
-	int	      high_mark; /**< High water mark */
-	enum {
-		_DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
-		_DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
-		_DRM_SG_BUFFER  = 0x04  /**< Scatter/gather memory buffer */
-	}	      flags;
-	unsigned long agp_start; /**< 
-				  * Start address of where the AGP buffers are
-				  * in the AGP aperture
-				  */
-} drm_buf_desc_t;
-
-
-/**
- * \brief DRM_IOCTL_INFO_BUFS ioctl argument type.
- */
-typedef struct drm_buf_info {
-	int	       count;	/**< Entries in list */
-	drm_buf_desc_t *list;
-} drm_buf_info_t;
-
-
-/**
- * \brief DRM_IOCTL_FREE_BUFS ioctl argument type.
- */
-typedef struct drm_buf_free {
-	int	       count;
-	int	       *list;
-} drm_buf_free_t;
-
-
-/**
- * \brief Buffer information
- *
- * \sa drm_buf_map.
- */
-typedef struct drm_buf_pub {
-	int		  idx;	       /**< Index into the master buffer list */
-	int		  total;       /**< Buffer size */
-	int		  used;	       /**< Amount of buffer in use (for DMA) */
-	void		  *address;    /**< Address of buffer */
-} drm_buf_pub_t;
-
-
-/**
- * \brief DRM_IOCTL_MAP_BUFS ioctl argument type.
- */
-typedef struct drm_buf_map {
-	int	      count;	/**< Length of the buffer list */
-	void	      *virtual;	/**< Mmap'd area in user-virtual */
-	drm_buf_pub_t *list;	/**< Buffer information */
-} drm_buf_map_t;
-
-
-/**
- * \brief DRM_IOCTL_DMA ioctl argument type.
- *
- * Indices here refer to the offset into the buffer list in drm_buf_get.
- *
- * \sa drmDMA().
- */
-typedef struct drm_dma {
-	int		context;	  /**< Context handle */
-	int		send_count;	  /**< Number of buffers to send */
-	int		*send_indices;	  /**< List of handles to buffers */
-	int		*send_sizes;	  /**< Lengths of data to send */
-	drm_dma_flags_t flags;		  /**< Flags */
-	int		request_count;	  /**< Number of buffers requested */
-	int		request_size;	  /**< Desired size for buffers */
-	int		*request_indices; /**< Buffer information */
-	int		*request_sizes;
-	int		granted_count;	  /**< Number of buffers granted */
-} drm_dma_t;
-
-
-typedef enum {
-	_DRM_CONTEXT_PRESERVED = 0x01,
-	_DRM_CONTEXT_2DONLY    = 0x02
-} drm_ctx_flags_t;
-
-
-/**
- * \brief DRM_IOCTL_ADD_CTX ioctl argument type.
- *
- * \sa drmCreateContext() and drmDestroyContext().
- */
-typedef struct drm_ctx {
-	drm_context_t	handle;
-	drm_ctx_flags_t flags;
-} drm_ctx_t;
-
-
-/**
- * \brief DRM_IOCTL_RES_CTX ioctl argument type.
- */
-typedef struct drm_ctx_res {
-	int		count;
-	drm_ctx_t	*contexts;
-} drm_ctx_res_t;
-
-
-/**
- * \brief DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
- */
-typedef struct drm_draw {
-	drm_drawable_t	handle;
-} drm_draw_t;
-
-
-/**
- * \brief DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
- */
-typedef struct drm_auth {
-	drm_magic_t	magic;
-} drm_auth_t;
-
-
-/**
- * \brief DRM_IOCTL_IRQ_BUSID ioctl argument type.
- *
- * \sa drmGetInterruptFromBusID().
- */
-typedef struct drm_irq_busid {
-	int irq;	/**< IRQ number */
-	int busnum;	/**< bus number */
-	int devnum;	/**< device number */
-	int funcnum;	/**< function number */
-} drm_irq_busid_t;
-
-
-typedef enum {
-    _DRM_VBLANK_ABSOLUTE = 0x0,		/**< Wait for specific vblank sequence number */
-    _DRM_VBLANK_RELATIVE = 0x1,		/**< Wait for given number of vblanks */
-    _DRM_VBLANK_SIGNAL   = 0x8000	/**< Send signal instead of blocking */
-} drm_vblank_seq_type_t;
-
-
-#define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
-
-
-struct drm_wait_vblank_request {
-	drm_vblank_seq_type_t type;
-	unsigned int sequence;
-	unsigned long signal;
-};
-
-
-struct drm_wait_vblank_reply {
-	drm_vblank_seq_type_t type;
-	unsigned int sequence;
-	long tval_sec;
-	long tval_usec;
-};
-
-
-/**
- * \brief DRM_IOCTL_WAIT_VBLANK ioctl argument type.
- *
- * \sa drmWaitVBlank().
- */
-typedef union drm_wait_vblank {
-	struct drm_wait_vblank_request request;
-	struct drm_wait_vblank_reply reply;
-} drm_wait_vblank_t;
-
-
-/**
- * \brief DRM_IOCTL_AGP_ENABLE ioctl argument type.
- *
- * \sa drmAgpEnable().
- */
-typedef struct drm_agp_mode {
-	unsigned long mode;	/**< AGP mode */
-} drm_agp_mode_t;
-
-
-/**
- * \brief DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
- *
- * \sa drmAgpAlloc() and drmAgpFree().
- */
-typedef struct drm_agp_buffer {
-	unsigned long size;	/**< In bytes -- will round to page boundary */
-	unsigned long handle;	/**< Used for binding / unbinding */
-	unsigned long type;     /**< Type of memory to allocate */
-        unsigned long physical; /**< Physical used by i810 */
-} drm_agp_buffer_t;
-
-
-/**
- * \brief DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
- *
- * \sa drmAgpBind() and drmAgpUnbind().
- */
-typedef struct drm_agp_binding {
-	unsigned long handle;   /**< From drm_agp_buffer */
-	unsigned long offset;	/**< In bytes -- will round to page boundary */
-} drm_agp_binding_t;
-
-
-/**
- * \brief DRM_IOCTL_AGP_INFO ioctl argument type.
- *
- * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
- * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
- * drmAgpVendorId() and drmAgpDeviceId().
- */
-typedef struct drm_agp_info {
-	int            agp_version_major;
-	int            agp_version_minor;
-	unsigned long  mode;
-	unsigned long  aperture_base;  /* physical address */
-	unsigned long  aperture_size;  /* bytes */
-	unsigned long  memory_allowed; /* bytes */
-	unsigned long  memory_used;
-
-				/* PCI information */
-	unsigned short id_vendor;
-	unsigned short id_device;
-} drm_agp_info_t;
-
-
-/**
- * \brief DRM_IOCTL_SG_ALLOC ioctl argument type.
- */
-typedef struct drm_scatter_gather {
-	unsigned long size;	/**< In bytes -- will round to page boundary */
-	unsigned long handle;	/**< Used for mapping / unmapping */
-} drm_scatter_gather_t;
-
-
-#define DRM_IOCTL_BASE			'd'
-#define DRM_IO(nr)			_IO(DRM_IOCTL_BASE,nr)
-#define DRM_IOR(nr,type)		_IOR(DRM_IOCTL_BASE,nr,type)
-#define DRM_IOW(nr,type)		_IOW(DRM_IOCTL_BASE,nr,type)
-#define DRM_IOWR(nr,type)		_IOWR(DRM_IOCTL_BASE,nr,type)
-
-#define DRM_IOCTL_VERSION		DRM_IOWR(0x00, drm_version_t)
-#define DRM_IOCTL_GET_UNIQUE		DRM_IOWR(0x01, drm_unique_t)
-#define DRM_IOCTL_GET_MAGIC		DRM_IOR( 0x02, drm_auth_t)
-#define DRM_IOCTL_IRQ_BUSID		DRM_IOWR(0x03, drm_irq_busid_t)
-#define DRM_IOCTL_GET_MAP               DRM_IOWR(0x04, drm_map_t)
-#define DRM_IOCTL_GET_CLIENT            DRM_IOWR(0x05, drm_client_t)
-#define DRM_IOCTL_GET_STATS             DRM_IOR( 0x06, drm_stats_t)
-
-#define DRM_IOCTL_SET_UNIQUE		DRM_IOW( 0x10, drm_unique_t)
-#define DRM_IOCTL_AUTH_MAGIC		DRM_IOW( 0x11, drm_auth_t)
-#define DRM_IOCTL_BLOCK			DRM_IOWR(0x12, drm_block_t)
-#define DRM_IOCTL_UNBLOCK		DRM_IOWR(0x13, drm_block_t)
-#define DRM_IOCTL_CONTROL		DRM_IOW( 0x14, drm_control_t)
-#define DRM_IOCTL_ADD_MAP		DRM_IOWR(0x15, drm_map_t)
-#define DRM_IOCTL_ADD_BUFS		DRM_IOWR(0x16, drm_buf_desc_t)
-#define DRM_IOCTL_MARK_BUFS		DRM_IOW( 0x17, drm_buf_desc_t)
-#define DRM_IOCTL_INFO_BUFS		DRM_IOWR(0x18, drm_buf_info_t)
-#define DRM_IOCTL_MAP_BUFS		DRM_IOWR(0x19, drm_buf_map_t)
-#define DRM_IOCTL_FREE_BUFS		DRM_IOW( 0x1a, drm_buf_free_t)
-
-#define DRM_IOCTL_RM_MAP		DRM_IOW( 0x1b, drm_map_t)
-
-#define DRM_IOCTL_SET_SAREA_CTX		DRM_IOW( 0x1c, drm_ctx_priv_map_t)
-#define DRM_IOCTL_GET_SAREA_CTX 	DRM_IOWR(0x1d, drm_ctx_priv_map_t)
-
-#define DRM_IOCTL_ADD_CTX		DRM_IOWR(0x20, drm_ctx_t)
-#define DRM_IOCTL_RM_CTX		DRM_IOWR(0x21, drm_ctx_t)
-#define DRM_IOCTL_MOD_CTX		DRM_IOW( 0x22, drm_ctx_t)
-#define DRM_IOCTL_GET_CTX		DRM_IOWR(0x23, drm_ctx_t)
-#define DRM_IOCTL_SWITCH_CTX		DRM_IOW( 0x24, drm_ctx_t)
-#define DRM_IOCTL_NEW_CTX		DRM_IOW( 0x25, drm_ctx_t)
-#define DRM_IOCTL_RES_CTX		DRM_IOWR(0x26, drm_ctx_res_t)
-#define DRM_IOCTL_ADD_DRAW		DRM_IOWR(0x27, drm_draw_t)
-#define DRM_IOCTL_RM_DRAW		DRM_IOWR(0x28, drm_draw_t)
-#define DRM_IOCTL_DMA			DRM_IOWR(0x29, drm_dma_t)
-#define DRM_IOCTL_LOCK			DRM_IOW( 0x2a, drm_lock_t)
-#define DRM_IOCTL_UNLOCK		DRM_IOW( 0x2b, drm_lock_t)
-#define DRM_IOCTL_FINISH		DRM_IOW( 0x2c, drm_lock_t)
-
-#define DRM_IOCTL_AGP_ACQUIRE		DRM_IO(  0x30)
-#define DRM_IOCTL_AGP_RELEASE		DRM_IO(  0x31)
-#define DRM_IOCTL_AGP_ENABLE		DRM_IOW( 0x32, drm_agp_mode_t)
-#define DRM_IOCTL_AGP_INFO		DRM_IOR( 0x33, drm_agp_info_t)
-#define DRM_IOCTL_AGP_ALLOC		DRM_IOWR(0x34, drm_agp_buffer_t)
-#define DRM_IOCTL_AGP_FREE		DRM_IOW( 0x35, drm_agp_buffer_t)
-#define DRM_IOCTL_AGP_BIND		DRM_IOW( 0x36, drm_agp_binding_t)
-#define DRM_IOCTL_AGP_UNBIND		DRM_IOW( 0x37, drm_agp_binding_t)
-
-#define DRM_IOCTL_SG_ALLOC		DRM_IOW( 0x38, drm_scatter_gather_t)
-#define DRM_IOCTL_SG_FREE		DRM_IOW( 0x39, drm_scatter_gather_t)
-
-#define DRM_IOCTL_WAIT_VBLANK		DRM_IOWR(0x3a, drm_wait_vblank_t)
-
-/**
- * Device specific ioctls should only be in their respective headers
- * The device specific ioctl range is from 0x40 to 0x79.
- *
- * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
- * drmCommandReadWrite().
- */
-#define DRM_COMMAND_BASE                0x40
-
-#endif
diff --git a/src/glx/mini/miniglx_events.c b/src/glx/mini/miniglx_events.c
index d367dba395..319fc530fa 100644
--- a/src/glx/mini/miniglx_events.c
+++ b/src/glx/mini/miniglx_events.c
@@ -38,7 +38,7 @@
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
-/* $Id: miniglx_events.c,v 1.1 2003/08/22 20:11:43 brianp Exp $ */
+/* $Id: miniglx_events.c,v 1.2 2004/03/11 20:35:38 jonsmirl Exp $ */
 
 
 #include <assert.h>
@@ -65,7 +65,7 @@
 #include "miniglxP.h"
 
 #include "xf86drm.h"
-#include "sarea.h"
+#include "dri_util.h"
 
 #define MINIGLX_FIFO_NAME "/tmp/miniglx.fifo"
 
diff --git a/src/glx/mini/sarea.h b/src/glx/mini/sarea.h
deleted file mode 100644
index 47545e10e9..0000000000
--- a/src/glx/mini/sarea.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/**
- * \file sarea.h 
- * \brief SAREA definitions.
- * 
- * The SAREA is a memory region is shared by the DRM device, the X server and
- * the clients.
- *
- * This file defines its layout in user space.
- * 
- * \author Kevin E. Martin <kevin@precisioninsight.com>
- * \author Jens Owen <jens@tungstengraphics.com>
- * \author Rickard E. (Rik) Faith <faith@valinux.com>
- */
-
-/*
- * Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef _SAREA_H_
-#define _SAREA_H_
-
-#include "xf86drm.h"
-
-/* SAREA area needs to be at least a page */
-#if defined(__alpha__)
-#define SAREA_MAX 			0x2000
-#elif defined(__ia64__)
-#define SAREA_MAX			0x10000		/* 64kB */
-#else
-/* Intel 830M driver needs at least 8k SAREA */
-#define SAREA_MAX			0x2000
-#endif
-
-#define SAREA_MAX_DRAWABLES 		256
-
-#define SAREA_DRAWABLE_CLAIMED_ENTRY	0x80000000
-
-/**
- * \brief SAREA per drawable information.
- *
- * \sa _XF86DRISAREA.
- */
-typedef struct _XF86DRISAREADrawable {
-    unsigned int	stamp;
-    unsigned int	flags;
-} XF86DRISAREADrawableRec, *XF86DRISAREADrawablePtr;
-
-/**
- * \brief SAREA frame information.
- *
- * \sa  _XF86DRISAREA.
- */
-typedef struct _XF86DRISAREAFrame {
-    unsigned int        x;
-    unsigned int        y;
-    unsigned int        width;
-    unsigned int        height;
-    unsigned int        fullscreen;
-} XF86DRISAREAFrameRec, *XF86DRISAREAFramePtr;
-
-/**
- * \brief SAREA definition.
- */
-typedef struct _XF86DRISAREA {
-    /** first thing is always the DRM locking structure */
-    drmLock			lock;
-    /** \todo Use readers/writer lock for drawable_lock */
-    drmLock			drawable_lock;
-    XF86DRISAREADrawableRec	drawableTable[SAREA_MAX_DRAWABLES];
-    XF86DRISAREAFrameRec        frame;
-    drmContext			dummy_context;
-} XF86DRISAREARec, *XF86DRISAREAPtr;
-
-#endif
diff --git a/src/mesa/drivers/dri/fb/Makefile.solo b/src/mesa/drivers/dri/fb/Makefile.solo
index 3de98fdc84..e2894eeecc 100644
--- a/src/mesa/drivers/dri/fb/Makefile.solo
+++ b/src/mesa/drivers/dri/fb/Makefile.solo
@@ -5,7 +5,7 @@
 
 TOP = ../../../../..
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 MESA_MODULES = $(TOP)/src/mesa/mesa.a
diff --git a/src/mesa/drivers/dri/ffb/Makefile.solo b/src/mesa/drivers/dri/ffb/Makefile.solo
index ebf1a8c5d1..76ab99249b 100644
--- a/src/mesa/drivers/dri/ffb/Makefile.solo
+++ b/src/mesa/drivers/dri/ffb/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/ffb/ffb_clear.c b/src/mesa/drivers/dri/ffb/ffb_clear.c
index 5285774f6f..2bb0eb047b 100644
--- a/src/mesa/drivers/dri/ffb/ffb_clear.c
+++ b/src/mesa/drivers/dri/ffb/ffb_clear.c
@@ -129,7 +129,7 @@ ffb_do_clear(ffbContextPtr fmesa, __DRIdrawablePrivate *dPriv,
 {
 	FFBDRIPtr gDRIPriv = (FFBDRIPtr) fmesa->driScreen->pDevPriv;
 	ffb_fbcPtr ffb = fmesa->regs;
-	XF86DRIClipRectPtr box = dPriv->pClipRects;
+	drm_clip_rect_t *box = dPriv->pClipRects;
 	int nc = dPriv->numClipRects;
 
 	cy  = dPriv->h - cy - cheight;
diff --git a/src/mesa/drivers/dri/ffb/server/ffb_drishare.h b/src/mesa/drivers/dri/ffb/server/ffb_drishare.h
index 501dd5b218..01d884ab31 100644
--- a/src/mesa/drivers/dri/ffb/server/ffb_drishare.h
+++ b/src/mesa/drivers/dri/ffb/server/ffb_drishare.h
@@ -16,7 +16,7 @@ typedef struct ffb_dri_state {
 } ffb_dri_state_t;
 
 #define FFB_DRISHARE(SAREA)	\
-	((ffb_dri_state_t *) (((char *)(SAREA)) + sizeof(XF86DRISAREARec)))
+	((ffb_dri_state_t *) (((char *)(SAREA)) + sizeof(drm_sarea_t)))
 
 typedef struct {
 	drmHandle	hFbcRegs;
diff --git a/src/mesa/drivers/dri/gamma/Makefile.solo b/src/mesa/drivers/dri/gamma/Makefile.solo
index 70146e58cb..6ad5994934 100644
--- a/src/mesa/drivers/dri/gamma/Makefile.solo
+++ b/src/mesa/drivers/dri/gamma/Makefile.solo
@@ -1,4 +1,4 @@
-# $Id: Makefile.solo,v 1.2 2004/01/20 02:49:27 brianp Exp $
+# $Id: Makefile.solo,v 1.3 2004/03/11 20:35:38 jonsmirl Exp $
 
 # Mesa 3-D graphics library
 # Version:  5.0
@@ -8,7 +8,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/gamma/gamma_context.c b/src/mesa/drivers/dri/gamma/gamma_context.c
index 107eca56f6..f0d16db8ad 100644
--- a/src/mesa/drivers/dri/gamma/gamma_context.c
+++ b/src/mesa/drivers/dri/gamma/gamma_context.c
@@ -76,7 +76,7 @@ GLboolean gammaCreateContext( const __GLcontextModes *glVisual,
    gammaContextPtr gmesa;
    gammaScreenPtr gammascrn;
    GLINTSAREADRIPtr saPriv=(GLINTSAREADRIPtr)(((char*)sPriv->pSAREA)+
-						 sizeof(XF86DRISAREARec));
+						 sizeof(drm_sarea_t));
    struct dd_function_table functions;
 
    gmesa = (gammaContextPtr) CALLOC( sizeof(*gmesa) );
diff --git a/src/mesa/drivers/dri/gamma/gamma_context.h b/src/mesa/drivers/dri/gamma/gamma_context.h
index 3db5b23cb0..6c9cf7d35f 100644
--- a/src/mesa/drivers/dri/gamma/gamma_context.h
+++ b/src/mesa/drivers/dri/gamma/gamma_context.h
@@ -242,11 +242,11 @@ struct gamma_context {
    	/* Mirrors of some DRI state
     	 */
    	drmContext hHWContext;
-   	drmLock *driHwLock;
+   	drm_hw_lock_t *driHwLock;
    	int driFd;
 
    	GLuint numClipRects;		   /* Cliprects for the draw buffer */
-   	XF86DRIClipRectPtr pClipRects;
+   	drm_clip_rect_t *pClipRects;
 
     	dmaBuf              buf;           /* DMA buffer for regular cmds */
     	int                 bufIndex;
diff --git a/src/mesa/drivers/dri/gamma/gamma_xmesa.c b/src/mesa/drivers/dri/gamma/gamma_xmesa.c
index c0a298cb85..dfe8d41cc4 100644
--- a/src/mesa/drivers/dri/gamma/gamma_xmesa.c
+++ b/src/mesa/drivers/dri/gamma/gamma_xmesa.c
@@ -127,7 +127,7 @@ gammaSwapBuffers( __DRIdrawablePrivate *dPriv )
 	int src, dst, x0, y0, x1, h;
 	int i;
 	int nRect = dPriv->numClipRects;
-	XF86DRIClipRectPtr pRect = dPriv->pClipRects;
+	drm_clip_rect_t *pRect = dPriv->pClipRects;
 	__DRIscreenPrivate *driScrnPriv = gmesa->driScreen;
    	GLINTDRIPtr gDRIPriv = (GLINTDRIPtr)driScrnPriv->pDevPriv;
 
diff --git a/src/mesa/drivers/dri/i810/Makefile.solo b/src/mesa/drivers/dri/i810/Makefile.solo
index ad29267b4f..54075b6862 100644
--- a/src/mesa/drivers/dri/i810/Makefile.solo
+++ b/src/mesa/drivers/dri/i810/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/i810/i810context.h b/src/mesa/drivers/dri/i810/i810context.h
index 3b9aa2ddcd..1f0e8c3847 100644
--- a/src/mesa/drivers/dri/i810/i810context.h
+++ b/src/mesa/drivers/dri/i810/i810context.h
@@ -156,7 +156,7 @@ struct i810_context_t {
    int drawX;			/* origin of drawable in draw buffer */
    int drawY;
    GLuint numClipRects;		/* cliprects for that buffer */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
 
    int lastSwap;
    int texAge;
@@ -165,11 +165,11 @@ struct i810_context_t {
   
  
    GLboolean scissor;
-   XF86DRIClipRectRec draw_rect;
-   XF86DRIClipRectRec scissor_rect;
+   drm_clip_rect_t draw_rect;
+   drm_clip_rect_t scissor_rect;
 
    drmContext hHWContext;
-   drmLock *driHwLock;
+   drm_hw_lock_t *driHwLock;
    int driFd;
 
    __DRIdrawablePrivate *driDrawable;
diff --git a/src/mesa/drivers/dri/i810/i810ioctl.c b/src/mesa/drivers/dri/i810/i810ioctl.c
index 88a048b396..3d1be4c902 100644
--- a/src/mesa/drivers/dri/i810/i810ioctl.c
+++ b/src/mesa/drivers/dri/i810/i810ioctl.c
@@ -90,8 +90,8 @@ static void i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
       for (i = 0 ; i < imesa->numClipRects ; ) 
       { 	 
 	 int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, imesa->numClipRects);
-	 XF86DRIClipRectPtr box = imesa->pClipRects;	 
-	 XF86DRIClipRectPtr b = imesa->sarea->boxes;
+	 drm_clip_rect_t *box = imesa->pClipRects;	 
+	 drm_clip_rect_t *b = imesa->sarea->boxes;
 	 int n = 0;
 
 	 if (!all) {
@@ -117,7 +117,7 @@ static void i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 	    }
 	 } else {
 	    for ( ; i < nr ; i++) {
-	       *b++ = *(XF86DRIClipRectPtr)&box[i];
+	       *b++ = box[i];
 	       n++;
 	    }
 	 }
@@ -144,7 +144,7 @@ static void i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 void i810CopyBuffer( const __DRIdrawablePrivate *dPriv ) 
 {
    i810ContextPtr imesa;
-   XF86DRIClipRectPtr pbox;
+   drm_clip_rect_t *pbox;
    int nbox, i, tmp;
 
    assert(dPriv);
@@ -162,7 +162,7 @@ void i810CopyBuffer( const __DRIdrawablePrivate *dPriv )
    for (i = 0 ; i < nbox ; )
    {
       int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
-      XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)imesa->sarea->boxes;
+      drm_clip_rect_t *b = imesa->sarea->boxes;
 
       imesa->sarea->nbox = nr - i;
 
@@ -204,7 +204,7 @@ void i810PageFlip( const __DRIdrawablePrivate *dPriv )
   LOCK_HARDWARE( imesa );
   
   if (dPriv->pClipRects) {
-    *(XF86DRIClipRectRec *)imesa->sarea->boxes = dPriv->pClipRects[0];
+    *imesa->sarea->boxes = dPriv->pClipRects[0];
     imesa->sarea->nbox = 1;
   }
   ret = drmCommandNone(imesa->driFd, DRM_I810_FLIP);
@@ -293,9 +293,9 @@ void i810WaitAge( i810ContextPtr imesa, int age  )
 
 
 
-static int intersect_rect( XF86DRIClipRectPtr out,
-                           XF86DRIClipRectPtr a,
-                           XF86DRIClipRectPtr b )
+static int intersect_rect( drm_clip_rect_t *out,
+                           drm_clip_rect_t *a,
+                           drm_clip_rect_t *b )
 {
    *out = *a;
    if (b->x1 > out->x1) out->x1 = b->x1;
@@ -361,7 +361,7 @@ static void age_imesa( i810ContextPtr imesa, int age )
 
 void i810FlushPrimsLocked( i810ContextPtr imesa )
 {
-   XF86DRIClipRectPtr pbox = (XF86DRIClipRectPtr)imesa->pClipRects;
+   drm_clip_rect_t *pbox = imesa->pClipRects;
    int nbox = imesa->numClipRects;
    drmBufPtr buffer = imesa->vertex_buffer;
    I810SAREAPtr sarea = imesa->sarea;
@@ -403,7 +403,7 @@ void i810FlushPrimsLocked( i810ContextPtr imesa )
       for (i = 0 ; i < nbox ; )
       {
 	 int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, nbox);
-	 XF86DRIClipRectPtr b = sarea->boxes;
+	 drm_clip_rect_t *b = sarea->boxes;
 
 	 if (imesa->scissor) {
 	    sarea->nbox = 0;
diff --git a/src/mesa/drivers/dri/i810/server/i810_dri.h b/src/mesa/drivers/dri/i810/server/i810_dri.h
index cfca20a95b..2931988c87 100644
--- a/src/mesa/drivers/dri/i810/server/i810_dri.h
+++ b/src/mesa/drivers/dri/i810/server/i810_dri.h
@@ -78,7 +78,7 @@ typedef struct {
    unsigned int dirty;
 
    unsigned int nbox;
-   XF86DRIClipRectRec boxes[I810_NR_SAREA_CLIPRECTS];
+   drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS];
 
    /* Maintain an LRU of contiguous regions of texture space.  If
     * you think you own a region of texture memory, and it has an
diff --git a/src/mesa/drivers/dri/i830/Makefile.solo b/src/mesa/drivers/dri/i830/Makefile.solo
index 091c4be95f..b5c12e37fe 100644
--- a/src/mesa/drivers/dri/i830/Makefile.solo
+++ b/src/mesa/drivers/dri/i830/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/i830/i830_context.h b/src/mesa/drivers/dri/i830/i830_context.h
index 5f4bb565e1..95c2e925e2 100644
--- a/src/mesa/drivers/dri/i830/i830_context.h
+++ b/src/mesa/drivers/dri/i830/i830_context.h
@@ -195,7 +195,7 @@ struct i830_context_t
    int drawX;			/* origin of drawable in draw buffer */
    int drawY;
    GLuint numClipRects;		/* cliprects for that buffer */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
 
    int lastSwap;
    int texAge;
@@ -206,11 +206,11 @@ struct i830_context_t
    int do_irqs;
    
    GLboolean scissor;
-   XF86DRIClipRectRec draw_rect;
-   XF86DRIClipRectRec scissor_rect;
+   drm_clip_rect_t draw_rect;
+   drm_clip_rect_t scissor_rect;
 
    drmContext hHWContext;
-   drmLock *driHwLock;
+   drm_hw_lock_t *driHwLock;
    int driFd;
 
    __DRIdrawablePrivate *driDrawable;
diff --git a/src/mesa/drivers/dri/i830/i830_ioctl.c b/src/mesa/drivers/dri/i830/i830_ioctl.c
index a0f062505b..cad48db9df 100644
--- a/src/mesa/drivers/dri/i830/i830_ioctl.c
+++ b/src/mesa/drivers/dri/i830/i830_ioctl.c
@@ -480,7 +480,7 @@ static void i830Clear(GLcontext *ctx, GLbitfield mask, GLboolean all,
       for (i = 0 ; i < imesa->numClipRects ; ) 
       { 	 
 	 int nr = MIN2(i + I830_NR_SAREA_CLIPRECTS, imesa->numClipRects);
-	 XF86DRIClipRectRec *box = imesa->pClipRects;	 
+	 drm_clip_rect_t *box = imesa->pClipRects;	 
 	 drm_clip_rect_t *b = (drm_clip_rect_t *)imesa->sarea->boxes;
 	 int n = 0;
 
@@ -533,7 +533,7 @@ static void i830Clear(GLcontext *ctx, GLbitfield mask, GLboolean all,
 void i830CopyBuffer( const __DRIdrawablePrivate *dPriv ) 
 {
    i830ContextPtr imesa;
-   XF86DRIClipRectPtr pbox;
+   drm_clip_rect_t *pbox;
    int nbox, i, tmp;
 
    assert(dPriv);
@@ -554,7 +554,7 @@ void i830CopyBuffer( const __DRIdrawablePrivate *dPriv )
    for (i = 0 ; i < nbox ; )
    {
       int nr = MIN2(i + I830_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
-      XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)imesa->sarea->boxes;
+      drm_clip_rect_t *b = (drm_clip_rect_t *)imesa->sarea->boxes;
 
       imesa->sarea->nbox = nr - i;
 
@@ -600,7 +600,7 @@ void i830PageFlip( const __DRIdrawablePrivate *dPriv )
    imesa->perf_boxes = 0;
 
    if (dPriv->pClipRects) {
-      *(XF86DRIClipRectRec *)imesa->sarea->boxes = dPriv->pClipRects[0];
+      *(drm_clip_rect_t *)imesa->sarea->boxes = dPriv->pClipRects[0];
       imesa->sarea->nbox = 1;
    }
 
@@ -702,7 +702,7 @@ static void age_imesa( i830ContextPtr imesa, int age )
 
 void i830FlushPrimsLocked( i830ContextPtr imesa )
 {
-   XF86DRIClipRectPtr pbox = (XF86DRIClipRectPtr)imesa->pClipRects;
+   drm_clip_rect_t *pbox = imesa->pClipRects;
    int nbox = imesa->numClipRects;
    drmBufPtr buffer = imesa->vertex_buffer;
    I830SAREAPtr sarea = imesa->sarea;
@@ -750,7 +750,7 @@ void i830FlushPrimsLocked( i830ContextPtr imesa )
    }
 
    for (i = 0 ; i < nbox ; i = nr ) {
-      XF86DRIClipRectPtr b = sarea->boxes;
+      drm_clip_rect_t *b = sarea->boxes;
       int j;
 
       nr = MIN2(i + I830_NR_SAREA_CLIPRECTS, nbox);
diff --git a/src/mesa/drivers/dri/i830/server/i830_dri.h b/src/mesa/drivers/dri/i830/server/i830_dri.h
index 69a4f678d2..f2a1a53874 100644
--- a/src/mesa/drivers/dri/i830/server/i830_dri.h
+++ b/src/mesa/drivers/dri/i830/server/i830_dri.h
@@ -82,7 +82,7 @@ typedef struct _I830SAREA {
    unsigned int dirty;
 
    unsigned int nbox;
-   XF86DRIClipRectRec boxes[I830_NR_SAREA_CLIPRECTS];
+   drm_clip_rect_t boxes[I830_NR_SAREA_CLIPRECTS];
 
    /* Maintain an LRU of contiguous regions of texture space.  If
     * you think you own a region of texture memory, and it has an
diff --git a/src/mesa/drivers/dri/mach64/Makefile.solo b/src/mesa/drivers/dri/mach64/Makefile.solo
index 9d6769917a..8815df6ccc 100644
--- a/src/mesa/drivers/dri/mach64/Makefile.solo
+++ b/src/mesa/drivers/dri/mach64/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/mach64/mach64_context.c b/src/mesa/drivers/dri/mach64/mach64_context.c
index c0ffb21bc2..771204153f 100644
--- a/src/mesa/drivers/dri/mach64/mach64_context.c
+++ b/src/mesa/drivers/dri/mach64/mach64_context.c
@@ -26,7 +26,7 @@
  * Authors:
  *	Gareth Hughes <gareth@valinux.com>
  *	Leif Delgass <ldelgass@retinalburn.net>
- *	José Fonseca <j_r_fonseca@yahoo.co.uk>
+ *	Jos�Fonseca <j_r_fonseca@yahoo.co.uk>
  */
 
 #include "glheader.h"
@@ -144,7 +144,7 @@ GLboolean mach64CreateContext( const __GLcontextModes *glVisual,
                         mach64Screen->driScreen->myNum, "mach64");
 
    mmesa->sarea = (ATISAREAPrivPtr)((char *)driScreen->pSAREA +
-				    sizeof(XF86DRISAREARec));
+				    sizeof(drm_sarea_t));
 
    mmesa->CurrentTexObj[0] = NULL;
    mmesa->CurrentTexObj[1] = NULL;
diff --git a/src/mesa/drivers/dri/mach64/mach64_context.h b/src/mesa/drivers/dri/mach64/mach64_context.h
index 95c69270c5..92fea6e8eb 100644
--- a/src/mesa/drivers/dri/mach64/mach64_context.h
+++ b/src/mesa/drivers/dri/mach64/mach64_context.h
@@ -26,7 +26,7 @@
  * Authors:
  *	Gareth Hughes <gareth@valinux.com>
  *	Leif Delgass <ldelgass@retinalburn.net>
- *	José Fonseca <j_r_fonseca@yahoo.co.uk>
+ *	Jos�Fonseca <j_r_fonseca@yahoo.co.uk>
  */
 
 #ifndef __MACH64_CONTEXT_H__
@@ -158,7 +158,7 @@ typedef void (*mach64_line_func)( mach64ContextPtr,
 typedef void (*mach64_point_func)( mach64ContextPtr,
 				     mach64Vertex * );
 
-#if TEXMEM
+#ifdef TEXMEM
 struct mach64_texture_object {
    driTextureObject   base;
 
@@ -253,7 +253,7 @@ struct mach64_context {
    /* Texture object bookkeeping
     */
    mach64TexObjPtr CurrentTexObj[2];
-#if TEXMEM
+#ifdef TEXMEM
    unsigned nr_heaps;
    driTexHeap * texture_heaps[ R128_NR_TEX_HEAPS ];
    driTextureObject swapped;
@@ -290,10 +290,10 @@ struct mach64_context {
    GLint readOffset, readPitch;
 
    GLuint numClipRects;			/* Cliprects for the draw buffer */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
 
    GLint scissor;
-   XF86DRIClipRectRec ScissorRect;	/* Current software scissor */
+   drm_clip_rect_t ScissorRect;	/* Current software scissor */
 
    /* Mirrors of some DRI state
     */
@@ -304,7 +304,7 @@ struct mach64_context {
    unsigned int lastStamp;		/* mirror driDrawable->lastStamp */
 
    drmContext hHWContext;
-   drmLock *driHwLock;
+   drm_hw_lock_t *driHwLock;
    int driFd;
 
    mach64ScreenPtr mach64Screen;	/* Screen private DRI data */
diff --git a/src/mesa/drivers/dri/mach64/mach64_ioctl.c b/src/mesa/drivers/dri/mach64/mach64_ioctl.c
index 4c391fec24..19b0c26c4d 100644
--- a/src/mesa/drivers/dri/mach64/mach64_ioctl.c
+++ b/src/mesa/drivers/dri/mach64/mach64_ioctl.c
@@ -26,7 +26,7 @@
  * Authors:
  *	Gareth Hughes <gareth@valinux.com>
  *	Leif Delgass <ldelgass@retinalburn.net>
- *	José Fonseca <j_r_fonseca@yahoo.co.uk>
+ *	Jos�Fonseca <j_r_fonseca@yahoo.co.uk>
  */
 #include <errno.h>
 
@@ -98,7 +98,7 @@ drmBufPtr mach64GetBufferLocked( mach64ContextPtr mmesa )
 
 void mach64FlushVerticesLocked( mach64ContextPtr mmesa )
 {
-   XF86DRIClipRectPtr pbox = mmesa->pClipRects;
+   drm_clip_rect_t *pbox = mmesa->pClipRects;
    int nbox = mmesa->numClipRects;
    void *buffer = mmesa->vert_buf;
    int count = mmesa->vert_used;
@@ -144,7 +144,7 @@ void mach64FlushVerticesLocked( mach64ContextPtr mmesa )
 
       for ( i = 0 ; i < nbox ; ) {
 	 int nr = MIN2( i + MACH64_NR_SAREA_CLIPRECTS, nbox );
-	 XF86DRIClipRectPtr b = mmesa->sarea->boxes;
+	 drm_clip_rect_t *b = mmesa->sarea->boxes;
 	 int discard = 0;
 
 	 mmesa->sarea->nbox = nr - i;
@@ -269,7 +269,7 @@ void mach64CopyBuffer( const __DRIdrawablePrivate *dPriv )
 {
    mach64ContextPtr mmesa;
    GLint nbox, i, ret;
-   XF86DRIClipRectPtr pbox;
+   drm_clip_rect_t *pbox;
    GLboolean missed_target;
 
    assert(dPriv);
@@ -315,7 +315,7 @@ void mach64CopyBuffer( const __DRIdrawablePrivate *dPriv )
 
    for ( i = 0 ; i < nbox ; ) {
       GLint nr = MIN2( i + MACH64_NR_SAREA_CLIPRECTS , nbox );
-      XF86DRIClipRectPtr b = mmesa->sarea->boxes;
+      drm_clip_rect_t *b = mmesa->sarea->boxes;
       GLint n = 0;
 
       for ( ; i < nr ; i++ ) {
@@ -393,7 +393,7 @@ void mach64PerformanceBoxesLocked( mach64ContextPtr mmesa )
    GLuint color;
    GLint nbox;
    GLint x1, y1, x2, y2;
-   XF86DRIClipRectPtr b = mmesa->sarea->boxes;
+   drm_clip_rect_t *b = mmesa->sarea->boxes;
 
    /* save cliprects */
    nbox = mmesa->sarea->nbox;
@@ -719,8 +719,8 @@ static void mach64DDClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 
    for ( i = 0 ; i < mmesa->numClipRects ; ) {
       int nr = MIN2( i + MACH64_NR_SAREA_CLIPRECTS, mmesa->numClipRects );
-      XF86DRIClipRectPtr box = mmesa->pClipRects;
-      XF86DRIClipRectPtr b = mmesa->sarea->boxes;
+      drm_clip_rect_t *box = mmesa->pClipRects;
+      drm_clip_rect_t *b = mmesa->sarea->boxes;
       GLint n = 0;
 
       if ( !all ) {
diff --git a/src/mesa/drivers/dri/mach64/mach64_state.c b/src/mesa/drivers/dri/mach64/mach64_state.c
index 2c8e20d573..9c37d85490 100644
--- a/src/mesa/drivers/dri/mach64/mach64_state.c
+++ b/src/mesa/drivers/dri/mach64/mach64_state.c
@@ -26,7 +26,7 @@
  * Authors:
  *	Gareth Hughes <gareth@valinux.com>
  *	Leif Delgass <ldelgass@retinalburn.net>
- *	José Fonseca <j_r_fonseca@yahoo.co.uk>
+ *	Jos�Fonseca <j_r_fonseca@yahoo.co.uk>
  */
 
 #include "mach64_context.h"
@@ -694,19 +694,19 @@ void mach64SetCliprects( GLcontext *ctx, GLenum mode )
    switch ( mode ) {
    case GL_FRONT_LEFT:
       mmesa->numClipRects = dPriv->numClipRects;
-      mmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+      mmesa->pClipRects = dPriv->pClipRects;
       mmesa->drawX = dPriv->x;
       mmesa->drawY = dPriv->y;
       break;
    case GL_BACK_LEFT:
       if ( dPriv->numBackClipRects == 0 ) {
 	 mmesa->numClipRects = dPriv->numClipRects;
-	 mmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+	 mmesa->pClipRects = dPriv->pClipRects;
 	 mmesa->drawX = dPriv->x;
 	 mmesa->drawY = dPriv->y;
       } else {
 	 mmesa->numClipRects = dPriv->numBackClipRects;
-	 mmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pBackClipRects;
+	 mmesa->pClipRects = dPriv->pBackClipRects;
 	 mmesa->drawX = dPriv->backX;
 	 mmesa->drawY = dPriv->backY;
       }
diff --git a/src/mesa/drivers/dri/mach64/server/mach64_sarea.h b/src/mesa/drivers/dri/mach64/server/mach64_sarea.h
index 31323fa68e..a519cde18a 100644
--- a/src/mesa/drivers/dri/mach64/server/mach64_sarea.h
+++ b/src/mesa/drivers/dri/mach64/server/mach64_sarea.h
@@ -130,7 +130,7 @@ typedef struct {
 
    /* The current cliprects, or a subset thereof.
     */
-   XF86DRIClipRectRec boxes[MACH64_NR_SAREA_CLIPRECTS];
+   drm_clip_rect_t boxes[MACH64_NR_SAREA_CLIPRECTS];
    unsigned int nbox;
 
    /* Counter for throttling of rendering clients.
diff --git a/src/mesa/drivers/dri/mga/Makefile.solo b/src/mesa/drivers/dri/mga/Makefile.solo
index 6d078e6868..b4cee99bed 100644
--- a/src/mesa/drivers/dri/mga/Makefile.solo
+++ b/src/mesa/drivers/dri/mga/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/mga/mgacontext.h b/src/mesa/drivers/dri/mga/mgacontext.h
index 97ea04256d..f2ef14a8ab 100644
--- a/src/mesa/drivers/dri/mga/mgacontext.h
+++ b/src/mesa/drivers/dri/mga/mgacontext.h
@@ -278,12 +278,12 @@ struct mga_context_t {
    int drawX, drawY;		/* origin of drawable in draw buffer */
    int lastX, lastY;		/* detect DSTORG bug */
    GLuint numClipRects;		/* cliprects for the draw buffer */
-   XF86DRIClipRectPtr pClipRects;
-   XF86DRIClipRectRec draw_rect;
-   XF86DRIClipRectRec scissor_rect;
+   drm_clip_rect_t *pClipRects;
+   drm_clip_rect_t draw_rect;
+   drm_clip_rect_t scissor_rect;
    int scissor;
 
-   XF86DRIClipRectRec tmp_boxes[2][MGA_NR_SAREA_CLIPRECTS];
+   drm_clip_rect_t tmp_boxes[2][MGA_NR_SAREA_CLIPRECTS];
 
 
    /* Texture aging and DMA based aging.
@@ -296,7 +296,7 @@ struct mga_context_t {
    /* Mirrors of some DRI state.
     */
    drmContext hHWContext;
-   drmLock *driHwLock;
+   drm_hw_lock_t *driHwLock;
    int driFd;
    __DRIdrawablePrivate *driDrawable;
    __DRIdrawablePrivate *driReadable;
diff --git a/src/mesa/drivers/dri/mga/mgaioctl.c b/src/mesa/drivers/dri/mga/mgaioctl.c
index 1179be1eb6..f4cc055d14 100644
--- a/src/mesa/drivers/dri/mga/mgaioctl.c
+++ b/src/mesa/drivers/dri/mga/mgaioctl.c
@@ -218,8 +218,8 @@ mgaClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
       for (i = 0 ; i < mmesa->numClipRects ; )
       {
 	 int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, mmesa->numClipRects);
-	 XF86DRIClipRectPtr box = mmesa->pClipRects;
-	 XF86DRIClipRectPtr b = mmesa->sarea->boxes;
+	 drm_clip_rect_t *box = mmesa->pClipRects;
+	 drm_clip_rect_t *b = mmesa->sarea->boxes;
 	 int n = 0;
 
 	 if (!all) {
@@ -245,7 +245,7 @@ mgaClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 	    }
 	 } else {
 	    for ( ; i < nr ; i++) {
-	       *b++ = *(XF86DRIClipRectPtr)&box[i];
+	       *b++ = box[i];
 	       n++;
 	    }
 	 }
@@ -325,7 +325,7 @@ static void mgaWaitForFrameCompletion( mgaContextPtr mmesa )
 void mgaCopyBuffer( const __DRIdrawablePrivate *dPriv )
 {
    mgaContextPtr mmesa;
-   XF86DRIClipRectPtr pbox;
+   drm_clip_rect_t *pbox;
    GLint nbox;
    GLint ret;
    GLint i;
@@ -363,7 +363,7 @@ void mgaCopyBuffer( const __DRIdrawablePrivate *dPriv )
    for (i = 0 ; i < nbox ; )
    {
       int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
-      XF86DRIClipRectPtr b = mmesa->sarea->boxes;
+      drm_clip_rect_t *b = mmesa->sarea->boxes;
 
       mmesa->sarea->nbox = nr - i;
 
@@ -428,9 +428,9 @@ void mgaWaitAge( mgaContextPtr mmesa, int age  )
 }
 
 
-static GLboolean intersect_rect( XF86DRIClipRectPtr out,
-				 const XF86DRIClipRectPtr a,
-				 const XF86DRIClipRectPtr b )
+static GLboolean intersect_rect( drm_clip_rect_t *out,
+				 const drm_clip_rect_t *a,
+				 const drm_clip_rect_t *b )
 {
    *out = *a;
    if (b->x1 > out->x1) out->x1 = b->x1;
@@ -456,7 +456,7 @@ static int __break_vertex = 0;
 
 void mgaFlushVerticesLocked( mgaContextPtr mmesa )
 {
-   XF86DRIClipRectPtr pbox = mmesa->pClipRects;
+   drm_clip_rect_t *pbox = mmesa->pClipRects;
    int nbox = mmesa->numClipRects;
    drmBufPtr buffer = mmesa->vertex_dma_buffer;
    drmMGAVertex vertex;
@@ -508,7 +508,7 @@ void mgaFlushVerticesLocked( mgaContextPtr mmesa )
       for (i = 0 ; i < nbox ; )
       {
 	 int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, nbox);
-	 XF86DRIClipRectPtr b = mmesa->sarea->boxes;
+	 drm_clip_rect_t *b = mmesa->sarea->boxes;
 	 int discard = 0;
 
 	 if (mmesa->scissor) {
diff --git a/src/mesa/drivers/dri/mga/mgastate.c b/src/mesa/drivers/dri/mga/mgastate.c
index 2066b93436..f16557dc1e 100644
--- a/src/mesa/drivers/dri/mga/mgastate.c
+++ b/src/mesa/drivers/dri/mga/mgastate.c
@@ -746,7 +746,7 @@ static void mgaXMesaSetFrontClipRects( mgaContextPtr mmesa )
    __DRIdrawablePrivate *driDrawable = mmesa->driDrawable;
 
    if (driDrawable->numClipRects == 0) {
-       static XF86DRIClipRectRec zeroareacliprect = {0,0,0,0};
+       static drm_clip_rect_t zeroareacliprect = {0,0,0,0};
        mmesa->numClipRects = 1;
        mmesa->pClipRects = &zeroareacliprect;
    } else {
@@ -768,7 +768,7 @@ static void mgaXMesaSetBackClipRects( mgaContextPtr mmesa )
    if (driDrawable->numBackClipRects == 0)
    {
       if (driDrawable->numClipRects == 0) {
-	  static XF86DRIClipRectRec zeroareacliprect = {0,0,0,0};
+	  static drm_clip_rect_t zeroareacliprect = {0,0,0,0};
 	  mmesa->numClipRects = 1;
 	  mmesa->pClipRects = &zeroareacliprect;
       } else {
diff --git a/src/mesa/drivers/dri/mga/server/mga_dri.c b/src/mesa/drivers/dri/mga/server/mga_dri.c
index 19ddb38510..eab4ab087a 100644
--- a/src/mesa/drivers/dri/mga/server/mga_dri.c
+++ b/src/mesa/drivers/dri/mga/server/mga_dri.c
@@ -43,9 +43,6 @@
 #include "mga_dri.h"
 #include "mga_sarea.h"
 
-#include "sarea.h"
-
-
 
 /* Quiescence, locking
  */
@@ -367,7 +364,7 @@ static int MGADRIKernelInit( struct DRIDriverContextRec *ctx, MGAPtr pMga )
    memset( &init, 0, sizeof(drmMGAInit) );
 
    init.func = MGA_INIT_DMA;
-   init.sarea_priv_offset = sizeof(XF86DRISAREARec);
+   init.sarea_priv_offset = sizeof(drm_sarea_t);
 
    switch ( pMga->Chipset ) {
    case PCI_CHIP_MGAG550:
@@ -624,7 +621,7 @@ static void print_client_msg( MGADRIPtr pMGADRI )
    pMGADRI->primary.size	= pMga->primary.size;
    pMGADRI->buffers.handle	= pMga->buffers.handle;
    pMGADRI->buffers.size	= pMga->buffers.size;
-   pMGADRI->sarea_priv_offset = sizeof(XF86DRISAREARec);
+   pMGADRI->sarea_priv_offset = sizeof(drm_sarea_t);
 #endif
 }
 
@@ -801,7 +798,7 @@ static int MGAScreenInit( struct DRIDriverContextRec *ctx, MGAPtr pMga )
    {
       MGASAREAPrivPtr pSAREAPriv;
       pSAREAPriv = (MGASAREAPrivPtr)(((char*)ctx->pSAREA) + 
-					sizeof(XF86DRISAREARec));
+					sizeof(drm_sarea_t));
       memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
    }
 
@@ -872,7 +869,7 @@ static int MGAScreenInit( struct DRIDriverContextRec *ctx, MGAPtr pMga )
    pMGADRI->primary.size	= pMga->primary.size;
    pMGADRI->buffers.handle	= pMga->buffers.handle;
    pMGADRI->buffers.size	= pMga->buffers.size;
-   pMGADRI->sarea_priv_offset = sizeof(XF86DRISAREARec);
+   pMGADRI->sarea_priv_offset = sizeof(drm_sarea_t);
 
    print_client_msg( pMGADRI );
 
diff --git a/src/mesa/drivers/dri/mga/server/mga_sarea.h b/src/mesa/drivers/dri/mga/server/mga_sarea.h
index 8bfa3f51d5..747626d8ab 100644
--- a/src/mesa/drivers/dri/mga/server/mga_sarea.h
+++ b/src/mesa/drivers/dri/mga/server/mga_sarea.h
@@ -176,7 +176,7 @@ typedef struct {
 
    /* The current cliprects, or a subset thereof.
     */
-   XF86DRIClipRectRec boxes[MGA_NR_SAREA_CLIPRECTS];
+   drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
    unsigned int nbox;
 
    /* Information about the most recently used 3d drawable.  The
@@ -197,7 +197,7 @@ typedef struct {
    unsigned int exported_nback;
    int exported_back_x, exported_front_x, exported_w;
    int exported_back_y, exported_front_y, exported_h;
-   XF86DRIClipRectRec exported_boxes[MGA_NR_SAREA_CLIPRECTS];
+   drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
 
    /* Counters for aging textures and for client-side throttling.
     */
diff --git a/src/mesa/drivers/dri/r128/Makefile.solo b/src/mesa/drivers/dri/r128/Makefile.solo
index cb40c7692e..8017979854 100644
--- a/src/mesa/drivers/dri/r128/Makefile.solo
+++ b/src/mesa/drivers/dri/r128/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/r128/r128_context.h b/src/mesa/drivers/dri/r128/r128_context.h
index fba6077b29..0a8735fd08 100644
--- a/src/mesa/drivers/dri/r128/r128_context.h
+++ b/src/mesa/drivers/dri/r128/r128_context.h
@@ -181,10 +181,10 @@ struct r128_context {
    GLint readOffset, readPitch;
 
    GLuint numClipRects;			/* Cliprects for the draw buffer */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
 
    GLuint scissor;
-   XF86DRIClipRectRec ScissorRect;	/* Current software scissor */
+   drm_clip_rect_t ScissorRect;	/* Current software scissor */
 
    /* Mirrors of some DRI state
     */
@@ -195,7 +195,7 @@ struct r128_context {
    unsigned int lastStamp;	        /* mirror driDrawable->lastStamp */
 
    drmContext hHWContext;
-   drmLock *driHwLock;
+   drm_hw_lock_t *driHwLock;
    int driFd;
 
    r128ScreenPtr r128Screen;		/* Screen private DRI data */
diff --git a/src/mesa/drivers/dri/r128/r128_ioctl.c b/src/mesa/drivers/dri/r128/r128_ioctl.c
index 6b2785eebe..e1c959b35f 100644
--- a/src/mesa/drivers/dri/r128/r128_ioctl.c
+++ b/src/mesa/drivers/dri/r128/r128_ioctl.c
@@ -106,7 +106,7 @@ drmBufPtr r128GetBufferLocked( r128ContextPtr rmesa )
 
 void r128FlushVerticesLocked( r128ContextPtr rmesa )
 {
-   XF86DRIClipRectPtr pbox = rmesa->pClipRects;
+   drm_clip_rect_t *pbox = rmesa->pClipRects;
    int nbox = rmesa->numClipRects;
    drmBufPtr buffer = rmesa->vert_buf;
    int count = rmesa->num_verts;
@@ -148,7 +148,7 @@ void r128FlushVerticesLocked( r128ContextPtr rmesa )
    {
       for ( i = 0 ; i < nbox ; ) {
 	 int nr = MIN2( i + R128_NR_SAREA_CLIPRECTS, nbox );
-	 XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+	 drm_clip_rect_t *b = rmesa->sarea->boxes;
 	 int discard = 0;
 
 	 rmesa->sarea->nbox = nr - i;
@@ -291,12 +291,12 @@ void r128CopyBuffer( const __DRIdrawablePrivate *dPriv )
 
    for ( i = 0 ; i < nbox ; ) {
       GLint nr = MIN2( i + R128_NR_SAREA_CLIPRECTS , nbox );
-      XF86DRIClipRectPtr box = dPriv->pClipRects;
-      XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+      drm_clip_rect_t *box = dPriv->pClipRects;
+      drm_clip_rect_t *b = rmesa->sarea->boxes;
       GLint n = 0;
 
       for ( ; i < nr ; i++ ) {
-	 *b++ = *(XF86DRIClipRectRec *)&box[i];
+	 *b++ = box[i];
 	 n++;
       }
       rmesa->sarea->nbox = n;
@@ -470,8 +470,8 @@ static void r128Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 
       for ( i = 0 ; i < rmesa->numClipRects ; ) {
 	 GLint nr = MIN2( i + R128_NR_SAREA_CLIPRECTS , rmesa->numClipRects );
-	 XF86DRIClipRectPtr box = rmesa->pClipRects;
-	 XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+	 drm_clip_rect_t *box = rmesa->pClipRects;
+	 drm_clip_rect_t *b = rmesa->sarea->boxes;
 	 GLint n = 0;
 
 	 if ( !all ) {
@@ -497,7 +497,7 @@ static void r128Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 	    }
 	 } else {
 	    for ( ; i < nr ; i++ ) {
-	       *b++ = *(XF86DRIClipRectPtr)&box[i];
+	       *b++ = box[i];
 	       n++;
 	    }
 	 }
@@ -548,7 +548,7 @@ void r128WriteDepthSpanLocked( r128ContextPtr rmesa,
 			       const GLdepth depth[],
 			       const GLubyte mask[] )
 {
-   XF86DRIClipRectPtr pbox = rmesa->pClipRects;
+   drm_clip_rect_t *pbox = rmesa->pClipRects;
    drmR128Depth d;
    int nbox = rmesa->numClipRects;
    int fd = rmesa->driScreen->fd;
@@ -583,7 +583,7 @@ void r128WriteDepthSpanLocked( r128ContextPtr rmesa,
    {
       for (i = 0 ; i < nbox ; ) {
 	 int nr = MIN2( i + R128_NR_SAREA_CLIPRECTS, nbox );
-	 XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+	 drm_clip_rect_t *b = rmesa->sarea->boxes;
 
 	 rmesa->sarea->nbox = nr - i;
 	 for ( ; i < nr ; i++) {
@@ -611,7 +611,7 @@ void r128WriteDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 				 const GLdepth depth[],
 				 const GLubyte mask[] )
 {
-   XF86DRIClipRectPtr pbox = rmesa->pClipRects;
+   drm_clip_rect_t *pbox = rmesa->pClipRects;
    drmR128Depth d;
    int nbox = rmesa->numClipRects;
    int fd = rmesa->driScreen->fd;
@@ -645,7 +645,7 @@ void r128WriteDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
    {
       for (i = 0 ; i < nbox ; ) {
 	 int nr = MIN2( i + R128_NR_SAREA_CLIPRECTS, nbox );
-	 XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+	 drm_clip_rect_t *b = rmesa->sarea->boxes;
 
 	 rmesa->sarea->nbox = nr - i;
 	 for ( ; i < nr ; i++) {
@@ -671,7 +671,7 @@ void r128WriteDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 void r128ReadDepthSpanLocked( r128ContextPtr rmesa,
 			      GLuint n, GLint x, GLint y )
 {
-   XF86DRIClipRectPtr pbox = rmesa->pClipRects;
+   drm_clip_rect_t *pbox = rmesa->pClipRects;
    drmR128Depth d;
    int nbox = rmesa->numClipRects;
    int fd = rmesa->driScreen->fd;
@@ -705,7 +705,7 @@ void r128ReadDepthSpanLocked( r128ContextPtr rmesa,
    {
       for (i = 0 ; i < nbox ; ) {
 	 int nr = MIN2( i + R128_NR_SAREA_CLIPRECTS, nbox );
-	 XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+	 drm_clip_rect_t *b = rmesa->sarea->boxes;
 
 	 rmesa->sarea->nbox = nr - i;
 	 for ( ; i < nr ; i++) {
@@ -731,7 +731,7 @@ void r128ReadDepthSpanLocked( r128ContextPtr rmesa,
 void r128ReadDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 				const GLint x[], const GLint y[] )
 {
-   XF86DRIClipRectPtr pbox = rmesa->pClipRects;
+   drm_clip_rect_t *pbox = rmesa->pClipRects;
    drmR128Depth d;
    int nbox = rmesa->numClipRects;
    int fd = rmesa->driScreen->fd;
@@ -765,7 +765,7 @@ void r128ReadDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
    {
       for (i = 0 ; i < nbox ; ) {
 	 int nr = MIN2( i + R128_NR_SAREA_CLIPRECTS, nbox );
-	 XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+	 drm_clip_rect_t *b = rmesa->sarea->boxes;
 
 	 rmesa->sarea->nbox = nr - i;
 	 for ( ; i < nr ; i++) {
diff --git a/src/mesa/drivers/dri/r128/server/r128_dri.c b/src/mesa/drivers/dri/r128/server/r128_dri.c
index 633c5ad5b3..8fd6b6e77d 100644
--- a/src/mesa/drivers/dri/r128/server/r128_dri.c
+++ b/src/mesa/drivers/dri/r128/server/r128_dri.c
@@ -37,7 +37,6 @@
  *
  */
 
-#include "sarea.h"
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
@@ -49,7 +48,6 @@
 #include "driver.h"
 #include "drm.h"
 
-#include "sarea.h"
 #include "r128.h"
 #include "r128_dri.h"
 #include "r128_macros.h"
@@ -465,7 +463,7 @@ static int R128DRIKernelInit(const DRIDriverContext *ctx)
     memset( &drmInfo, 0, sizeof(drmR128Init) );
 
     drmInfo.func                = DRM_R128_INIT_CCE;
-    drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);
+    drmInfo.sarea_priv_offset   = sizeof(drm_sarea_t);
     drmInfo.is_pci              = info->IsPCI;
     drmInfo.cce_mode            = info->CCEMode;
     drmInfo.cce_secure          = info->CCESecure;
@@ -888,7 +886,7 @@ static GLboolean R128DRIScreenInit(DRIDriverContext *ctx)
     
     R128SAREAPrivPtr pSAREAPriv;
     pSAREAPriv = (R128SAREAPrivPtr)(((char*)ctx->pSAREA) + 
-					sizeof(XF86DRISAREARec));
+					sizeof(drm_sarea_t));
     memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
 
    /* This is the struct passed to radeon_dri.so for its initialization */
@@ -923,7 +921,7 @@ static GLboolean R128DRIScreenInit(DRIDriverContext *ctx)
     pR128DRI->agpTexMapSize     = info->agpTexMapSize;
     pR128DRI->log2AGPTexGran    = info->log2AGPTexGran;
     pR128DRI->agpTexOffset      = info->agpTexStart;
-    pR128DRI->sarea_priv_offset = sizeof(XF86DRISAREARec);
+    pR128DRI->sarea_priv_offset = sizeof(drm_sarea_t);
 
     return GL_TRUE;
 }
diff --git a/src/mesa/drivers/dri/r128/server/r128_sarea.h b/src/mesa/drivers/dri/r128/server/r128_sarea.h
index 8a9f3a4176..d5f431f12e 100644
--- a/src/mesa/drivers/dri/r128/server/r128_sarea.h
+++ b/src/mesa/drivers/dri/r128/server/r128_sarea.h
@@ -159,7 +159,7 @@ typedef struct {
 #if defined(XF86DRI) | defined(_SOLO)
     /* The current cliprects, or a subset thereof.
      */
-    XF86DRIClipRectRec boxes[R128_NR_SAREA_CLIPRECTS];
+    drm_clip_rect_t boxes[R128_NR_SAREA_CLIPRECTS];
     unsigned int nbox;
 #endif
 
diff --git a/src/mesa/drivers/dri/r200/Makefile.solo b/src/mesa/drivers/dri/r200/Makefile.solo
index b0959b2b7f..e2ac301cf3 100644
--- a/src/mesa/drivers/dri/r200/Makefile.solo
+++ b/src/mesa/drivers/dri/r200/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
@@ -73,13 +73,13 @@ OBJECTS = $(C_SOURCES:.c=.o) \
 	  $(ASM_SOURCES:.S=.o) 
 
 SYMLINKS = \
-	server/radeon_common.h \
 	server/radeon_dri.c \
 	server/radeon_dri.h \
 	server/radeon.h \
 	server/radeon_macros.h \
-	server/radeon_reg.h \
-	server/radeon_sarea.h \
+	server/radeon_reg.h
+#	server/radeon_sarea.h \
+#	server/radeon_common.h \
 
 
 $(SYMLINKS):
diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index 08dab8a4d8..edea2df572 100644
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -172,7 +172,7 @@ extern void r200EmitVbufPrim( r200ContextPtr rmesa,
 				GLuint primitive,
 				GLuint vertex_nr )
 {
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
 
    assert(!(primitive & R200_VF_PRIM_WALK_IND));
    
@@ -182,7 +182,7 @@ extern void r200EmitVbufPrim( r200ContextPtr rmesa,
       fprintf(stderr, "%s cmd_used/4: %d prim %x nr %d\n", __FUNCTION__,
 	      rmesa->store.cmd_used/4, primitive, vertex_nr);
    
-   cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 3 * sizeof(*cmd),
+   cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 3 * sizeof(*cmd),
 						  __FUNCTION__ );
    cmd[0].i = 0;
    cmd[0].header.cmd_type = RADEON_CMD_PACKET3_CLIP;
@@ -225,7 +225,7 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
 				    GLuint primitive,
 				    GLuint min_nr )
 {
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
    GLushort *retval;
 
    if (R200_DEBUG & DEBUG_IOCTL)
@@ -235,7 +235,7 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
    
    r200EmitState( rmesa );
    
-   cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 
+   cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 
 						12 + min_nr*2,
 						__FUNCTION__ );
    cmd[0].i = 0;
@@ -268,13 +268,13 @@ void r200EmitVertexAOS( r200ContextPtr rmesa,
 			  GLuint vertex_size,
 			  GLuint offset )
 {
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
 
    if (R200_DEBUG & (DEBUG_PRIMS|DEBUG_IOCTL))
       fprintf(stderr, "%s:  vertex_size 0x%x offset 0x%x \n",
 	      __FUNCTION__, vertex_size, offset);
 
-   cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 5 * sizeof(int),
+   cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 5 * sizeof(int),
 						  __FUNCTION__ );
 
    cmd[0].header.cmd_type = RADEON_CMD_PACKET3;
@@ -290,7 +290,7 @@ void r200EmitAOS( r200ContextPtr rmesa,
 		    GLuint nr,
 		    GLuint offset )
 {
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
    int sz = 3 + ((nr/2)*3) + ((nr&1)*2);
    int i;
    int *tmp;
@@ -298,7 +298,7 @@ void r200EmitAOS( r200ContextPtr rmesa,
    if (R200_DEBUG & DEBUG_IOCTL)
       fprintf(stderr, "%s nr arrays: %d\n", __FUNCTION__, nr);
 
-   cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, sz * sizeof(int),
+   cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, sz * sizeof(int),
 						  __FUNCTION__ );
    cmd[0].i = 0;
    cmd[0].header.cmd_type = RADEON_CMD_PACKET3;
@@ -340,7 +340,7 @@ void r200EmitBlit( r200ContextPtr rmesa,
 		   GLint dstx, GLint dsty,
 		   GLuint w, GLuint h )
 {
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
 
    if (R200_DEBUG & DEBUG_IOCTL)
       fprintf(stderr, "%s src %x/%x %d,%d dst: %x/%x %d,%d sz: %dx%d\n",
@@ -356,7 +356,7 @@ void r200EmitBlit( r200ContextPtr rmesa,
    assert( w < (1<<16) );
    assert( h < (1<<16) );
 
-   cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 8 * sizeof(int),
+   cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 8 * sizeof(int),
 						  __FUNCTION__ );
 
 
@@ -383,11 +383,11 @@ void r200EmitBlit( r200ContextPtr rmesa,
 void r200EmitWait( r200ContextPtr rmesa, GLuint flags )
 {
    if (rmesa->dri.drmMinor >= 6) {
-      drmRadeonCmdHeader *cmd;
+      drm_radeon_cmd_header_t *cmd;
 
       assert( !(flags & ~(RADEON_WAIT_2D|RADEON_WAIT_3D)) );
       
-      cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 1 * sizeof(int),
+      cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 1 * sizeof(int),
 						   __FUNCTION__ );
       cmd[0].i = 0;
       cmd[0].wait.cmd_type = RADEON_CMD_WAIT;
diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index 977dcf38d4..fa37d2b2e2 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -293,7 +293,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
    rmesa->dri.drmMinor = sPriv->drmMinor;
 
    rmesa->r200Screen = screen;
-   rmesa->sarea = (RADEONSAREAPrivPtr)((GLubyte *)sPriv->pSAREA +
+   rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
 				       screen->sarea_priv_offset);
 
 
@@ -309,8 +309,8 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
 	    screen->texSize[i],
 	    12,
 	    RADEON_NR_TEX_REGIONS,
-	    rmesa->sarea->texList[i],
-	    & rmesa->sarea->texAge[i],
+	    (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
+	    & rmesa->sarea->tex_age[i],
 	    & rmesa->swapped,
 	    sizeof( r200TexObj ),
 	    (destroy_texture_object_t *) r200DestroyTexObj );
diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h
index 65ca9ef762..b147e250fa 100644
--- a/src/mesa/drivers/dri/r200/r200_context.h
+++ b/src/mesa/drivers/dri/r200/r200_context.h
@@ -39,8 +39,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifdef GLX_DIRECT_RENDERING
 
 #include <inttypes.h>
+#include "drm.h"
+#include "radeon_drm.h"
 #include "dri_util.h"
-#include "radeon_common.h"
 #include "texmem.h"
 
 #include "macros.h"
@@ -109,12 +110,12 @@ struct r200_pixel_state {
 };
 
 struct r200_scissor_state {
-   XF86DRIClipRectRec rect;
+   drm_clip_rect_t rect;
    GLboolean enabled;
 
    GLuint numClipRects;			/* Cliprects active */
    GLuint numAllocedClipRects;		/* Cliprects available */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
 };
 
 struct r200_stencilbuffer_state {
@@ -149,7 +150,7 @@ struct r200_tex_obj {
 					   brought into the
 					   texunit. */
 
-   drmRadeonTexImage image[6][RADEON_MAX_TEXTURE_LEVELS];
+   drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
 					/* Six, for the cube faces */
 
    GLuint pp_txfilter;		        /* hardware register values */
@@ -568,7 +569,7 @@ struct r200_dri_mirror {
    __DRIdrawablePrivate	*drawable;	/* DRI drawable bound to this ctx */
 
    drmContext hwContext;
-   drmLock *hwLock;
+   drm_hw_lock_t *hwLock;
    int fd;
    int drmMinor;
 };
@@ -804,7 +805,7 @@ struct r200_context {
    GLuint do_usleeps;
    GLuint do_irqs;
    GLuint irqsEmitted;
-   drmRadeonIrqWait iw;
+   drm_radeon_irq_wait_t iw;
 
    /* Clientdata textures;
     */
@@ -813,11 +814,11 @@ struct r200_context {
    /* Drawable, cliprect and scissor information
     */
    GLuint numClipRects;			/* Cliprects for the draw buffer */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
    unsigned int lastStamp;
    GLboolean lost_context;
    r200ScreenPtr r200Screen;	/* Screen private DRI data */
-   RADEONSAREAPrivPtr sarea;		/* Private SAREA data */
+   drm_radeon_sarea_t *sarea;		/* Private SAREA data */
 
    /* TCL stuff
     */
diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c
index 2b5dd88cad..8f1d9fe59c 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.c
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.c
@@ -62,7 +62,7 @@ static void r200WaitForIdle( r200ContextPtr rmesa );
 int r200FlushCmdBufLocked( r200ContextPtr rmesa, const char * caller )
 {
    int ret, i;
-   drmRadeonCmdBuffer cmd;
+   drm_radeon_cmd_buffer_t cmd;
 
    if (R200_DEBUG & DEBUG_IOCTL) {
       fprintf(stderr, "%s from %s\n", __FUNCTION__, caller); 
@@ -108,10 +108,10 @@ int r200FlushCmdBufLocked( r200ContextPtr rmesa, const char * caller )
 
    if (rmesa->state.scissor.enabled) {
       cmd.nbox = rmesa->state.scissor.numClipRects;
-      cmd.boxes = (drmClipRect *)rmesa->state.scissor.pClipRects;
+      cmd.boxes = (drm_clip_rect_t *)rmesa->state.scissor.pClipRects;
    } else {
       cmd.nbox = rmesa->numClipRects;
-      cmd.boxes = (drmClipRect *)rmesa->pClipRects;
+      cmd.boxes = (drm_clip_rect_t *)rmesa->pClipRects;
    }
 
    ret = drmCommandWrite( rmesa->dri.fd,
@@ -243,13 +243,13 @@ void r200ReleaseDmaRegion( r200ContextPtr rmesa,
       rmesa->dma.flush( rmesa );
 
    if (--region->buf->refcount == 0) {
-      drmRadeonCmdHeader *cmd;
+      drm_radeon_cmd_header_t *cmd;
 
       if (R200_DEBUG & (DEBUG_IOCTL|DEBUG_DMA))
 	 fprintf(stderr, "%s -- DISCARD BUF %d\n", __FUNCTION__,
 		 region->buf->buf->idx);  
       
-      cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, sizeof(*cmd), 
+      cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, sizeof(*cmd), 
 						     __FUNCTION__ );
       cmd->dma.cmd_type = RADEON_CMD_DMA_DISCARD;
       cmd->dma.buf_idx = region->buf->buf->idx;
@@ -314,7 +314,7 @@ void r200AllocDmaRegionVerts( r200ContextPtr rmesa,
 
 static CARD32 r200GetLastFrame(r200ContextPtr rmesa)
 {
-   drmRadeonGetParam gp;
+   drm_radeon_getparam_t gp;
    int ret;
    CARD32 frame;
 
@@ -332,7 +332,7 @@ static CARD32 r200GetLastFrame(r200ContextPtr rmesa)
 
 static void r200EmitIrqLocked( r200ContextPtr rmesa )
 {
-   drmRadeonIrqEmit ie;
+   drm_radeon_irq_emit_t ie;
    int ret;
 
    ie.irq_seq = &rmesa->iw.irq_seq;
@@ -363,7 +363,7 @@ static void r200WaitIrq( r200ContextPtr rmesa )
 
 static void r200WaitForFrameCompletion( r200ContextPtr rmesa )
 {
-   RADEONSAREAPrivPtr sarea = rmesa->sarea;
+   drm_radeon_sarea_t *sarea = rmesa->sarea;
 
    if (rmesa->do_irqs) {
       if (r200GetLastFrame(rmesa) < sarea->last_frame) {
@@ -403,7 +403,7 @@ void r200CopyBuffer( const __DRIdrawablePrivate *dPriv )
    r200ContextPtr rmesa;
    GLint nbox, i, ret;
    GLboolean   missed_target;
-   uint64_t ust;
+   int64_t ust;
 
    assert(dPriv);
    assert(dPriv->driContextPriv);
@@ -432,8 +432,8 @@ void r200CopyBuffer( const __DRIdrawablePrivate *dPriv )
 
    for ( i = 0 ; i < nbox ; ) {
       GLint nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS , nbox );
-      XF86DRIClipRectPtr box = dPriv->pClipRects;
-      XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+      drm_clip_rect_t *box = dPriv->pClipRects;
+      drm_clip_rect_t *b = rmesa->sarea->boxes;
       GLint n = 0;
 
       for ( ; i < nr ; i++ ) {
@@ -495,8 +495,8 @@ void r200PageFlip( const __DRIdrawablePrivate *dPriv )
    /* Need to do this for the perf box placement:
     */
    {
-      XF86DRIClipRectPtr box = dPriv->pClipRects;
-      XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+      drm_clip_rect_t *box = dPriv->pClipRects;
+      drm_clip_rect_t *b = rmesa->sarea->boxes;
       b[0] = box[0];
       rmesa->sarea->nbox = 1;
    }
@@ -611,7 +611,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
    /* Throttle the number of clear ioctls we do.
     */
    while ( 1 ) {
-      drmRadeonGetParam gp;
+      drm_radeon_getparam_t gp;
       int ret;
       int clear;
 
@@ -641,10 +641,10 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 
    for ( i = 0 ; i < dPriv->numClipRects ; ) {
       GLint nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS, dPriv->numClipRects );
-      XF86DRIClipRectPtr box = dPriv->pClipRects;
-      XF86DRIClipRectPtr b = rmesa->sarea->boxes;
-      drmRadeonClearType clear;
-      drmRadeonClearRect depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
+      drm_clip_rect_t *box = dPriv->pClipRects;
+      drm_clip_rect_t *b = rmesa->sarea->boxes;
+      drm_radeon_clear_t clear;
+      drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
       GLint n = 0;
 
       if ( !all ) {
@@ -687,15 +687,15 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
       n--;
       b = rmesa->sarea->boxes;
       for ( ; n >= 0 ; n-- ) {
-	 depth_boxes[n].f[RADEON_CLEAR_X1] = (float)b[n].x1;
-	 depth_boxes[n].f[RADEON_CLEAR_Y1] = (float)b[n].y1;
-	 depth_boxes[n].f[RADEON_CLEAR_X2] = (float)b[n].x2;
-	 depth_boxes[n].f[RADEON_CLEAR_Y2] = (float)b[n].y2;
-	 depth_boxes[n].f[RADEON_CLEAR_DEPTH] = ctx->Depth.Clear;
+	 depth_boxes[n].f[CLEAR_X1] = (float)b[n].x1;
+	 depth_boxes[n].f[CLEAR_Y1] = (float)b[n].y1;
+	 depth_boxes[n].f[CLEAR_X2] = (float)b[n].x2;
+	 depth_boxes[n].f[CLEAR_Y2] = (float)b[n].y2;
+	 depth_boxes[n].f[CLEAR_DEPTH] = ctx->Depth.Clear;
       }
 
       ret = drmCommandWrite( rmesa->dri.fd, DRM_RADEON_CLEAR,
-			     &clear, sizeof(drmRadeonClearType));
+			     &clear, sizeof(clear));
 
 
       if ( ret ) {
@@ -789,7 +789,7 @@ void *r200AllocateMemoryMESA(GLsizei size,
    GET_CURRENT_CONTEXT(ctx);
    r200ContextPtr rmesa;
    int region_offset;
-   drmRadeonMemAlloc alloc;
+   drm_radeon_mem_alloc_t alloc;
    int ret;
 
    if (R200_DEBUG & DEBUG_IOCTL)
@@ -832,7 +832,7 @@ void r200FreeMemoryMESA(GLvoid *pointer)
    GET_CURRENT_CONTEXT(ctx);
    r200ContextPtr rmesa;
    int region_offset;
-   drmRadeonMemFree memfree;
+   drm_radeon_mem_free_t memfree;
    int ret;
 
    if (R200_DEBUG & DEBUG_IOCTL)
diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h
index 3c3ad3db54..0679194603 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.h
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.h
@@ -43,7 +43,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r200_lock.h"
 
 #include "xf86drm.h"
-#include "radeon_common.h"
+#include "drm.h"
+#include "radeon_drm.h"
 
 extern void r200EmitState( r200ContextPtr rmesa );
 extern void r200EmitVertexAOS( r200ContextPtr rmesa,
diff --git a/src/mesa/drivers/dri/r200/r200_lock.c b/src/mesa/drivers/dri/r200/r200_lock.c
index 3c3356eecb..794a29972a 100644
--- a/src/mesa/drivers/dri/r200/r200_lock.c
+++ b/src/mesa/drivers/dri/r200/r200_lock.c
@@ -32,7 +32,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * Authors:
  *   Keith Whitwell <keith@tungstengraphics.com>
  */
-
+#include <string.h>
+ 
 #include "r200_context.h"
 #include "r200_lock.h"
 #include "r200_tex.h"
@@ -50,7 +51,7 @@ static void
 r200UpdatePageFlipping( r200ContextPtr rmesa )
 {
    int use_back;
-   rmesa->doPageFlip = rmesa->sarea->pfAllowPageFlip;
+   rmesa->doPageFlip = rmesa->sarea->pfState;
 
    use_back = (rmesa->glCtx->Color._DrawDestMask == BACK_LEFT_BIT);
    use_back ^= (rmesa->sarea->pfCurrentPage == 1);
@@ -83,7 +84,7 @@ void r200GetLock( r200ContextPtr rmesa, GLuint flags )
 {
    __DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
    __DRIscreenPrivate *sPriv = rmesa->dri.screen;
-   RADEONSAREAPrivPtr sarea = rmesa->sarea;
+   drm_radeon_sarea_t *sarea = rmesa->sarea;
    int i;
 
    drmGetLock( rmesa->dri.fd, rmesa->dri.hwContext, flags );
@@ -108,8 +109,8 @@ void r200GetLock( r200ContextPtr rmesa, GLuint flags )
       rmesa->lastStamp = dPriv->lastStamp;
    }
 
-   if ( sarea->ctxOwner != rmesa->dri.hwContext ) {
-      sarea->ctxOwner = rmesa->dri.hwContext;
+   if ( sarea->ctx_owner != rmesa->dri.hwContext ) {
+      sarea->ctx_owner = rmesa->dri.hwContext;
    }
 
    for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
diff --git a/src/mesa/drivers/dri/r200/r200_maos.c b/src/mesa/drivers/dri/r200/r200_maos.c
index fd2bd5102a..a97736457f 100644
--- a/src/mesa/drivers/dri/r200/r200_maos.c
+++ b/src/mesa/drivers/dri/r200/r200_maos.c
@@ -3,6 +3,8 @@
 /* If using new packets, can choose either verts or arrays.
  * Otherwise, must use verts.
  */
+#include <string.h>
+ 
 #include "r200_context.h"
 #define R200_MAOS_VERTS 0
 #if (R200_MAOS_VERTS) || (R200_OLD_PACKETS)
diff --git a/src/mesa/drivers/dri/r200/r200_pixel.c b/src/mesa/drivers/dri/r200/r200_pixel.c
index 806484404d..76e619903f 100644
--- a/src/mesa/drivers/dri/r200/r200_pixel.c
+++ b/src/mesa/drivers/dri/r200/r200_pixel.c
@@ -220,7 +220,7 @@ r200TryReadPixels( GLcontext *ctx,
       int src_pitch = rmesa->state.color.drawPitch * rmesa->r200Screen->cpp;
       int dst_offset = r200GartOffsetFromVirtual( rmesa, pixels );
       int dst_pitch = pitch * rmesa->r200Screen->cpp;
-      XF86DRIClipRectRec *box = dPriv->pClipRects;
+      drm_clip_rect_t *box = dPriv->pClipRects;
       int i;
 
       r200EmitWait( rmesa, RADEON_WAIT_3D ); 
@@ -293,7 +293,7 @@ static void do_draw_pix( GLcontext *ctx,
 {
    r200ContextPtr rmesa = R200_CONTEXT(ctx);
    __DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
-   XF86DRIClipRectPtr box = dPriv->pClipRects;
+   drm_clip_rect_t *box = dPriv->pClipRects;
    int nbox = dPriv->numClipRects;
    int i;
    int blit_format;
diff --git a/src/mesa/drivers/dri/r200/r200_sanity.c b/src/mesa/drivers/dri/r200/r200_sanity.c
index 291536d560..a21495df4e 100644
--- a/src/mesa/drivers/dri/r200/r200_sanity.c
+++ b/src/mesa/drivers/dri/r200/r200_sanity.c
@@ -735,8 +735,8 @@ static void dump_state( void )
 
 
 static int radeon_emit_packets( 
-   drmRadeonCmdHeader header,
-   drmRadeonCmdBuffer *cmdbuf )
+   drm_radeon_cmd_header_t header,
+   drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int id = (int)header.packet.packet_id;
    int sz = packet[id].len;
@@ -771,8 +771,8 @@ static int radeon_emit_packets(
 
 
 static int radeon_emit_scalars( 
-   drmRadeonCmdHeader header,
-   drmRadeonCmdBuffer *cmdbuf )
+   drm_radeon_cmd_header_t header,
+   drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int sz = header.scalars.count;
    int *data = (int *)cmdbuf->buf;
@@ -799,8 +799,8 @@ static int radeon_emit_scalars(
 
 
 static int radeon_emit_scalars2( 
-   drmRadeonCmdHeader header,
-   drmRadeonCmdBuffer *cmdbuf )
+   drm_radeon_cmd_header_t header,
+   drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int sz = header.scalars.count;
    int *data = (int *)cmdbuf->buf;
@@ -833,8 +833,8 @@ static int radeon_emit_scalars2(
  * Check: table start, end, nr, etc.
  */
 static int radeon_emit_vectors( 
-   drmRadeonCmdHeader header,
-   drmRadeonCmdBuffer *cmdbuf )
+   drm_radeon_cmd_header_t header,
+   drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int sz = header.vectors.count;
    int *data = (int *)cmdbuf->buf;
@@ -1009,7 +1009,7 @@ static int print_prim_and_flags( int prim )
 
 /* build in knowledge about each packet type
  */
-static int radeon_emit_packet3( drmRadeonCmdBuffer *cmdbuf )
+static int radeon_emit_packet3( drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int cmdsz;
    int *cmd = (int *)cmdbuf->buf;
@@ -1188,9 +1188,9 @@ static int radeon_emit_packet3( drmRadeonCmdBuffer *cmdbuf )
 
 /* Check cliprects for bounds, then pass on to above:
  */
-static int radeon_emit_packet3_cliprect( drmRadeonCmdBuffer *cmdbuf )
+static int radeon_emit_packet3_cliprect( drm_radeon_cmd_buffer_t *cmdbuf )
 {   
-   XF86DRIClipRectRec *boxes = (XF86DRIClipRectRec *)cmdbuf->boxes;
+   drm_clip_rect_t *boxes = (drm_clip_rect_t *)cmdbuf->boxes;
    int i = 0;
 
    if (VERBOSE && total_changed) {
@@ -1217,11 +1217,11 @@ static int radeon_emit_packet3_cliprect( drmRadeonCmdBuffer *cmdbuf )
 
 int r200SanityCmdBuffer( r200ContextPtr rmesa,
 			   int nbox,
-			   XF86DRIClipRectRec *boxes )
+			   drm_clip_rect_t *boxes )
 {
    int idx;
-   drmRadeonCmdBuffer cmdbuf;
-   drmRadeonCmdHeader header;
+   drm_radeon_cmd_buffer_t cmdbuf;
+   drm_radeon_cmd_header_t header;
    static int inited = 0;
 
    if (!inited) {
@@ -1232,7 +1232,7 @@ int r200SanityCmdBuffer( r200ContextPtr rmesa,
 
    cmdbuf.buf = rmesa->store.cmd_buf;
    cmdbuf.bufsz = rmesa->store.cmd_used;
-   cmdbuf.boxes = (drmClipRect *)boxes;
+   cmdbuf.boxes = (drm_clip_rect_t *)boxes;
    cmdbuf.nbox = nbox;
 
    while ( cmdbuf.bufsz >= sizeof(header) ) {
diff --git a/src/mesa/drivers/dri/r200/r200_sanity.h b/src/mesa/drivers/dri/r200/r200_sanity.h
index 10260f2112..f4c110dba6 100644
--- a/src/mesa/drivers/dri/r200/r200_sanity.h
+++ b/src/mesa/drivers/dri/r200/r200_sanity.h
@@ -3,6 +3,6 @@
 
 extern int r200SanityCmdBuffer( r200ContextPtr rmesa,
 				int nbox,
-				XF86DRIClipRectRec *boxes );
+				drm_clip_rect_t *boxes );
 
 #endif
diff --git a/src/mesa/drivers/dri/r200/r200_screen.c b/src/mesa/drivers/dri/r200/r200_screen.c
index c3fa252a72..3b4b343d94 100644
--- a/src/mesa/drivers/dri/r200/r200_screen.c
+++ b/src/mesa/drivers/dri/r200/r200_screen.c
@@ -311,7 +311,7 @@ r200CreateScreen( __DRIscreenPrivate *sPriv )
 
    {
       int ret;
-      drmRadeonGetParam gp;
+      drm_radeon_getparam_t gp;
 
       gp.param = RADEON_PARAM_GART_BUFFER_OFFSET;
       gp.value = &screen->gart_buffer_offset;
@@ -416,7 +416,7 @@ r200CreateScreen( __DRIscreenPrivate *sPriv )
    screen->fbLocation	= ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16;
 
    if ( sPriv->drmMinor >= 10 ) {
-      drmRadeonSetParam sp;
+      drm_radeon_setparam_t sp;
 
       sp.param = RADEON_SETPARAM_FB_LOCATION;
       sp.value = screen->fbLocation;
@@ -432,22 +432,22 @@ r200CreateScreen( __DRIscreenPrivate *sPriv )
    screen->depthOffset	= dri_priv->depthOffset;
    screen->depthPitch	= dri_priv->depthPitch;
 
-   screen->texOffset[RADEON_CARD_HEAP] = dri_priv->textureOffset
+   screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset
 				       + screen->fbLocation;
-   screen->texSize[RADEON_CARD_HEAP] = dri_priv->textureSize;
-   screen->logTexGranularity[RADEON_CARD_HEAP] =
+   screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize;
+   screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] =
       dri_priv->log2TexGran;
 
    if ( !screen->gartTextures.map ) {
       screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1;
-      screen->texOffset[RADEON_GART_HEAP] = 0;
-      screen->texSize[RADEON_GART_HEAP] = 0;
-      screen->logTexGranularity[RADEON_GART_HEAP] = 0;
+      screen->texOffset[RADEON_GART_TEX_HEAP] = 0;
+      screen->texSize[RADEON_GART_TEX_HEAP] = 0;
+      screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0;
    } else {
       screen->numTexHeaps = RADEON_NR_TEX_HEAPS;
-      screen->texOffset[RADEON_GART_HEAP] = screen->gart_texture_offset;
-      screen->texSize[RADEON_GART_HEAP] = dri_priv->gartTexMapSize;
-      screen->logTexGranularity[RADEON_GART_HEAP] =
+      screen->texOffset[RADEON_GART_TEX_HEAP] = screen->gart_texture_offset;
+      screen->texSize[RADEON_GART_TEX_HEAP] = dri_priv->gartTexMapSize;
+      screen->logTexGranularity[RADEON_GART_TEX_HEAP] =
 	 dri_priv->log2GARTTexGran;
    }
 
diff --git a/src/mesa/drivers/dri/r200/r200_screen.h b/src/mesa/drivers/dri/r200/r200_screen.h
index 44d67354d7..5e0ee68565 100644
--- a/src/mesa/drivers/dri/r200/r200_screen.h
+++ b/src/mesa/drivers/dri/r200/r200_screen.h
@@ -38,10 +38,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #ifdef GLX_DIRECT_RENDERING
 
-#include "dri_util.h"
 #include "xf86drm.h"
-#include "radeon_common.h"
-#include "radeon_sarea.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "dri_util.h"
 #include "xmlconfig.h"
 
 typedef struct {
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index 21b73c9218..4b6edd07b5 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -411,9 +411,9 @@ static void r200Fogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
  */
 
 
-static GLboolean intersect_rect( XF86DRIClipRectPtr out,
-				 XF86DRIClipRectPtr a,
-				 XF86DRIClipRectPtr b )
+static GLboolean intersect_rect( drm_clip_rect_t *out,
+				 drm_clip_rect_t *a,
+				 drm_clip_rect_t *b )
 {
    *out = *a;
    if ( b->x1 > out->x1 ) out->x1 = b->x1;
@@ -428,7 +428,7 @@ static GLboolean intersect_rect( XF86DRIClipRectPtr out,
 
 void r200RecalcScissorRects( r200ContextPtr rmesa )
 {
-   XF86DRIClipRectPtr out;
+   drm_clip_rect_t *out;
    int i;
 
    /* Grow cliprect store?
@@ -444,7 +444,7 @@ void r200RecalcScissorRects( r200ContextPtr rmesa )
 
       rmesa->state.scissor.pClipRects = 
 	 MALLOC( rmesa->state.scissor.numAllocedClipRects * 
-		 sizeof(XF86DRIClipRectRec) );
+		 sizeof(drm_clip_rect_t) );
 
       if ( rmesa->state.scissor.pClipRects == NULL ) {
 	 rmesa->state.scissor.numAllocedClipRects = 0;
@@ -658,7 +658,7 @@ static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask )
 {
    r200ContextPtr rmesa = R200_CONTEXT(ctx);
    GLuint i;
-   drmRadeonStipple stipple;
+   drm_radeon_stipple_t stipple;
 
    /* Must flip pattern upside down.
     */
@@ -675,7 +675,7 @@ static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask )
     */
    stipple.mask = rmesa->state.stipple.mask;
    drmCommandWrite( rmesa->dri.fd, DRM_RADEON_STIPPLE, 
-                    &stipple, sizeof(drmRadeonStipple) );
+                    &stipple, sizeof(stipple) );
    UNLOCK_HARDWARE( rmesa );
 }
 
@@ -1636,18 +1636,18 @@ void r200SetCliprects( r200ContextPtr rmesa, GLenum mode )
    switch ( mode ) {
    case GL_FRONT_LEFT:
       rmesa->numClipRects = dPriv->numClipRects;
-      rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+      rmesa->pClipRects = dPriv->pClipRects;
       break;
    case GL_BACK_LEFT:
       /* Can't ignore 2d windows if we are page flipping.
        */
       if ( dPriv->numBackClipRects == 0 || rmesa->doPageFlip ) {
 	 rmesa->numClipRects = dPriv->numClipRects;
-	 rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+	 rmesa->pClipRects = dPriv->pClipRects;
       }
       else {
 	 rmesa->numClipRects = dPriv->numBackClipRects;
-	 rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pBackClipRects;
+	 rmesa->pClipRects = dPriv->pBackClipRects;
       }
       break;
    default:
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index 3601390ad2..d9896c99db 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -74,7 +74,7 @@ void r200PrintDirty( r200ContextPtr rmesa, const char *msg )
 
 static int cmdpkt( int id ) 
 {
-   drmRadeonCmdHeader h;
+   drm_radeon_cmd_header_t h;
    h.i = 0;
    h.packet.cmd_type = RADEON_CMD_PACKET;
    h.packet.packet_id = id;
@@ -83,7 +83,7 @@ static int cmdpkt( int id )
 
 static int cmdvec( int offset, int stride, int count ) 
 {
-   drmRadeonCmdHeader h;
+   drm_radeon_cmd_header_t h;
    h.i = 0;
    h.vectors.cmd_type = RADEON_CMD_VECTORS;
    h.vectors.offset = offset;
@@ -94,7 +94,7 @@ static int cmdvec( int offset, int stride, int count )
 
 static int cmdscl( int offset, int stride, int count ) 
 {
-   drmRadeonCmdHeader h;
+   drm_radeon_cmd_header_t h;
    h.i = 0;
    h.scalars.cmd_type = RADEON_CMD_SCALARS;
    h.scalars.offset = offset;
@@ -105,7 +105,7 @@ static int cmdscl( int offset, int stride, int count )
 
 static int cmdscl2( int offset, int stride, int count ) 
 {
-   drmRadeonCmdHeader h;
+   drm_radeon_cmd_header_t h;
    h.i = 0;
    h.scalars.cmd_type = RADEON_CMD_SCALARS2;
    h.scalars.offset = offset - 0x100;
@@ -503,7 +503,7 @@ void r200InitState( r200ContextPtr rmesa )
           (2 << R200_TXFORMAT_WIDTH_SHIFT) |
           (2 << R200_TXFORMAT_HEIGHT_SHIFT));
       rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET] =
-	  rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+	  rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
       rmesa->hw.tex[i].cmd[TEX_PP_BORDER_COLOR] = 0;
       rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT_X] =
          (/* R200_TEXCOORD_PROJ | */
@@ -511,15 +511,15 @@ void r200InitState( r200ContextPtr rmesa )
 
       rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0;
       rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F1] =
-         rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+         rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
       rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F2] =
-         rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+         rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
       rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F3] =
-         rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+         rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
       rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F4] =
-         rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+         rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
       rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F5] =
-         rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+         rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
    }
 
    rmesa->hw.pix[0].cmd[PIX_PP_TXCBLEND] =  
diff --git a/src/mesa/drivers/dri/r200/r200_texmem.c b/src/mesa/drivers/dri/r200/r200_texmem.c
index 473520a950..05ef16e7be 100644
--- a/src/mesa/drivers/dri/r200/r200_texmem.c
+++ b/src/mesa/drivers/dri/r200/r200_texmem.c
@@ -286,8 +286,8 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t,
    GLuint offset;
    GLint imageWidth, imageHeight;
    GLint ret;
-   drmRadeonTexture tex;
-   drmRadeonTexImage tmp;
+   drm_radeon_texture_t tex;
+   drm_radeon_tex_image_t tmp;
    const int level = hwlevel + t->base.firstLevel;
 
    if ( R200_DEBUG & DEBUG_TEXTURE ) {
@@ -361,7 +361,7 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t,
 
    t->image[face][hwlevel].data = texImage->Data;
 
-   /* Init the DRM_RADEON_TEXTURE command / drmRadeonTexture struct.
+   /* Init the DRM_RADEON_TEXTURE command / drm_radeon_texture_t struct.
     * NOTE: we're always use a 1KB-wide blit and I8 texture format.
     * We used to use 1, 2 and 4-byte texels and used to use the texture
     * width to dictate the blit width - but that won't work for compressed
@@ -383,12 +383,12 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t,
    tex.image = &tmp;
 
    /* copy (x,y,width,height,data) */
-   memcpy( &tmp, &t->image[face][hwlevel], sizeof(drmRadeonTexImage) );
+   memcpy( &tmp, &t->image[face][hwlevel], sizeof(tmp) );
 
    LOCK_HARDWARE( rmesa );
    do {
       ret = drmCommandWriteRead( rmesa->dri.fd, DRM_RADEON_TEXTURE,
-                                 &tex, sizeof(drmRadeonTexture) );
+                                 &tex, sizeof(drm_radeon_texture_t) );
       if (ret) {
 	 if (R200_DEBUG & DEBUG_IOCTL)
 	    fprintf(stderr, "DRM_RADEON_TEXTURE:  again!\n");
diff --git a/src/mesa/drivers/dri/radeon/Makefile.solo b/src/mesa/drivers/dri/radeon/Makefile.solo
index a5430b23b2..c5387f025b 100644
--- a/src/mesa/drivers/dri/radeon/Makefile.solo
+++ b/src/mesa/drivers/dri/radeon/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 ifeq ($(EMBEDDED),true)
diff --git a/src/mesa/drivers/dri/radeon/radeon_compat.c b/src/mesa/drivers/dri/radeon/radeon_compat.c
index 0c32641530..857d6edc39 100644
--- a/src/mesa/drivers/dri/radeon/radeon_compat.c
+++ b/src/mesa/drivers/dri/radeon/radeon_compat.c
@@ -73,15 +73,15 @@ static struct {
 static void radeonCompatEmitPacket( radeonContextPtr rmesa, 
 				    struct radeon_state_atom *state )
 {
-   RADEONSAREAPrivPtr sarea = rmesa->sarea;
-   radeon_context_regs_t *ctx = &sarea->ContextState;
-   radeon_texture_regs_t *tex0 = &sarea->TexState[0];
-   radeon_texture_regs_t *tex1 = &sarea->TexState[1];
+   drm_radeon_sarea_t *sarea = rmesa->sarea;
+   drm_radeon_context_regs_t *ctx = &sarea->context_state;
+   drm_radeon_texture_regs_t *tex0 = &sarea->tex_state[0];
+   drm_radeon_texture_regs_t *tex1 = &sarea->tex_state[1];
    int i;
    int *buf = state->cmd;
 
    for ( i = 0 ; i < state->cmd_size ; ) {
-      drmRadeonCmdHeader *header = (drmRadeonCmdHeader *)&buf[i++];
+      drm_radeon_cmd_header_t *header = (drm_radeon_cmd_header_t *)&buf[i++];
 
       if (RADEON_DEBUG & DEBUG_STATE)
 	 fprintf(stderr, "%s %d: %s\n", __FUNCTION__, header->packet.packet_id,
@@ -229,15 +229,15 @@ static void radeonCompatEmitStateLocked( radeonContextPtr rmesa )
 static void radeonCompatEmitPrimitiveLocked( radeonContextPtr rmesa,
 					     GLuint hw_primitive,
 					     GLuint nverts,
-					     XF86DRIClipRectPtr pbox,
+					     drm_clip_rect_t *pbox,
 					     GLuint nbox )
 {
    int i;
 
    for ( i = 0 ; i < nbox ; ) {
       int nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS, nbox );
-      XF86DRIClipRectPtr b = rmesa->sarea->boxes;
-      drmRadeonVertex vtx;
+      drm_clip_rect_t *b = rmesa->sarea->boxes;
+      drm_radeon_vertex_t vtx;
       
       rmesa->sarea->dirty |= RADEON_UPLOAD_CLIPRECTS;
       rmesa->sarea->nbox = nr - i;
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index 0424ffc84a..2889a7d104 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -274,7 +274,7 @@ radeonCreateContext( const __GLcontextModes *glVisual,
    rmesa->dri.drmMinor = sPriv->drmMinor;
 
    rmesa->radeonScreen = screen;
-   rmesa->sarea = (RADEONSAREAPrivPtr)((GLubyte *)sPriv->pSAREA +
+   rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
 				       screen->sarea_priv_offset);
 
 
@@ -289,8 +289,8 @@ radeonCreateContext( const __GLcontextModes *glVisual,
 	    screen->texSize[i],
 	    12,
 	    RADEON_NR_TEX_REGIONS,
-	    rmesa->sarea->texList[i],
-	    & rmesa->sarea->texAge[i],
+	    (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
+	    & rmesa->sarea->tex_age[i],
 	    & rmesa->swapped,
 	    sizeof( radeonTexObj ),
 	    (destroy_texture_object_t *) radeonDestroyTexObj );
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index 3ce67044f9..45b5a50418 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -42,7 +42,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include <inttypes.h>
 #include "dri_util.h"
-#include "radeon_common.h"
 #include "texmem.h"
 
 #include "macros.h"
@@ -111,12 +110,12 @@ struct radeon_pixel_state {
 };
 
 struct radeon_scissor_state {
-   XF86DRIClipRectRec rect;
+   drm_clip_rect_t rect;
    GLboolean enabled;
 
    GLuint numClipRects;			/* Cliprects active */
    GLuint numAllocedClipRects;		/* Cliprects available */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
 };
 
 struct radeon_stencilbuffer_state {
@@ -151,7 +150,7 @@ struct radeon_tex_obj {
 					   brought into the
 					   texunit. */
 
-   drmRadeonTexImage image[6][RADEON_MAX_TEXTURE_LEVELS];
+   drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
 					/* Six, for the cube faces */
 
    GLuint pp_txfilter;		        /* hardware register values */
@@ -483,7 +482,7 @@ struct radeon_dri_mirror {
    __DRIdrawablePrivate	*drawable;	/* DRI drawable bound to this ctx */
 
    drmContext hwContext;
-   drmLock *hwLock;
+   drm_hw_lock_t *hwLock;
    int fd;
    int drmMinor;
 };
@@ -723,16 +722,16 @@ struct radeon_context {
    GLuint do_usleeps;
    GLuint do_irqs;
    GLuint irqsEmitted;
-   drmRadeonIrqWait iw;
+   drm_radeon_irq_wait_t iw;
 
    /* Drawable, cliprect and scissor information
     */
    GLuint numClipRects;			/* Cliprects for the draw buffer */
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
    unsigned int lastStamp;
    GLboolean lost_context;
    radeonScreenPtr radeonScreen;	/* Screen private DRI data */
-   RADEONSAREAPrivPtr sarea;		/* Private SAREA data */
+   drm_radeon_sarea_t *sarea;		/* Private SAREA data */
 
    /* TCL stuff
     */
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index 7b27d3f766..631f140d05 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -192,7 +192,7 @@ extern void radeonEmitVbufPrim( radeonContextPtr rmesa,
 				GLuint primitive,
 				GLuint vertex_nr )
 {
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
 
 
    assert(!(primitive & RADEON_CP_VC_CNTL_PRIM_WALK_IND));
@@ -204,7 +204,7 @@ extern void radeonEmitVbufPrim( radeonContextPtr rmesa,
 	      rmesa->store.cmd_used/4);
    
 #if RADEON_OLD_PACKETS
-   cmd = (drmRadeonCmdHeader *)radeonAllocCmdBuf( rmesa, 6 * sizeof(*cmd),
+   cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, 6 * sizeof(*cmd),
 						  __FUNCTION__ );
    cmd[0].header.cmd_type = RADEON_CMD_PACKET3_CLIP;
    cmd[1].i = RADEON_CP_PACKET3_3D_RNDR_GEN_INDX_PRIM | (3 << 16);
@@ -222,7 +222,7 @@ extern void radeonEmitVbufPrim( radeonContextPtr rmesa,
 	      __FUNCTION__,
 	      cmd[1].i, cmd[2].i, cmd[4].i, cmd[5].i);
 #else
-   cmd = (drmRadeonCmdHeader *)radeonAllocCmdBuf( rmesa, 4 * sizeof(*cmd),
+   cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, 4 * sizeof(*cmd),
 						  __FUNCTION__ );
    cmd[0].i = 0;
    cmd[0].header.cmd_type = RADEON_CMD_PACKET3_CLIP;
@@ -280,7 +280,7 @@ GLushort *radeonAllocEltsOpenEnded( radeonContextPtr rmesa,
 				    GLuint primitive,
 				    GLuint min_nr )
 {
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
    GLushort *retval;
 
    if (RADEON_DEBUG & DEBUG_IOCTL)
@@ -291,7 +291,7 @@ GLushort *radeonAllocEltsOpenEnded( radeonContextPtr rmesa,
    radeonEmitState( rmesa );
    
 #if RADEON_OLD_PACKETS
-   cmd = (drmRadeonCmdHeader *)radeonAllocCmdBuf( rmesa, 
+   cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, 
 						  24 + min_nr*2,
 						  __FUNCTION__ );
    cmd[0].i = 0;
@@ -307,7 +307,7 @@ GLushort *radeonAllocEltsOpenEnded( radeonContextPtr rmesa,
 
    retval = (GLushort *)(cmd+6);
 #else   
-   cmd = (drmRadeonCmdHeader *)radeonAllocCmdBuf( rmesa, 
+   cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, 
 						  16 + min_nr*2,
 						  __FUNCTION__ );
    cmd[0].i = 0;
@@ -347,13 +347,13 @@ void radeonEmitVertexAOS( radeonContextPtr rmesa,
    rmesa->ioctl.vertex_size = vertex_size;
    rmesa->ioctl.vertex_offset = offset;
 #else
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
 
    if (RADEON_DEBUG & (DEBUG_PRIMS|DEBUG_IOCTL))
       fprintf(stderr, "%s:  vertex_size 0x%x offset 0x%x \n",
 	      __FUNCTION__, vertex_size, offset);
 
-   cmd = (drmRadeonCmdHeader *)radeonAllocCmdBuf( rmesa, 5 * sizeof(int),
+   cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, 5 * sizeof(int),
 						  __FUNCTION__ );
 
    cmd[0].i = 0;
@@ -378,7 +378,7 @@ void radeonEmitAOS( radeonContextPtr rmesa,
    rmesa->ioctl.vertex_offset = 
       (component[0]->aos_start + offset * component[0]->aos_stride * 4);
 #else
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
    int sz = 3 + (nr/2 * 3) + (nr & 1) * 2;
    int i;
    int *tmp;
@@ -387,7 +387,7 @@ void radeonEmitAOS( radeonContextPtr rmesa,
       fprintf(stderr, "%s\n", __FUNCTION__);
 
 
-   cmd = (drmRadeonCmdHeader *)radeonAllocCmdBuf( rmesa, sz * sizeof(int),
+   cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, sz * sizeof(int),
 						  __FUNCTION__ );
    cmd[0].i = 0;
    cmd[0].header.cmd_type = RADEON_CMD_PACKET3;
@@ -431,7 +431,7 @@ void radeonEmitBlit( radeonContextPtr rmesa, /* FIXME: which drmMinor is require
 		   GLint dstx, GLint dsty,
 		   GLuint w, GLuint h )
 {
-   drmRadeonCmdHeader *cmd;
+   drm_radeon_cmd_header_t *cmd;
 
    if (RADEON_DEBUG & DEBUG_IOCTL)
       fprintf(stderr, "%s src %x/%x %d,%d dst: %x/%x %d,%d sz: %dx%d\n",
@@ -447,7 +447,7 @@ void radeonEmitBlit( radeonContextPtr rmesa, /* FIXME: which drmMinor is require
    assert( w < (1<<16) );
    assert( h < (1<<16) );
 
-   cmd = (drmRadeonCmdHeader *)radeonAllocCmdBuf( rmesa, 8 * sizeof(int),
+   cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, 8 * sizeof(int),
 						  __FUNCTION__ );
 
 
@@ -475,11 +475,11 @@ void radeonEmitBlit( radeonContextPtr rmesa, /* FIXME: which drmMinor is require
 void radeonEmitWait( radeonContextPtr rmesa, GLuint flags )
 {
    if (rmesa->dri.drmMinor >= 6) {
-      drmRadeonCmdHeader *cmd;
+      drm_radeon_cmd_header_t *cmd;
 
       assert( !(flags & ~(RADEON_WAIT_2D|RADEON_WAIT_3D)) );
       
-      cmd = (drmRadeonCmdHeader *)radeonAllocCmdBuf( rmesa, 1 * sizeof(int),
+      cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, 1 * sizeof(int),
 						   __FUNCTION__ );
       cmd[0].i = 0;
       cmd[0].wait.cmd_type = RADEON_CMD_WAIT;
@@ -492,7 +492,7 @@ static int radeonFlushCmdBufLocked( radeonContextPtr rmesa,
 				    const char * caller )
 {
    int ret, i;
-   drmRadeonCmdBuffer cmd;
+   drm_radeon_cmd_buffer_t cmd;
 
    if (RADEON_DEBUG & DEBUG_IOCTL) {
       fprintf(stderr, "%s from %s\n", __FUNCTION__, caller); 
@@ -529,10 +529,10 @@ static int radeonFlushCmdBufLocked( radeonContextPtr rmesa,
 
    if (rmesa->state.scissor.enabled) {
       cmd.nbox = rmesa->state.scissor.numClipRects;
-      cmd.boxes = (drmClipRect *)rmesa->state.scissor.pClipRects;
+      cmd.boxes = rmesa->state.scissor.pClipRects;
    } else {
       cmd.nbox = rmesa->numClipRects;
-      cmd.boxes = (drmClipRect *)rmesa->pClipRects;
+      cmd.boxes = rmesa->pClipRects;
    }
 
    ret = drmCommandWrite( rmesa->dri.fd,
@@ -567,7 +567,7 @@ void radeonFlushCmdBuf( radeonContextPtr rmesa, const char *caller )
    UNLOCK_HARDWARE( rmesa );
 
    if (ret) {
-      fprintf(stderr, "drmRadeonCmdBuffer: %d (exiting)\n", ret);
+      fprintf(stderr, "drm_radeon_cmd_buffer_t: %d (exiting)\n", ret);
       exit(ret);
    }
 }
@@ -666,13 +666,13 @@ void radeonReleaseDmaRegion( radeonContextPtr rmesa,
       rmesa->dma.flush( rmesa );
 
    if (--region->buf->refcount == 0) {
-      drmRadeonCmdHeader *cmd;
+      drm_radeon_cmd_header_t *cmd;
 
       if (RADEON_DEBUG & (DEBUG_IOCTL|DEBUG_DMA))
 	 fprintf(stderr, "%s -- DISCARD BUF %d\n", __FUNCTION__,
 		 region->buf->buf->idx);  
       
-      cmd = (drmRadeonCmdHeader *)radeonAllocCmdBuf( rmesa, sizeof(*cmd), 
+      cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, sizeof(*cmd), 
 						     __FUNCTION__ );
       cmd->dma.cmd_type = RADEON_CMD_DMA_DISCARD;
       cmd->dma.buf_idx = region->buf->buf->idx;
@@ -740,7 +740,7 @@ static CARD32 radeonGetLastFrame (radeonContextPtr rmesa)
    CARD32 frame;
 
    if (rmesa->dri.screen->drmMinor >= 4) {
-      drmRadeonGetParam gp;
+      drm_radeon_getparam_t gp;
 
       gp.param = RADEON_PARAM_LAST_FRAME;
       gp.value = (int *)&frame;
@@ -757,7 +757,7 @@ static CARD32 radeonGetLastFrame (radeonContextPtr rmesa)
    } 
 #endif
    if ( ret ) {
-      fprintf( stderr, "%s: drmRadeonGetParam: %d\n", __FUNCTION__, ret );
+      fprintf( stderr, "%s: drm_radeon_getparam_t: %d\n", __FUNCTION__, ret );
       exit(1);
    }
 
@@ -766,14 +766,14 @@ static CARD32 radeonGetLastFrame (radeonContextPtr rmesa)
 
 static void radeonEmitIrqLocked( radeonContextPtr rmesa )
 {
-   drmRadeonIrqEmit ie;
+   drm_radeon_irq_emit_t ie;
    int ret;
 
    ie.irq_seq = &rmesa->iw.irq_seq;
    ret = drmCommandWriteRead( rmesa->dri.fd, DRM_RADEON_IRQ_EMIT, 
 			      &ie, sizeof(ie) );
    if ( ret ) {
-      fprintf( stderr, "%s: drmRadeonIrqEmit: %d\n", __FUNCTION__, ret );
+      fprintf( stderr, "%s: drm_radeon_irq_emit_t: %d\n", __FUNCTION__, ret );
       exit(1);
    }
 }
@@ -797,7 +797,7 @@ static void radeonWaitIrq( radeonContextPtr rmesa )
 
 static void radeonWaitForFrameCompletion( radeonContextPtr rmesa )
 {
-   RADEONSAREAPrivPtr sarea = rmesa->sarea;
+   drm_radeon_sarea_t *sarea = rmesa->sarea;
 
    if (rmesa->do_irqs) {
       if (radeonGetLastFrame(rmesa) < sarea->last_frame) {
@@ -835,7 +835,7 @@ void radeonCopyBuffer( const __DRIdrawablePrivate *dPriv )
    radeonContextPtr rmesa;
    GLint nbox, i, ret;
    GLboolean   missed_target;
-   uint64_t ust;
+   int64_t ust;
 
    assert(dPriv);
    assert(dPriv->driContextPriv);
@@ -862,8 +862,8 @@ void radeonCopyBuffer( const __DRIdrawablePrivate *dPriv )
 
    for ( i = 0 ; i < nbox ; ) {
       GLint nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS , nbox );
-      XF86DRIClipRectPtr box = dPriv->pClipRects;
-      XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+      drm_clip_rect_t *box = dPriv->pClipRects;
+      drm_clip_rect_t *b = rmesa->sarea->boxes;
       GLint n = 0;
 
       for ( ; i < nr ; i++ ) {
@@ -916,8 +916,8 @@ void radeonPageFlip( const __DRIdrawablePrivate *dPriv )
     */
    if (dPriv->numClipRects)
    {
-      XF86DRIClipRectPtr box = dPriv->pClipRects;
-      XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+      drm_clip_rect_t *box = dPriv->pClipRects;
+      drm_clip_rect_t *b = rmesa->sarea->boxes;
       b[0] = box[0];
       rmesa->sarea->nbox = 1;
    }
@@ -971,7 +971,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 {
    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
    __DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
-   RADEONSAREAPrivPtr sarea = rmesa->sarea;
+   drm_radeon_sarea_t *sarea = rmesa->sarea;
    unsigned char *RADEONMMIO = rmesa->radeonScreen->mmio.map;
    CARD32 clear;
    GLuint flags = 0;
@@ -1034,7 +1034,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
       int ret;
 
       if (rmesa->dri.screen->drmMinor >= 4) {
-	drmRadeonGetParam gp;
+	drm_radeon_getparam_t gp;
 
 	gp.param = RADEON_PARAM_LAST_CLEAR;
 	gp.value = (int *)&clear;
@@ -1050,7 +1050,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
       }
 #endif
       if ( ret ) {
-	 fprintf( stderr, "%s: drmRadeonGetParam: %d\n", __FUNCTION__, ret );
+	 fprintf( stderr, "%s: drm_radeon_getparam_t: %d\n", __FUNCTION__, ret );
 	 exit(1);
       }
       if ( RADEON_DEBUG & DEBUG_IOCTL ) {
@@ -1071,10 +1071,10 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 
    for ( i = 0 ; i < dPriv->numClipRects ; ) {
       GLint nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS, dPriv->numClipRects );
-      XF86DRIClipRectPtr box = dPriv->pClipRects;
-      XF86DRIClipRectPtr b = rmesa->sarea->boxes;
-      drmRadeonClearType clear;
-      drmRadeonClearRect depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
+      drm_clip_rect_t *box = dPriv->pClipRects;
+      drm_clip_rect_t *b = rmesa->sarea->boxes;
+      drm_radeon_clear_t clear;
+      drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
       GLint n = 0;
 
       if ( !all ) {
@@ -1117,16 +1117,16 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
       n--;
       b = rmesa->sarea->boxes;
       for ( ; n >= 0 ; n-- ) {
-	 depth_boxes[n].f[RADEON_CLEAR_X1] = (float)b[n].x1;
-	 depth_boxes[n].f[RADEON_CLEAR_Y1] = (float)b[n].y1;
-	 depth_boxes[n].f[RADEON_CLEAR_X2] = (float)b[n].x2;
-	 depth_boxes[n].f[RADEON_CLEAR_Y2] = (float)b[n].y2;
-	 depth_boxes[n].f[RADEON_CLEAR_DEPTH] = 
+	 depth_boxes[n].f[CLEAR_X1] = (float)b[n].x1;
+	 depth_boxes[n].f[CLEAR_Y1] = (float)b[n].y1;
+	 depth_boxes[n].f[CLEAR_X2] = (float)b[n].x2;
+	 depth_boxes[n].f[CLEAR_Y2] = (float)b[n].y2;
+	 depth_boxes[n].f[CLEAR_DEPTH] = 
 	    (float)rmesa->state.depth.clear;
       }
 
       ret = drmCommandWrite( rmesa->dri.fd, DRM_RADEON_CLEAR,
-			     &clear, sizeof(drmRadeonClearType));
+			     &clear, sizeof(drm_radeon_clear_t));
 
       if ( ret ) {
 	 UNLOCK_HARDWARE( rmesa );
diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.c b/src/mesa/drivers/dri/radeon/radeon_lock.c
index fb285157ab..033a45efb2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_lock.c
+++ b/src/mesa/drivers/dri/radeon/radeon_lock.c
@@ -54,7 +54,7 @@ radeonUpdatePageFlipping( radeonContextPtr rmesa )
    int use_back;
 
 
-   rmesa->doPageFlip = rmesa->sarea->pfAllowPageFlip;
+   rmesa->doPageFlip = rmesa->sarea->pfState;
 
    use_back = (rmesa->glCtx->Color._DrawDestMask == BACK_LEFT_BIT);
    use_back ^= (rmesa->sarea->pfCurrentPage == 1);
@@ -92,7 +92,7 @@ void radeonGetLock( radeonContextPtr rmesa, GLuint flags )
 {
    __DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
    __DRIscreenPrivate *sPriv = rmesa->dri.screen;
-   RADEONSAREAPrivPtr sarea = rmesa->sarea;
+   drm_radeon_sarea_t *sarea = rmesa->sarea;
 
    drmGetLock( rmesa->dri.fd, rmesa->dri.hwContext, flags );
 
@@ -116,9 +116,9 @@ void radeonGetLock( radeonContextPtr rmesa, GLuint flags )
       rmesa->lastStamp = dPriv->lastStamp;
    }
 
-   if ( sarea->ctxOwner != rmesa->dri.hwContext ) {
+   if ( sarea->ctx_owner != rmesa->dri.hwContext ) {
       int i;
-      sarea->ctxOwner = rmesa->dri.hwContext;
+      sarea->ctx_owner = rmesa->dri.hwContext;
 
       for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
 	 DRI_AGE_TEXTURES( rmesa->texture_heaps[ i ] );
diff --git a/src/mesa/drivers/dri/radeon/radeon_sanity.c b/src/mesa/drivers/dri/radeon/radeon_sanity.c
index 451c73cf25..11d0a33ce4 100644
--- a/src/mesa/drivers/dri/radeon/radeon_sanity.c
+++ b/src/mesa/drivers/dri/radeon/radeon_sanity.c
@@ -487,8 +487,8 @@ static void dump_state( void )
 
 
 static int radeon_emit_packets( 
-   drmRadeonCmdHeader header,
-   drmRadeonCmdBuffer *cmdbuf )
+   drm_radeon_cmd_header_t header,
+   drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int id = (int)header.packet.packet_id;
    int sz = packet[id].len;
@@ -523,8 +523,8 @@ static int radeon_emit_packets(
 
 
 static int radeon_emit_scalars( 
-   drmRadeonCmdHeader header,
-   drmRadeonCmdBuffer *cmdbuf )
+   drm_radeon_cmd_header_t header,
+   drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int sz = header.scalars.count;
    int *data = (int *)cmdbuf->buf;
@@ -551,8 +551,8 @@ static int radeon_emit_scalars(
 
 
 static int radeon_emit_scalars2( 
-   drmRadeonCmdHeader header,
-   drmRadeonCmdBuffer *cmdbuf )
+   drm_radeon_cmd_header_t header,
+   drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int sz = header.scalars.count;
    int *data = (int *)cmdbuf->buf;
@@ -585,8 +585,8 @@ static int radeon_emit_scalars2(
  * Check: table start, end, nr, etc.
  */
 static int radeon_emit_vectors( 
-   drmRadeonCmdHeader header,
-   drmRadeonCmdBuffer *cmdbuf )
+   drm_radeon_cmd_header_t header,
+   drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int sz = header.vectors.count;
    int *data = (int *)cmdbuf->buf;
@@ -746,7 +746,7 @@ static int print_prim_and_flags( int prim )
 
 /* build in knowledge about each packet type
  */
-static int radeon_emit_packet3( drmRadeonCmdBuffer *cmdbuf )
+static int radeon_emit_packet3( drm_radeon_cmd_buffer_t *cmdbuf )
 {
    int cmdsz;
    int *cmd = (int *)cmdbuf->buf;
@@ -907,9 +907,9 @@ static int radeon_emit_packet3( drmRadeonCmdBuffer *cmdbuf )
 
 /* Check cliprects for bounds, then pass on to above:
  */
-static int radeon_emit_packet3_cliprect( drmRadeonCmdBuffer *cmdbuf )
+static int radeon_emit_packet3_cliprect( drm_radeon_cmd_buffer_t *cmdbuf )
 {   
-   XF86DRIClipRectRec *boxes = (XF86DRIClipRectRec *)cmdbuf->boxes;
+   drm_clip_rect_t *boxes = cmdbuf->boxes;
    int i = 0;
 
    if (VERBOSE && total_changed) {
@@ -937,11 +937,11 @@ static int radeon_emit_packet3_cliprect( drmRadeonCmdBuffer *cmdbuf )
 
 int radeonSanityCmdBuffer( radeonContextPtr rmesa,
 			   int nbox,
-			   XF86DRIClipRectRec *boxes )
+			   drm_clip_rect_t *boxes )
 {
    int idx;
-   drmRadeonCmdBuffer cmdbuf;
-   drmRadeonCmdHeader header;
+   drm_radeon_cmd_buffer_t cmdbuf;
+   drm_radeon_cmd_header_t header;
    static int inited = 0;
 
    if (!inited) {
@@ -951,7 +951,7 @@ int radeonSanityCmdBuffer( radeonContextPtr rmesa,
 
    cmdbuf.buf = rmesa->store.cmd_buf;
    cmdbuf.bufsz = rmesa->store.cmd_used;
-   cmdbuf.boxes = (drmClipRect *)boxes;
+   cmdbuf.boxes = boxes;
    cmdbuf.nbox = nbox;
 
    while ( cmdbuf.bufsz >= sizeof(header) ) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_sanity.h b/src/mesa/drivers/dri/radeon/radeon_sanity.h
index 58e8335dd6..1ec06bc586 100644
--- a/src/mesa/drivers/dri/radeon/radeon_sanity.h
+++ b/src/mesa/drivers/dri/radeon/radeon_sanity.h
@@ -3,6 +3,6 @@
 
 extern int radeonSanityCmdBuffer( radeonContextPtr rmesa,
 				  int nbox,
-				  XF86DRIClipRectRec *boxes );
+				  drm_clip_rect_t *boxes );
 
 #endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index f9d29fc348..8552f2a73d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -272,7 +272,7 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
 
    {
       int ret;
-      drmRadeonGetParam gp;
+      drm_radeon_getparam_t gp;
 
       gp.param = RADEON_PARAM_GART_BUFFER_OFFSET;
       gp.value = &screen->gart_buffer_offset;
@@ -281,7 +281,7 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
 				 &gp, sizeof(gp));
       if (ret) {
 	 FREE( screen );
-	 fprintf(stderr, "drmRadeonGetParam (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret);
+	 fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret);
 	 return NULL;
       }
 
@@ -293,7 +293,7 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
 				    &gp, sizeof(gp));
 	 if (ret) {
 	    FREE( screen );
-	    fprintf(stderr, "drmRadeonGetParam (RADEON_PARAM_IRQ_NR): %d\n", ret);
+	    fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret);
 	    return NULL;
 	 }
       }
@@ -385,7 +385,7 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
    screen->fbLocation	= ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16;
 
    if ( sPriv->drmMinor >= 10 ) {
-      drmRadeonSetParam sp;
+      drm_radeon_setparam_t sp;
 
       sp.param = RADEON_SETPARAM_FB_LOCATION;
       sp.value = screen->fbLocation;
@@ -401,23 +401,23 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
    screen->depthOffset	= dri_priv->depthOffset;
    screen->depthPitch	= dri_priv->depthPitch;
 
-   screen->texOffset[RADEON_CARD_HEAP] = dri_priv->textureOffset
+   screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset
 				       + screen->fbLocation;
-   screen->texSize[RADEON_CARD_HEAP] = dri_priv->textureSize;
-   screen->logTexGranularity[RADEON_CARD_HEAP] =
+   screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize;
+   screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] =
       dri_priv->log2TexGran;
 
    if ( !screen->gartTextures.map
 	|| getenv( "RADEON_GARTTEXTURING_FORCE_DISABLE" ) ) {
       screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1;
-      screen->texOffset[RADEON_GART_HEAP] = 0;
-      screen->texSize[RADEON_GART_HEAP] = 0;
-      screen->logTexGranularity[RADEON_GART_HEAP] = 0;
+      screen->texOffset[RADEON_GART_TEX_HEAP] = 0;
+      screen->texSize[RADEON_GART_TEX_HEAP] = 0;
+      screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0;
    } else {
       screen->numTexHeaps = RADEON_NR_TEX_HEAPS;
-      screen->texOffset[RADEON_GART_HEAP] = screen->gart_texture_offset;
-      screen->texSize[RADEON_GART_HEAP] = dri_priv->gartTexMapSize;
-      screen->logTexGranularity[RADEON_GART_HEAP] =
+      screen->texOffset[RADEON_GART_TEX_HEAP] = screen->gart_texture_offset;
+      screen->texSize[RADEON_GART_TEX_HEAP] = dri_priv->gartTexMapSize;
+      screen->logTexGranularity[RADEON_GART_TEX_HEAP] =
 	 dri_priv->log2GARTTexGran;
    }
 #ifndef _SOLO
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h
index 4a0f6d47f2..c440b56265 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.h
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.h
@@ -44,10 +44,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * definitions that we need.
  */
 #include "dri_util.h"
-#include "radeon_common.h"
 #include "radeon_dri.h"
 #include "radeon_reg.h"
-#include "radeon_sarea.h"
+#include "drm_sarea.h"
 #include "xmlconfig.h"
 
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index c4ce6b1007..700e3f2c52 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -418,9 +418,9 @@ static void radeonFogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
  */
 
 
-static GLboolean intersect_rect( XF86DRIClipRectPtr out,
-				 XF86DRIClipRectPtr a,
-				 XF86DRIClipRectPtr b )
+static GLboolean intersect_rect( drm_clip_rect_t *out,
+				 drm_clip_rect_t *a,
+				 drm_clip_rect_t *b )
 {
    *out = *a;
    if ( b->x1 > out->x1 ) out->x1 = b->x1;
@@ -435,7 +435,7 @@ static GLboolean intersect_rect( XF86DRIClipRectPtr out,
 
 void radeonRecalcScissorRects( radeonContextPtr rmesa )
 {
-   XF86DRIClipRectPtr out;
+   drm_clip_rect_t *out;
    int i;
 
    /* Grow cliprect store?
@@ -451,7 +451,7 @@ void radeonRecalcScissorRects( radeonContextPtr rmesa )
 
       rmesa->state.scissor.pClipRects = 
 	 MALLOC( rmesa->state.scissor.numAllocedClipRects * 
-		 sizeof(XF86DRIClipRectRec) );
+		 sizeof(drm_clip_rect_t) );
 
       if ( rmesa->state.scissor.pClipRects == NULL ) {
 	 rmesa->state.scissor.numAllocedClipRects = 0;
@@ -641,7 +641,7 @@ static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
 {
    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
    GLuint i;
-   drmRadeonStipple stipple;
+   drm_radeon_stipple_t stipple;
 
    /* Must flip pattern upside down.
     */
@@ -658,7 +658,7 @@ static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
     */
    stipple.mask = rmesa->state.stipple.mask;
    drmCommandWrite( rmesa->dri.fd, DRM_RADEON_STIPPLE, 
-                    &stipple, sizeof(drmRadeonStipple) );
+                    &stipple, sizeof(drm_radeon_stipple_t) );
    UNLOCK_HARDWARE( rmesa );
 }
 
@@ -1575,18 +1575,18 @@ void radeonSetCliprects( radeonContextPtr rmesa, GLenum mode )
    switch ( mode ) {
    case GL_FRONT_LEFT:
       rmesa->numClipRects = dPriv->numClipRects;
-      rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+      rmesa->pClipRects = dPriv->pClipRects;
       break;
    case GL_BACK_LEFT:
       /* Can't ignore 2d windows if we are page flipping.
        */
       if ( dPriv->numBackClipRects == 0 || rmesa->doPageFlip ) {
 	 rmesa->numClipRects = dPriv->numClipRects;
-	 rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+	 rmesa->pClipRects = dPriv->pClipRects;
       }
       else {
 	 rmesa->numClipRects = dPriv->numBackClipRects;
-	 rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pBackClipRects;
+	 rmesa->pClipRects = dPriv->pBackClipRects;
       }
       break;
    default:
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index c84f5fd833..f842e430e1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -68,7 +68,7 @@ void radeonPrintDirty( radeonContextPtr rmesa, const char *msg )
 
 static int cmdpkt( int id ) 
 {
-   drmRadeonCmdHeader h;
+   drm_radeon_cmd_header_t h;
    h.i = 0;
    h.packet.cmd_type = RADEON_CMD_PACKET;
    h.packet.packet_id = id;
@@ -77,7 +77,7 @@ static int cmdpkt( int id )
 
 static int cmdvec( int offset, int stride, int count ) 
 {
-   drmRadeonCmdHeader h;
+   drm_radeon_cmd_header_t h;
    h.i = 0;
    h.vectors.cmd_type = RADEON_CMD_VECTORS;
    h.vectors.offset = offset;
@@ -88,7 +88,7 @@ static int cmdvec( int offset, int stride, int count )
 
 static int cmdscl( int offset, int stride, int count ) 
 {
-   drmRadeonCmdHeader h;
+   drm_radeon_cmd_header_t h;
    h.i = 0;
    h.scalars.cmd_type = RADEON_CMD_SCALARS;
    h.scalars.offset = offset;
@@ -443,7 +443,7 @@ void radeonInitState( radeonContextPtr rmesa )
 
       /* Initialize the texture offset to the start of the card texture heap */
       rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET] =
-	  rmesa->radeonScreen->texOffset[RADEON_CARD_HEAP];
+	  rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
 
       rmesa->hw.tex[i].cmd[TEX_PP_BORDER_COLOR] = 0;
       rmesa->hw.tex[i].cmd[TEX_PP_TXCBLEND] =  
diff --git a/src/mesa/drivers/dri/radeon/radeon_texmem.c b/src/mesa/drivers/dri/radeon/radeon_texmem.c
index c985267d6b..61f187762c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texmem.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texmem.c
@@ -183,8 +183,8 @@ static void uploadSubImage( radeonContextPtr rmesa, radeonTexObjPtr t,
    GLuint offset;
    GLint imageWidth, imageHeight;
    GLint ret;
-   drmRadeonTexture tex;
-   drmRadeonTexImage tmp;
+   drm_radeon_texture_t tex;
+   drm_radeon_tex_image_t tmp;
    const int level = hwlevel + t->base.firstLevel;
 
    if ( RADEON_DEBUG & DEBUG_TEXTURE ) {
@@ -245,7 +245,7 @@ static void uploadSubImage( radeonContextPtr rmesa, radeonTexObjPtr t,
 
    t->image[face][hwlevel].data = texImage->Data;
 
-   /* Init the DRM_RADEON_TEXTURE command / drmRadeonTexture struct.
+   /* Init the DRM_RADEON_TEXTURE command / drm_radeon_texture_t struct.
     * NOTE: we're always use a 1KB-wide blit and I8 texture format.
     * We used to use 1, 2 and 4-byte texels and used to use the texture
     * width to dictate the blit width - but that won't work for compressed
@@ -267,12 +267,12 @@ static void uploadSubImage( radeonContextPtr rmesa, radeonTexObjPtr t,
    tex.image = &tmp;
 
    /* copy (x,y,width,height,data) */
-   memcpy( &tmp, &t->image[face][hwlevel], sizeof(drmRadeonTexImage) );
+   memcpy( &tmp, &t->image[face][hwlevel], sizeof(drm_radeon_tex_image_t) );
 
    LOCK_HARDWARE( rmesa );
    do {
       ret = drmCommandWriteRead( rmesa->dri.fd, DRM_RADEON_TEXTURE,
-                                 &tex, sizeof(drmRadeonTexture) );
+                                 &tex, sizeof(drm_radeon_texture_t) );
    } while ( ret && errno == EAGAIN );
 
    UNLOCK_HARDWARE( rmesa );
diff --git a/src/mesa/drivers/dri/radeon/server/radeon_dri.c b/src/mesa/drivers/dri/radeon/server/radeon_dri.c
index e7414077ed..381fa658b1 100644
--- a/src/mesa/drivers/dri/radeon/server/radeon_dri.c
+++ b/src/mesa/drivers/dri/radeon/server/radeon_dri.c
@@ -21,8 +21,7 @@
 #include "radeon_dri.h"
 #include "radeon_macros.h"
 #include "radeon_reg.h"
-#include "radeon_sarea.h"
-#include "sarea.h"
+#include "drm_sarea.h"
 
 
 /* HACK - for now, put this here... */
@@ -243,14 +242,14 @@ static int RADEONEngineRestore( const DRIDriverContext *ctx )
  */
 static int RADEONEngineShutdown( const DRIDriverContext *ctx )
 {
-   drmRadeonCPStop  stop;
+   drm_radeon_cp_stop_t  stop;
    int              ret, i;
 
    stop.flush = 1;
    stop.idle  = 1;
 
    ret = drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_STOP, &stop, 
-			 sizeof(drmRadeonCPStop));
+			 sizeof(drm_radeon_cp_stop_t));
 
    if (ret == 0) {
       return 0;
@@ -263,7 +262,7 @@ static int RADEONEngineShutdown( const DRIDriverContext *ctx )
    i = 0;
    do {
       ret = drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_STOP, &stop, 
-			    sizeof(drmRadeonCPStop));
+			    sizeof(drm_radeon_cp_stop_t));
    } while (ret && errno == EBUSY && i++ < 10);
 
    if (ret == 0) {
@@ -275,7 +274,7 @@ static int RADEONEngineShutdown( const DRIDriverContext *ctx )
    stop.idle = 0;
 
    if (drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_STOP,
-		       &stop, sizeof(drmRadeonCPStop))) {
+		       &stop, sizeof(drm_radeon_cp_stop_t))) {
       return -errno;
    } else {
       return 0;
@@ -441,27 +440,27 @@ static int RADEONDRIAgpInit( const DRIDriverContext *ctx, RADEONInfoPtr info)
  * \return non-zero on success, or zero on failure.
  *
  * This function is a wrapper around the DRM_RADEON_CP_INIT command, passing
- * all the parameters in a drmRadeonInit structure.
+ * all the parameters in a drm_radeon_init_t structure.
  */
 static int RADEONDRIKernelInit( const DRIDriverContext *ctx,
 			       RADEONInfoPtr info)
 {
    int cpp = ctx->bpp / 8;
-   drmRadeonInit  drmInfo;
+   drm_radeon_init_t  drmInfo;
    int ret;
 
-   memset(&drmInfo, 0, sizeof(drmRadeonInit));
+   memset(&drmInfo, 0, sizeof(drm_radeon_init_t));
 
    if ( (info->ChipFamily == CHIP_FAMILY_R200) ||
 	(info->ChipFamily == CHIP_FAMILY_RV250) ||
 	(info->ChipFamily == CHIP_FAMILY_M9) ||
 	(info->ChipFamily == CHIP_FAMILY_RV280) )
-      drmInfo.func             = DRM_RADEON_INIT_R200_CP;
+      drmInfo.func             = RADEON_INIT_R200_CP;
    else
-      drmInfo.func             = DRM_RADEON_INIT_CP;
+      drmInfo.func             = RADEON_INIT_CP;
 
    /* This is the struct passed to the kernel module for its initialization */
-   drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);
+   drmInfo.sarea_priv_offset   = sizeof(drm_sarea_t);
    drmInfo.is_pci              = 0;
    drmInfo.cp_mode             = RADEON_DEFAULT_CP_BM_MODE;
    drmInfo.gart_size            = info->gartSize*1024*1024;
@@ -483,7 +482,7 @@ static int RADEONDRIKernelInit( const DRIDriverContext *ctx,
    drmInfo.gart_textures_offset = info->gartTexHandle;
 
    ret = drmCommandWrite(ctx->drmFD, DRM_RADEON_CP_INIT, &drmInfo, 
-			 sizeof(drmRadeonInit));
+			 sizeof(drm_radeon_init_t));
 
    return ret >= 0;
 }
@@ -501,7 +500,7 @@ static int RADEONDRIKernelInit( const DRIDriverContext *ctx,
 static void RADEONDRIAgpHeapInit(const DRIDriverContext *ctx,
 				 RADEONInfoPtr info)
 {
-   drmRadeonMemInitHeap drmHeap;
+   drm_radeon_mem_init_heap_t drmHeap;
 
    /* Start up the simple memory manager for gart space */
    drmHeap.region = RADEON_MEM_REGION_GART;
@@ -889,11 +888,11 @@ static int RADEONScreenInit( DRIDriverContext *ctx, RADEONInfoPtr info )
 
    /* Initialize the SAREA private data structure */
    {
-      RADEONSAREAPrivPtr pSAREAPriv;
-      pSAREAPriv = (RADEONSAREAPrivPtr)(((char*)ctx->pSAREA) + 
-					sizeof(XF86DRISAREARec));
+      drm_radeon_sarea_t *pSAREAPriv;
+      pSAREAPriv = (drm_radeon_sarea_t *)(((char*)ctx->pSAREA) + 
+					sizeof(drm_sarea_t));
       memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-      pSAREAPriv->pfAllowPageFlip = 1;
+      pSAREAPriv->pfState = 1;
    }
 
 
@@ -938,7 +937,7 @@ static int RADEONScreenInit( DRIDriverContext *ctx, RADEONInfoPtr info )
    pRADEONDRI->gartTexMapSize     = info->gartTexMapSize;
    pRADEONDRI->log2GARTTexGran    = info->log2GARTTexGran;
    pRADEONDRI->gartTexOffset      = info->gartTexStart;
-   pRADEONDRI->sarea_priv_offset = sizeof(XF86DRISAREARec);
+   pRADEONDRI->sarea_priv_offset = sizeof(drm_sarea_t);
 
    /* Don't release the lock now - let the VT switch handler do it. */
 
diff --git a/src/mesa/drivers/dri/radeon/server/radeon_dri.h b/src/mesa/drivers/dri/radeon/server/radeon_dri.h
index fc96deb102..9938fafa42 100644
--- a/src/mesa/drivers/dri/radeon/server/radeon_dri.h
+++ b/src/mesa/drivers/dri/radeon/server/radeon_dri.h
@@ -40,7 +40,8 @@
 #define _RADEON_DRI_
 
 #include "xf86drm.h"
-#include "radeon_common.h"
+#include "drm.h"
+#include "radeon_drm.h"
 
 /* DRI Driver defaults */
 #define RADEON_DEFAULT_CP_PIO_MODE    RADEON_CSQ_PRIPIO_INDPIO
diff --git a/src/mesa/drivers/dri/sis/Makefile.solo b/src/mesa/drivers/dri/sis/Makefile.solo
index 7648d6921b..4eeeeff264 100644
--- a/src/mesa/drivers/dri/sis/Makefile.solo
+++ b/src/mesa/drivers/dri/sis/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/sis/sis_clear.c b/src/mesa/drivers/dri/sis/sis_clear.c
index f71c4c4334..d34793d833 100644
--- a/src/mesa/drivers/dri/sis/sis_clear.c
+++ b/src/mesa/drivers/dri/sis/sis_clear.c
@@ -200,7 +200,7 @@ sis_3D_Clear( GLcontext * ctx, GLbitfield mask,
    GLint dirtyflags = GFLAG_ENABLESETTING | GFLAG_ENABLESETTING2 |
       GFLAG_CLIPPING | GFLAG_DESTSETTING;
    int count;
-   XF86DRIClipRectPtr pExtents;
+   drm_clip_rect_t *pExtents;
 
    bClrColor = (mask & (DD_BACK_LEFT_BIT | DD_FRONT_LEFT_BIT)) != 0;
    bClrDepth = (mask & DD_DEPTH_BIT) != 0;
@@ -358,7 +358,7 @@ sis_clear_color_buffer( GLcontext *ctx, GLenum mask, GLint x, GLint y,
 
    int count;
    GLuint depth = smesa->bytesPerPixel;
-   XF86DRIClipRectPtr pExtents = NULL;
+   drm_clip_rect_t *pExtents = NULL;
    GLint xx, yy;
    GLint x0, y0, width0, height0;
 
diff --git a/src/mesa/drivers/dri/sis/sis_context.h b/src/mesa/drivers/dri/sis/sis_context.h
index 320bf58c17..b6b403b515 100644
--- a/src/mesa/drivers/dri/sis/sis_context.h
+++ b/src/mesa/drivers/dri/sis/sis_context.h
@@ -354,7 +354,7 @@ struct sis_context
   unsigned int lastStamp;	        /* mirror driDrawable->lastStamp */
 
   drmContext hHWContext;
-  drmLock *driHwLock;
+  drm_hw_lock_t *driHwLock;
 
   sisScreenPtr sisScreen;		/* Screen private DRI data */
   SISSAREAPrivPtr sarea;		/* Private SAREA data */
diff --git a/src/mesa/drivers/dri/sis/sis_screen.c b/src/mesa/drivers/dri/sis/sis_screen.c
index 1d78801442..7b1e24e5a8 100644
--- a/src/mesa/drivers/dri/sis/sis_screen.c
+++ b/src/mesa/drivers/dri/sis/sis_screen.c
@@ -77,7 +77,7 @@ sisCreateScreen( __DRIscreenPrivate *sPriv )
    sisScreen->deviceID = sisDRIPriv->deviceID;
    sisScreen->AGPCmdBufOffset = sisDRIPriv->AGPCmdBufOffset;
    sisScreen->AGPCmdBufSize = sisDRIPriv->AGPCmdBufSize;
-   sisScreen->sarea_priv_offset = sizeof(XF86DRISAREARec);
+   sisScreen->sarea_priv_offset = sizeof(drm_sarea_t);
 
    sisScreen->mmio.handle = sisDRIPriv->regs.handle;
    sisScreen->mmio.size   = sisDRIPriv->regs.size;
@@ -199,7 +199,7 @@ static void sisCopyBuffer( __DRIdrawablePrivate *dPriv )
    stEngPacket.stdwCmd.cCmd1 = CMD1_DIR_X_INC | CMD1_DIR_Y_INC;
 
    for (i = 0; i < dPriv->numClipRects; i++) {
-      XF86DRIClipRectPtr box = &dPriv->pClipRects[i];
+      drm_clip_rect_t *box = &dPriv->pClipRects[i];
       stEngPacket.stdwSrcPos.wY = box->y1 - dPriv->y;
       stEngPacket.stdwSrcPos.wX = box->x1 - dPriv->x;
       stEngPacket.stdwDestPos.wY = box->y1;
diff --git a/src/mesa/drivers/dri/tdfx/Makefile.solo b/src/mesa/drivers/dri/tdfx/Makefile.solo
index 6b3a4cd78d..5c94009f44 100644
--- a/src/mesa/drivers/dri/tdfx/Makefile.solo
+++ b/src/mesa/drivers/dri/tdfx/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/tdfx/dri_glide.h b/src/mesa/drivers/dri/tdfx/dri_glide.h
index 0af560174e..df5a3ca24b 100644
--- a/src/mesa/drivers/dri/tdfx/dri_glide.h
+++ b/src/mesa/drivers/dri/tdfx/dri_glide.h
@@ -53,7 +53,7 @@ extern void grDRIOpen( char *pFB, char *pRegs, int deviceID,
 		       int textureOffset, int textureSize,
 		       volatile int *fifoPtr, volatile int *fifoRead );
 extern void grDRIPosition( int x, int y, int w, int h,
-			   int numClip, XF86DRIClipRectPtr pClip );
+			   int numClip, drm_clip_rect_t *pClip );
 extern void grDRILostContext( void );
 extern void grDRIImportFifo( int fifoPtr, int fifoRead );
 extern void grDRIInvalidateAll( void );
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_context.c b/src/mesa/drivers/dri/tdfx/tdfx_context.c
index 0cb5aa983f..fe23a15925 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_context.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_context.c
@@ -116,7 +116,7 @@ GLboolean tdfxCreateContext( const __GLcontextModes *mesaVis,
    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
    tdfxScreenPrivate *fxScreen = (tdfxScreenPrivate *) sPriv->private;
    TDFXSAREAPriv *saPriv = (TDFXSAREAPriv *) ((char *) sPriv->pSAREA +
-					      sizeof(XF86DRISAREARec));
+					      sizeof(drm_sarea_t));
    struct dd_function_table functions;
 
    /* Allocate tdfx context */
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_context.h b/src/mesa/drivers/dri/tdfx/tdfx_context.h
index 4bf813061e..42b725c8ec 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_context.h
+++ b/src/mesa/drivers/dri/tdfx/tdfx_context.h
@@ -769,7 +769,7 @@ struct tdfx_glide {
                       int textureOffset, int textureSize,
                       volatile int *fifoPtr, volatile int *fifoRead );
    void (*grDRIPosition)( int x, int y, int w, int h,
-                          int numClip, XF86DRIClipRectPtr pClip );
+                          int numClip, drm_clip_rect_t *pClip );
    void (*grDRILostContext)( void );
    void (*grDRIImportFifo)( int fifoPtr, int fifoRead );
    void (*grDRIInvalidateAll)( void );
@@ -913,7 +913,7 @@ struct tdfx_context {
    __DRIcontextPrivate *driContext;
    __DRIdrawablePrivate *driDrawable;
    drmContext hHWContext;
-   drmLock *driHwLock;
+   drm_hw_lock_t *driHwLock;
    int driFd;
    tdfxScreenPrivate *fxScreen;
    TDFXSAREAPriv *sarea;
@@ -928,7 +928,7 @@ struct tdfx_context {
    int y_delta;         /* distance from window bottom to screen bottom */
 
    int numClipRects;
-   XF86DRIClipRectPtr pClipRects;
+   drm_clip_rect_t *pClipRects;
    GLboolean scissoredClipRects;  /* if true, pClipRects is private storage */
 
    GuTexPalette glbPalette;         /* global texture palette */
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_span.c b/src/mesa/drivers/dri/tdfx/tdfx_span.c
index d94ef699e8..4207d05dd3 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_span.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_span.c
@@ -121,7 +121,7 @@
 #define HW_READ_CLIPLOOP()						\
       do {								\
          const __DRIdrawablePrivate *dPriv = fxMesa->driDrawable;	\
-         XF86DRIClipRectPtr rect = dPriv->pClipRects;			\
+         drm_clip_rect_t *rect = dPriv->pClipRects;			\
          int _nc = dPriv->numClipRects;					\
          while (_nc--) {						\
             const int minx = rect->x1 - fxMesa->x_offset;		\
@@ -284,7 +284,7 @@ generate_vismask(const tdfxContextPtr fxMesa, GLint x, GLint y, GLint n,
 
    /* turn on flags for all visible pixels */
    for (i = 0; i < fxMesa->numClipRects; i++) {
-      const XF86DRIClipRectPtr rect = &fxMesa->pClipRects[i];
+      const drm_clip_rect_t *rect = &fxMesa->pClipRects[i];
 
       if (y >= rect->y1 && y < rect->y2) {
 	 if (x >= rect->x1 && x + n <= rect->x2) {
@@ -324,7 +324,7 @@ visible_pixel(const tdfxContextPtr fxMesa, int scrX, int scrY)
 {
    int i;
    for (i = 0; i < fxMesa->numClipRects; i++) {
-      const XF86DRIClipRectPtr rect = &fxMesa->pClipRects[i];
+      const drm_clip_rect_t *rect = &fxMesa->pClipRects[i];
       if (scrX >= rect->x1 &&
 	  scrX < rect->x2 &&
 	  scrY >= rect->y1 && scrY < rect->y2) return GL_TRUE;
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_state.c b/src/mesa/drivers/dri/tdfx/tdfx_state.c
index 7ef088ca69..5e59b91f80 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_state.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_state.c
@@ -576,9 +576,9 @@ static void tdfxDDFogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
  * Clipping
  */
 
-static int intersect_rect( XF86DRIClipRectPtr out,
-			   const XF86DRIClipRectPtr a,
-			   const XF86DRIClipRectPtr b)
+static int intersect_rect( drm_clip_rect_t *out,
+			   const drm_clip_rect_t *a,
+			   const drm_clip_rect_t *b)
 {
    *out = *a;
    if (b->x1 > out->x1) out->x1 = b->x1;
@@ -627,7 +627,7 @@ void tdfxUpdateClipping( GLcontext *ctx )
       /* intersect OpenGL scissor box with all cliprects to make a new
        * list of cliprects.
        */
-      XF86DRIClipRectRec scissor;
+      drm_clip_rect_t scissor;
       int x1 = ctx->Scissor.X + fxMesa->x_offset;
       int y1 = fxMesa->screen_height - fxMesa->y_delta
              - ctx->Scissor.Y - ctx->Scissor.Height;
@@ -642,7 +642,7 @@ void tdfxUpdateClipping( GLcontext *ctx )
       assert(scissor.y2 >= scissor.y1);
 
       fxMesa->pClipRects = malloc(dPriv->numClipRects
-                                  * sizeof(XF86DRIClipRectRec));
+                                  * sizeof(drm_clip_rect_t));
       if (fxMesa->pClipRects) {
          int i;
          fxMesa->numClipRects = 0;
diff --git a/src/mesa/drivers/dri/unichrome/Makefile.solo b/src/mesa/drivers/dri/unichrome/Makefile.solo
index 8eb7ba04b2..0e1f53a3e3 100644
--- a/src/mesa/drivers/dri/unichrome/Makefile.solo
+++ b/src/mesa/drivers/dri/unichrome/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
 
 default: linux-solo
 
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
 MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
 
 DEFINES += \
diff --git a/src/mesa/drivers/dri/unichrome/server/via_dri.c b/src/mesa/drivers/dri/unichrome/server/via_dri.c
index d82d7acc73..7ccb62bd06 100644
--- a/src/mesa/drivers/dri/unichrome/server/via_dri.c
+++ b/src/mesa/drivers/dri/unichrome/server/via_dri.c
@@ -48,7 +48,6 @@
 #endif
 
 #include "dri_util.h"
-#include "sarea.h"
 
 #include "via_context.h"
 #include "via_dri.h"
@@ -190,9 +189,9 @@ static int VIADRIScreenInit(DRIDriverContext * ctx)
     int err;
 
 #if 0
-    ctx->shared.SAREASize = ((sizeof(XF86DRISAREARec) + 0xfff) & 0x1000);
+    ctx->shared.SAREASize = ((sizeof(drm_sarea_t) + 0xfff) & 0x1000);
 #else
-    if (sizeof(XF86DRISAREARec)+sizeof(VIASAREAPriv) > SAREA_MAX) {
+    if (sizeof(drm_sarea_t)+sizeof(VIASAREAPriv) > SAREA_MAX) {
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 			"Data does not fit in SAREA\n");
 	return FALSE;
@@ -356,7 +355,7 @@ VIADRIFinishScreenInit(DRIDriverContext * ctx)
 	VIASAREAPriv *saPriv;
 
 	saPriv=(VIASAREAPriv*)(((char*)ctx->pSAREA) +
-                               sizeof(XF86DRISAREARec));
+                               sizeof(drm_sarea_t));
 	assert(saPriv);
 	memset(saPriv, 0, sizeof(*saPriv));
 	saPriv->CtxOwner = -1;
@@ -367,7 +366,7 @@ VIADRIFinishScreenInit(DRIDriverContext * ctx)
     pVIADRI->height=ctx->shared.virtualHeight;
     pVIADRI->mem=ctx->shared.fbSize;
     pVIADRI->bytesPerPixel= (ctx->bpp+7) / 8; 
-    pVIADRI->sarea_priv_offset = sizeof(XF86DRISAREARec);
+    pVIADRI->sarea_priv_offset = sizeof(drm_sarea_t);
     /* TODO */
     pVIADRI->scrnX=pVIADRI->width;
     pVIADRI->scrnY=pVIADRI->height;
@@ -380,7 +379,7 @@ static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia)
 {
     drmVIAInit drmInfo;
     memset(&drmInfo, 0, sizeof(drmVIAInit));
-    drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);
+    drmInfo.sarea_priv_offset   = sizeof(drm_sarea_t);
     drmInfo.fb_offset           = pVia->FrameBufferBase;
     drmInfo.mmio_offset         = pVia->registerHandle;
     if (pVia->IsPCI)
diff --git a/src/mesa/drivers/dri/unichrome/server/via_driver.h b/src/mesa/drivers/dri/unichrome/server/via_driver.h
index fe7df163cf..a39af11147 100644
--- a/src/mesa/drivers/dri/unichrome/server/via_driver.h
+++ b/src/mesa/drivers/dri/unichrome/server/via_driver.h
@@ -77,7 +77,6 @@
 #else
 #include "via_regs.h"
 
-#include "sarea.h"
 #include "dri.h"
 #include "via_dri.h"
 #endif
diff --git a/src/mesa/drivers/dri/unichrome/via_context.c b/src/mesa/drivers/dri/unichrome/via_context.c
index e03f7fed92..80b573e0e5 100644
--- a/src/mesa/drivers/dri/unichrome/via_context.c
+++ b/src/mesa/drivers/dri/unichrome/via_context.c
@@ -578,7 +578,7 @@ viaCreateContext(const __GLcontextModes *mesaVis,
 #endif
     }
     
-    vmesa->pSaamRects = (XF86DRIClipRectPtr) malloc(sizeof(XF86DRIClipRectRec));    
+    vmesa->pSaamRects = (drm_clip_rect_t *) malloc(sizeof(drm_clip_rect_t));    
     return GL_TRUE;
 }
 
diff --git a/src/mesa/drivers/dri/unichrome/via_context.h b/src/mesa/drivers/dri/unichrome/via_context.h
index 8b5379b8cd..1412360591 100644
--- a/src/mesa/drivers/dri/unichrome/via_context.h
+++ b/src/mesa/drivers/dri/unichrome/via_context.h
@@ -268,7 +268,7 @@ struct via_context_t {
     XineramaScreenInfo *xsi;
 #endif
     int drawXoffSaam;
-    XF86DRIClipRectPtr pSaamRects;
+    drm_clip_rect_t *pSaamRects;
     int drawXSaam;
     int drawYSaam;
     GLuint numSaamRects;
@@ -277,7 +277,7 @@ struct via_context_t {
     int readPitch;
     int drawXoff;
     GLuint numClipRects;         /* cliprects for that buffer */
-    XF86DRIClipRectPtr pClipRects;
+    drm_clip_rect_t *pClipRects;
 
     int lastSwap;
     int texAge;
@@ -289,7 +289,7 @@ struct via_context_t {
     drm_clip_rect_t scissorRect;
 
     drmContext hHWContext;
-    drmLock *driHwLock;
+    drm_hw_lock_t *driHwLock;
     int driFd;
 #ifndef _SOLO
     Display *display;
diff --git a/src/mesa/drivers/dri/unichrome/via_ioctl.c b/src/mesa/drivers/dri/unichrome/via_ioctl.c
index 9b67b92087..a73df4e026 100644
--- a/src/mesa/drivers/dri/unichrome/via_ioctl.c
+++ b/src/mesa/drivers/dri/unichrome/via_ioctl.c
@@ -104,7 +104,7 @@ static void viaClear(GLcontext *ctx, GLbitfield mask, GLboolean all,
         
 	if (vmesa->numClipRects) {
             int nr = MIN2(i + VIA_NR_SAREA_CLIPRECTS, vmesa->numClipRects);
-            XF86DRIClipRectRec *box = vmesa->pClipRects;
+            drm_clip_rect_t *box = vmesa->pClipRects;
             drm_clip_rect_t *b = vmesa->sarea->boxes;
             int n = 0;
 	    
@@ -281,7 +281,7 @@ static void viaClear(GLcontext *ctx, GLbitfield mask, GLboolean all,
 void viaCopyBuffer(const __DRIdrawablePrivate *dPriv)
 {
     viaContextPtr vmesa;
-    XF86DRIClipRectPtr pbox;
+    drm_clip_rect_t *pbox;
     int nbox, i;
     GLuint scrn = 0, side = 0;
 #ifdef DEBUG    
@@ -321,7 +321,7 @@ void viaCopyBuffer(const __DRIdrawablePrivate *dPriv)
 	if (!vmesa->saam) {
 	    for (i = 0; i < nbox; ) {
     		int nr = MIN2(i + VIA_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
-    		XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)vmesa->sarea->boxes;
+    		drm_clip_rect_t *b = (drm_clip_rect_t *)vmesa->sarea->boxes;
 
     		vmesa->sarea->nbox = nr - i;
 
@@ -336,7 +336,7 @@ void viaCopyBuffer(const __DRIdrawablePrivate *dPriv)
 	else if (scrn == S0 || scrn == S1) {
 	    for (i = 0; i < nbox; ) {
 		int nr = MIN2(i + VIA_NR_SAREA_CLIPRECTS, vmesa->numClipRects);
-    		XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)vmesa->sarea->boxes;
+    		drm_clip_rect_t *b = (drm_clip_rect_t *)vmesa->sarea->boxes;
 
     		vmesa->sarea->nbox = nr - i;
 		
@@ -350,7 +350,7 @@ void viaCopyBuffer(const __DRIdrawablePrivate *dPriv)
 	else {
 	    for (i = 0; i < nbox; ) {
     		int nr = MIN2(i + VIA_NR_SAREA_CLIPRECTS, dPriv->numClipRects);
-    		XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)vmesa->sarea->boxes;
+    		drm_clip_rect_t *b = (drm_clip_rect_t *)vmesa->sarea->boxes;
 
     		vmesa->sarea->nbox = nr - i;
 
@@ -364,7 +364,7 @@ void viaCopyBuffer(const __DRIdrawablePrivate *dPriv)
 
 	    for (i = 0; i < nbox; ) {
     		int nr = MIN2(i + VIA_NR_SAREA_CLIPRECTS, vmesa->numSaamRects);
-    		XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)vmesa->sarea->boxes;
+    		drm_clip_rect_t *b = (drm_clip_rect_t *)vmesa->sarea->boxes;
 
     		vmesa->sarea->nbox = nr - i;
 
diff --git a/src/mesa/main/enums.h b/src/mesa/main/enums.h
index 1e7b86e3a0..d2fa917d42 100644
--- a/src/mesa/main/enums.h
+++ b/src/mesa/main/enums.h
@@ -37,7 +37,7 @@
 #define _ENUMS_H_
 
 
-#if _HAVE_FULL_GL
+#ifdef _HAVE_FULL_GL
 
 extern const char *_mesa_lookup_enum_by_nr( int nr );
 extern int _mesa_lookup_enum_by_name( const char *symbol );