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authorXiang, Haihao <haihao.xiang@intel.com>2008-09-12 09:25:34 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2008-09-12 09:25:34 +0800
commitb2e083eba2668517e40bc94e3a19cd15824ce93c (patch)
tree1a28d02b6e8fa768c877b8c6e67224788194940d /src
parent4d42c5bebf8740ebfc15571d24b6c92f79e09263 (diff)
i965: Add support for G41 chipset which is another 4 series.
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/intel/intel_chipset.h4
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c3
2 files changed, 6 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 15b9ef4312..170efd060a 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -58,6 +58,7 @@
#define PCI_CHIP_IGD_E_G 0x2E02
#define PCI_CHIP_Q45_G 0x2E12
#define PCI_CHIP_G45_G 0x2E22
+#define PCI_CHIP_G41_G 0x2E32
#define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \
devid == PCI_CHIP_I915_GM || \
@@ -70,7 +71,8 @@
#define IS_GM45_GM(devid) (devid == PCI_CHIP_GM45_GM)
#define IS_G4X(devid) (devid == PCI_CHIP_IGD_E_G || \
devid == PCI_CHIP_Q45_G || \
- devid == PCI_CHIP_G45_G)
+ devid == PCI_CHIP_G45_G || \
+ devid == PCI_CHIP_G41_G)
#define IS_915(devid) (devid == PCI_CHIP_I915_G || \
devid == PCI_CHIP_E7221_G || \
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 4d1a742698..7065bb35ee 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -179,6 +179,9 @@ intelGetString(GLcontext * ctx, GLenum name)
case PCI_CHIP_Q45_G:
chipset = "Intel(R) Q45/Q43";
break;
+ case PCI_CHIP_G41_G:
+ chipset = "Intel(R) G41";
+ break;
default:
chipset = "Unknown Intel Chipset";
break;