diff options
| author | Ben Skeggs <skeggsb@gmail.com> | 2007-12-23 16:05:02 +1100 | 
|---|---|---|
| committer | Ben Skeggs <skeggsb@gmail.com> | 2007-12-23 16:05:02 +1100 | 
| commit | b4b002661e8a1f9a37201796c996503c33b8c96f (patch) | |
| tree | 571860fc0f503ea1a08a0a80dfb11e5443fc58ed /src | |
| parent | 6c14cf58343135491068e96575bf4e61a6d34c87 (diff) | |
nouveau: match gallium changes
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/nouveau_winsys/nouveau_screen.c | 5 | ||||
| -rw-r--r-- | src/mesa/pipe/nv40/nv40_fragprog.c | 5 | ||||
| -rw-r--r-- | src/mesa/pipe/nv40/nv40_vertprog.c | 65 | 
3 files changed, 69 insertions, 6 deletions
| diff --git a/src/mesa/drivers/dri/nouveau_winsys/nouveau_screen.c b/src/mesa/drivers/dri/nouveau_winsys/nouveau_screen.c index 6324a59131..784dfdd155 100644 --- a/src/mesa/drivers/dri/nouveau_winsys/nouveau_screen.c +++ b/src/mesa/drivers/dri/nouveau_winsys/nouveau_screen.c @@ -141,8 +141,9 @@ nouveau_create_buffer(__DRIscreenPrivate * driScrnPriv,  	else  		stencil = PIPE_FORMAT_NONE; -	nvfb->stfb = st_create_framebuffer(glVis, GL_TRUE, colour, depth, -					   stencil, (void*)nvfb); +	nvfb->stfb = st_create_framebuffer(glVis, colour, depth, stencil, +					   driDrawPriv->w, driDrawPriv->h, +					   (void*)nvfb);  	if (!nvfb->stfb) {  		free(nvfb);  		return  GL_FALSE; diff --git a/src/mesa/pipe/nv40/nv40_fragprog.c b/src/mesa/pipe/nv40/nv40_fragprog.c index c95f31e143..480c4c967b 100644 --- a/src/mesa/pipe/nv40/nv40_fragprog.c +++ b/src/mesa/pipe/nv40/nv40_fragprog.c @@ -378,7 +378,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,  	int ai = -1, ci = -1;  	int i; -	if (finst->Instruction.Opcode == TGSI_OPCODE_RET) +	if (finst->Instruction.Opcode == TGSI_OPCODE_END)  		return TRUE;  	fpc->temp_temp_count = 0; @@ -537,6 +537,9 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,  	case TGSI_OPCODE_RCP:  		arith(fpc, sat, RCP, dst, mask, src[0], none, none);  		break; +	case TGSI_OPCODE_RET: +		assert(0); +		break;  	case TGSI_OPCODE_RFL:  		tmp = temp(fpc);  		arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[0], none); diff --git a/src/mesa/pipe/nv40/nv40_vertprog.c b/src/mesa/pipe/nv40/nv40_vertprog.c index 981d70ec92..84618c1e1b 100644 --- a/src/mesa/pipe/nv40/nv40_vertprog.c +++ b/src/mesa/pipe/nv40/nv40_vertprog.c @@ -47,9 +47,12 @@ struct nv40_vpc {  	int high_temp;  	int temp_temp_count; + +	struct nv40_sreg *imm; +	unsigned nr_imm;  }; -static INLINE struct nv40_sreg +static struct nv40_sreg  temp(struct nv40_vpc *vpc)  {  	int idx; @@ -59,7 +62,7 @@ temp(struct nv40_vpc *vpc)  	return nv40_sr(NV40SR_TEMP, idx);  } -static INLINE struct nv40_sreg +static struct nv40_sreg  constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w)  {  	struct nv40_vertex_program *vp = vpc->vp; @@ -251,6 +254,9 @@ tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) {  	case TGSI_FILE_CONSTANT:  		src = constant(vpc, fsrc->SrcRegister.Index, 0, 0, 0, 0);  		break; +	case TGSI_FILE_IMMEDIATE: +		src = vpc->imm[fsrc->SrcRegister.Index]; +		break;  	case TGSI_FILE_TEMPORARY:  		if (vpc->high_temp < fsrc->SrcRegister.Index)  			vpc->high_temp = fsrc->SrcRegister.Index; @@ -315,7 +321,7 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,  	int ai = -1, ci = -1;  	int i; -	if (finst->Instruction.Opcode == TGSI_OPCODE_RET) +	if (finst->Instruction.Opcode == TGSI_OPCODE_END)  		return TRUE;  	vpc->temp_temp_count = 0; @@ -343,7 +349,11 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,  				      tgsi_src(vpc, fsrc), none, none);  			}  			break; +		/*XXX: index comparison is broken now that consts come from +		 *     two different register files. +		 */  		case TGSI_FILE_CONSTANT: +		case TGSI_FILE_IMMEDIATE:  			if (ci == -1 || ci == fsrc->SrcRegister.Index) {  				ci = fsrc->SrcRegister.Index;  				src[i] = tgsi_src(vpc, fsrc); @@ -435,6 +445,8 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,  	case TGSI_OPCODE_RCP:  		arith(vpc, 1, OP_RCP, dst, mask, none, none, src[0]);  		break; +	case TGSI_OPCODE_RET: +		break;  	case TGSI_OPCODE_RSQ:  		arith(vpc, 1, OP_RSQ, dst, mask, none, none, src[0]);  		break; @@ -518,6 +530,35 @@ nv40_vertprog_parse_decl_output(struct nv40_vpc *vpc,  	return TRUE;  } +static boolean +nv40_vertprog_prepare(struct nv40_vpc *vpc) +{ +	struct tgsi_parse_context p; +	int nr_imm = 0; + +	tgsi_parse_init(&p, vpc->vp->pipe->tokens); +	while (!tgsi_parse_end_of_tokens(&p)) { +		const union tgsi_full_token *tok = &p.FullToken; + +		tgsi_parse_token(&p); +		switch(tok->Token.Type) { +		case TGSI_TOKEN_TYPE_IMMEDIATE: +			nr_imm++; +			break; +		default: +			break; +		} +	} +	tgsi_parse_free(&p); + +	if (nr_imm) { +		vpc->imm = calloc(nr_imm, sizeof(struct nv40_sreg)); +		assert(vpc->imm); +	} + +	return TRUE; +} +  void  nv40_vertprog_translate(struct nv40_context *nv40,  			struct nv40_vertex_program *vp) @@ -531,6 +572,11 @@ nv40_vertprog_translate(struct nv40_context *nv40,  	vpc->vp = vp;  	vpc->high_temp = -1; +	if (!nv40_vertprog_prepare(vpc)) { +		free(vpc); +		return; +	} +  	tgsi_parse_init(&parse, vp->pipe->tokens);  	while (!tgsi_parse_end_of_tokens(&parse)) { @@ -552,6 +598,19 @@ nv40_vertprog_translate(struct nv40_context *nv40,  		}  			break;  		case TGSI_TOKEN_TYPE_IMMEDIATE: +		{ +			const struct tgsi_full_immediate *imm; + +			imm = &parse.FullToken.FullImmediate; +			assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); +//			assert(imm->Immediate.Size == 4); +			vpc->imm[vpc->nr_imm++] = +				constant(vpc, -1, +					 imm->u.ImmediateFloat32[0].Float, +					 imm->u.ImmediateFloat32[1].Float, +					 imm->u.ImmediateFloat32[2].Float, +					 imm->u.ImmediateFloat32[3].Float); +		}  			break;  		case TGSI_TOKEN_TYPE_INSTRUCTION:  		{ | 
