diff options
| author | Keith Whitwell <keithw@vmware.com> | 2009-11-30 16:16:30 +0000 |
|---|---|---|
| committer | Keith Whitwell <keithw@vmware.com> | 2009-11-30 16:16:30 +0000 |
| commit | bb1cde755bce0ea29cc4c1a29ad3841e3b304309 (patch) | |
| tree | d55ebe93b5fb22c97b9482622d182fdebd0d776c /src | |
| parent | 6781f624af8b06061673f3fd6f19ffb6a56c3e8c (diff) | |
i965g: turn on texture tiling by default
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/i965/brw_screen.c | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/i965/brw_screen.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/i965/brw_screen_texture.c | 11 |
3 files changed, 8 insertions, 7 deletions
diff --git a/src/gallium/drivers/i965/brw_screen.c b/src/gallium/drivers/i965/brw_screen.c index 70e2d9c47a..1855e4fd45 100644 --- a/src/gallium/drivers/i965/brw_screen.c +++ b/src/gallium/drivers/i965/brw_screen.c @@ -396,5 +396,8 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id) brw_screen_tex_surface_init(bscreen); brw_screen_buffer_init(bscreen); + bscreen->no_tiling = debug_get_option("BRW_NO_TILING", FALSE); + + return &bscreen->base; } diff --git a/src/gallium/drivers/i965/brw_screen.h b/src/gallium/drivers/i965/brw_screen.h index ab811e48fc..7226d9228b 100644 --- a/src/gallium/drivers/i965/brw_screen.h +++ b/src/gallium/drivers/i965/brw_screen.h @@ -45,6 +45,7 @@ struct brw_screen struct pipe_screen base; struct brw_chipset chipset; struct brw_winsys_screen *sws; + boolean no_tiling; }; /** diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c index 650cac240b..f4c20f31a5 100644 --- a/src/gallium/drivers/i965/brw_screen_texture.c +++ b/src/gallium/drivers/i965/brw_screen_texture.c @@ -209,14 +209,11 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, /* XXX: No tiling with compressed textures?? */ - if (tex->compressed == 0 - /* && bscreen->use_texture_tiling */ - /* && bscreen->kernel_exec_fencing */) + if (tex->compressed == 0 && + !bscreen->no_tiling) { - if (1) - tex->tiling = BRW_TILING_NONE; - else if (bscreen->chipset.is_965 && - pf_is_depth_or_stencil(templ->format)) + if (bscreen->chipset.is_965 && + pf_is_depth_or_stencil(templ->format)) tex->tiling = BRW_TILING_Y; else tex->tiling = BRW_TILING_X; |