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authorKeith Whitwell <keithw@vmware.com>2009-11-04 23:22:48 +0000
committerKeith Whitwell <keithw@vmware.com>2009-11-04 23:22:48 +0000
commitbf4a518cf27910fe2bb828fd43de5472e5e51760 (patch)
tree6614b2c238a8b17cf47d4d5c236bdc57b637a5a1 /src
parent1b611f99b430333e840908b42471a721689b2529 (diff)
i965g: clean up wm init_registers func
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/i965/brw_wm_pass2.c20
1 files changed, 11 insertions, 9 deletions
diff --git a/src/gallium/drivers/i965/brw_wm_pass2.c b/src/gallium/drivers/i965/brw_wm_pass2.c
index d3d678a5e6..a5574bd1a3 100644
--- a/src/gallium/drivers/i965/brw_wm_pass2.c
+++ b/src/gallium/drivers/i965/brw_wm_pass2.c
@@ -69,30 +69,32 @@ static void prealloc_reg(struct brw_wm_compile *c,
*/
static void init_registers( struct brw_wm_compile *c )
{
- GLuint nr_interp_regs = 0;
- GLuint i = 0;
+ GLuint reg = 0;
GLuint j;
for (j = 0; j < c->grf_limit; j++)
c->pass2_grf[j].nextuse = BRW_WM_MAX_INSN;
+ /* Pre-allocate incoming payload regs:
+ */
for (j = 0; j < c->key.nr_depth_regs; j++)
- prealloc_reg(c, &c->payload.depth[j], i++);
+ prealloc_reg(c, &c->payload.depth[j], reg++);
for (j = 0; j < c->nr_creg; j++)
- prealloc_reg(c, &c->creg[j], i++);
+ prealloc_reg(c, &c->creg[j], reg++);
- for (j = 0; j < c->key.vp_nr_outputs; j++) {
- prealloc_reg(c, &c->payload.input_interp[j], i++);
- }
+ for (j = 0; j < c->key.vp_nr_outputs; j++)
+ prealloc_reg(c, &c->payload.input_interp[j], reg++);
- assert(nr_interp_regs >= 1);
+ assert(c->key.vp_nr_outputs >= 1);
c->prog_data.first_curbe_grf = c->key.nr_depth_regs * 2;
c->prog_data.urb_read_length = c->key.vp_nr_outputs * 2;
c->prog_data.curb_read_length = c->nr_creg * 2;
- c->max_wm_grf = i * 2;
+ /* Note this allocation:
+ */
+ c->max_wm_grf = reg * 2;
}