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authorAlex Deucher <alexdeucher@gmail.com>2009-09-15 17:12:03 -0400
committerAlex Deucher <alexdeucher@gmail.com>2009-09-24 10:01:56 -0400
commitec14d59afa952b4e53ad268971098584686a6fca (patch)
tree151e2072f7dd1ad958f253aa2a124120209b24b2 /src
parentdbec27be856584bc5205c7eeeca2b7e98299d4cb (diff)
radeon: don't build non-r600 span code on r600
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_span.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 9959da011e..d603f52df7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -239,7 +239,7 @@ static GLubyte *r600_ptr_color(const struct radeon_renderbuffer * rrb,
return &ptr[offset];
}
-#endif
+#else
/* radeon tiling on r300-r500 has 4 states,
macro-linear/micro-linear
@@ -332,7 +332,10 @@ static GLubyte *radeon_ptr_2byte_8x2(const struct radeon_renderbuffer * rrb,
return &ptr[offset];
}
+#endif
+
#ifndef COMPILE_R300
+#ifndef COMPILE_R600
static uint32_t
z24s8_to_s8z24(uint32_t val)
{
@@ -345,6 +348,7 @@ s8z24_to_z24s8(uint32_t val)
return (val >> 24) | (val << 8);
}
#endif
+#endif
/*
* Note that all information needed to access pixels in a renderbuffer