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-rw-r--r--src/gallium/drivers/cell/ppu/cell_gen_fragment.c30
-rw-r--r--src/gallium/drivers/cell/ppu/cell_screen.c2
-rw-r--r--src/gallium/drivers/cell/ppu/cell_state_per_fragment.c4
-rw-r--r--src/gallium/drivers/cell/spu/spu_command.c4
-rw-r--r--src/gallium/drivers/cell/spu/spu_per_fragment_op.c18
5 files changed, 29 insertions, 29 deletions
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
index 70683bb367..576d514741 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c
@@ -304,7 +304,7 @@ unpack_colors(struct spe_function *f,
spe_comment(f, 0, "Unpack framebuffer colors, convert to floats");
switch (color_format) {
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_B8G8R8A8_UNORM:
/* fbB = fbRGBA & mask */
spe_and(f, fbB_reg, fbRGBA_reg, mask0_reg);
@@ -327,7 +327,7 @@ unpack_colors(struct spe_function *f,
spe_roti(f, fbA_reg, fbA_reg, -24);
break;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
/* fbA = fbRGBA & mask */
spe_and(f, fbA_reg, fbRGBA_reg, mask0_reg);
@@ -1043,12 +1043,12 @@ gen_pack_colors(struct spe_function *f,
spe_rotmi(f, a_reg, a_reg, -24);
/* Shift the color bytes according to the surface format */
- if (color_format == PIPE_FORMAT_A8R8G8B8_UNORM) {
+ if (color_format == PIPE_FORMAT_B8G8R8A8_UNORM) {
spe_roti(f, g_reg, g_reg, 8); /* green <<= 8 */
spe_roti(f, r_reg, r_reg, 16); /* red <<= 16 */
spe_roti(f, a_reg, a_reg, 24); /* alpha <<= 24 */
}
- else if (color_format == PIPE_FORMAT_B8G8R8A8_UNORM) {
+ else if (color_format == PIPE_FORMAT_A8R8G8B8_UNORM) {
spe_roti(f, r_reg, r_reg, 8); /* red <<= 8 */
spe_roti(f, g_reg, g_reg, 16); /* green <<= 16 */
spe_roti(f, b_reg, b_reg, 24); /* blue <<= 24 */
@@ -1096,14 +1096,14 @@ gen_colormask(struct spe_function *f,
* end up, so we can mask them correctly.
*/
switch(color_format) {
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_B8G8R8A8_UNORM:
/* ARGB */
a_mask = 0xff000000;
r_mask = 0x00ff0000;
g_mask = 0x0000ff00;
b_mask = 0x000000ff;
break;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
/* BGRA */
b_mask = 0xff000000;
g_mask = 0x00ff0000;
@@ -1859,8 +1859,8 @@ gen_depth_stencil(struct cell_context *cell,
spe_comment(f, 0, "Fetch Z/stencil quad from tile");
switch(zs_format) {
- case PIPE_FORMAT_S8Z24_UNORM: /* fall through */
- case PIPE_FORMAT_X8Z24_UNORM:
+ case PIPE_FORMAT_Z24S8_UNORM: /* fall through */
+ case PIPE_FORMAT_Z24X8_UNORM:
/* prepare mask to extract Z vals from ZS vals */
spe_load_uint(f, zmask_reg, 0x00ffffff);
@@ -1880,8 +1880,8 @@ gen_depth_stencil(struct cell_context *cell,
spe_rotmi(f, fbS_reg, fbZS_reg, -24);
break;
- case PIPE_FORMAT_Z24S8_UNORM: /* fall through */
- case PIPE_FORMAT_Z24X8_UNORM:
+ case PIPE_FORMAT_S8Z24_UNORM: /* fall through */
+ case PIPE_FORMAT_X8Z24_UNORM:
/* convert fragment Z from [0,1] to 32-bit ints */
spe_cfltu(f, fragZ_reg, fragZ_reg, 32);
@@ -1969,13 +1969,13 @@ gen_depth_stencil(struct cell_context *cell,
* fbS_reg has four 8-bit Z values in bits [7..0].
*/
spe_comment(f, 0, "Store quad's depth/stencil values in tile");
- if (zs_format == PIPE_FORMAT_S8Z24_UNORM ||
- zs_format == PIPE_FORMAT_X8Z24_UNORM) {
+ if (zs_format == PIPE_FORMAT_Z24S8_UNORM ||
+ zs_format == PIPE_FORMAT_Z24X8_UNORM) {
spe_shli(f, fbS_reg, fbS_reg, 24); /* fbS = fbS << 24 */
spe_or(f, fbZS_reg, fbS_reg, fbZ_reg); /* fbZS = fbS | fbZ */
}
- else if (zs_format == PIPE_FORMAT_Z24S8_UNORM ||
- zs_format == PIPE_FORMAT_Z24X8_UNORM) {
+ else if (zs_format == PIPE_FORMAT_S8Z24_UNORM ||
+ zs_format == PIPE_FORMAT_X8Z24_UNORM) {
spe_shli(f, fbZ_reg, fbZ_reg, 8); /* fbZ = fbZ << 8 */
spe_or(f, fbZS_reg, fbS_reg, fbZ_reg); /* fbZS = fbS | fbZ */
}
@@ -2015,7 +2015,7 @@ gen_depth_stencil(struct cell_context *cell,
* code before the fragment shader to cull fragments/quads that are
* totally occluded/discarded.
*
- * XXX we only support PIPE_FORMAT_Z24S8_UNORM z/stencil buffer right now.
+ * XXX we only support PIPE_FORMAT_S8Z24_UNORM z/stencil buffer right now.
*
* See the spu_default_fragment_ops() function to see how the per-fragment
* operations would be done with ordinary C code.
diff --git a/src/gallium/drivers/cell/ppu/cell_screen.c b/src/gallium/drivers/cell/ppu/cell_screen.c
index 449855f539..a43f8638dc 100644
--- a/src/gallium/drivers/cell/ppu/cell_screen.c
+++ b/src/gallium/drivers/cell/ppu/cell_screen.c
@@ -136,7 +136,7 @@ cell_is_format_supported( struct pipe_screen *screen,
{
/* cell supports most formats, XXX for now anyway */
if (format == PIPE_FORMAT_DXT5_RGBA ||
- format == PIPE_FORMAT_R8G8B8A8_SRGB)
+ format == PIPE_FORMAT_A8B8G8R8_SRGB)
return FALSE;
else
return TRUE;
diff --git a/src/gallium/drivers/cell/ppu/cell_state_per_fragment.c b/src/gallium/drivers/cell/ppu/cell_state_per_fragment.c
index 07be5e92ea..dc33e7ccc2 100644
--- a/src/gallium/drivers/cell/ppu/cell_state_per_fragment.c
+++ b/src/gallium/drivers/cell/ppu/cell_state_per_fragment.c
@@ -1251,7 +1251,7 @@ cell_generate_logic_op(struct spe_function *f,
/* Convert fragment colors to framebuffer format in AoS layout.
*/
switch (surf->format) {
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_B8G8R8A8_UNORM:
data[0] = 0x00010203;
data[1] = 0x10111213;
data[2] = 0x04050607;
@@ -1261,7 +1261,7 @@ cell_generate_logic_op(struct spe_function *f,
data[6] = 0x80808080;
data[7] = 0x80808080;
break;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
data[0] = 0x03020100;
data[1] = 0x13121110;
data[2] = 0x07060504;
diff --git a/src/gallium/drivers/cell/spu/spu_command.c b/src/gallium/drivers/cell/spu/spu_command.c
index 55bd85bde2..79f1fb7fb2 100644
--- a/src/gallium/drivers/cell/spu/spu_command.c
+++ b/src/gallium/drivers/cell/spu/spu_command.c
@@ -337,10 +337,10 @@ cmd_state_framebuffer(const struct cell_command_framebuffer *cmd)
spu.fb.zsize = 4;
spu.fb.zscale = (float) 0xffffffffu;
break;
- case PIPE_FORMAT_Z24S8_UNORM:
case PIPE_FORMAT_S8Z24_UNORM:
- case PIPE_FORMAT_Z24X8_UNORM:
+ case PIPE_FORMAT_Z24S8_UNORM:
case PIPE_FORMAT_X8Z24_UNORM:
+ case PIPE_FORMAT_Z24X8_UNORM:
spu.fb.zsize = 4;
spu.fb.zscale = (float) 0x00ffffffu;
break;
diff --git a/src/gallium/drivers/cell/spu/spu_per_fragment_op.c b/src/gallium/drivers/cell/spu/spu_per_fragment_op.c
index 5328374080..2c9e7458af 100644
--- a/src/gallium/drivers/cell/spu/spu_per_fragment_op.c
+++ b/src/gallium/drivers/cell/spu/spu_per_fragment_op.c
@@ -138,14 +138,14 @@ spu_fallback_fragment_ops(uint x, uint y,
if (spu.depth_stencil_alpha.stencil[0].enabled) {
/* do stencil test */
- ASSERT(spu.fb.depth_format == PIPE_FORMAT_S8Z24_UNORM);
+ ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24S8_UNORM);
}
else if (spu.depth_stencil_alpha.depth.enabled) {
/* do depth test */
- ASSERT(spu.fb.depth_format == PIPE_FORMAT_S8Z24_UNORM ||
- spu.fb.depth_format == PIPE_FORMAT_X8Z24_UNORM);
+ ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24S8_UNORM ||
+ spu.fb.depth_format == PIPE_FORMAT_Z24X8_UNORM);
vector unsigned int ifragZ;
vector unsigned int zmask;
@@ -240,13 +240,13 @@ spu_fallback_fragment_ops(uint x, uint y,
{
vector float temp[4]; /* float colors in AOS form */
switch (spu.fb.color_format) {
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
temp[0] = spu_unpack_B8G8R8A8(fbc0);
temp[1] = spu_unpack_B8G8R8A8(fbc1);
temp[2] = spu_unpack_B8G8R8A8(fbc2);
temp[3] = spu_unpack_B8G8R8A8(fbc3);
break;
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_B8G8R8A8_UNORM:
temp[0] = spu_unpack_A8R8G8B8(fbc0);
temp[1] = spu_unpack_A8R8G8B8(fbc1);
temp[2] = spu_unpack_A8R8G8B8(fbc2);
@@ -506,13 +506,13 @@ spu_fallback_fragment_ops(uint x, uint y,
* Pack fragment float colors into 32-bit RGBA words.
*/
switch (spu.fb.color_format) {
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_B8G8R8A8_UNORM:
fragc0 = spu_pack_A8R8G8B8(frag_aos[0]);
fragc1 = spu_pack_A8R8G8B8(frag_aos[1]);
fragc2 = spu_pack_A8R8G8B8(frag_aos[2]);
fragc3 = spu_pack_A8R8G8B8(frag_aos[3]);
break;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
fragc0 = spu_pack_B8G8R8A8(frag_aos[0]);
fragc1 = spu_pack_B8G8R8A8(frag_aos[1]);
fragc2 = spu_pack_B8G8R8A8(frag_aos[2]);
@@ -532,7 +532,7 @@ spu_fallback_fragment_ops(uint x, uint y,
/* Form bitmask depending on color buffer format and colormask bits */
switch (spu.fb.color_format) {
- case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case PIPE_FORMAT_B8G8R8A8_UNORM:
if (spu.blend.rt[0].colormask & PIPE_MASK_R)
cmask |= 0x00ff0000; /* red */
if (spu.blend.rt[0].colormask & PIPE_MASK_G)
@@ -542,7 +542,7 @@ spu_fallback_fragment_ops(uint x, uint y,
if (spu.blend.rt[0].colormask & PIPE_MASK_A)
cmask |= 0xff000000; /* alpha */
break;
- case PIPE_FORMAT_B8G8R8A8_UNORM:
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
if (spu.blend.rt[0].colormask & PIPE_MASK_R)
cmask |= 0x0000ff00; /* red */
if (spu.blend.rt[0].colormask & PIPE_MASK_G)