diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.h | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_iz.c | 22 |
3 files changed, 23 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index d70be7bda2..17ff3e2b2b 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -215,6 +215,7 @@ static void do_wm_prog( struct brw_context *brw, static void brw_wm_populate_key( struct brw_context *brw, struct brw_wm_prog_key *key ) { + struct intel_context *intel = &brw->intel; GLcontext *ctx = &brw->intel.ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ const struct brw_fragment_program *fp = @@ -279,7 +280,8 @@ static void brw_wm_populate_key( struct brw_context *brw, } } - brw_wm_lookup_iz(line_aa, + brw_wm_lookup_iz(intel, + line_aa, lookup, uses_depth, key); diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index c28acad24b..fed1372969 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -299,7 +299,8 @@ void brw_wm_print_insn( struct brw_wm_compile *c, void brw_wm_print_program( struct brw_wm_compile *c, const char *stage ); -void brw_wm_lookup_iz( GLuint line_aa, +void brw_wm_lookup_iz( struct intel_context *intel, + GLuint line_aa, GLuint lookup, GLboolean ps_uses_depth, struct brw_wm_prog_key *key ); diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.c b/src/mesa/drivers/dri/i965/brw_wm_iz.c index 8505ef1951..62e556698b 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_iz.c +++ b/src/mesa/drivers/dri/i965/brw_wm_iz.c @@ -120,24 +120,38 @@ const struct { * \param line_aa AA_NEVER, AA_ALWAYS or AA_SOMETIMES * \param lookup bitmask of IZ_* flags */ -void brw_wm_lookup_iz( GLuint line_aa, +void brw_wm_lookup_iz( struct intel_context *intel, + GLuint line_aa, GLuint lookup, GLboolean ps_uses_depth, struct brw_wm_prog_key *key ) { GLuint reg = 2; + GLboolean kill_stats_promoted_workaround = GL_FALSE; assert (lookup < IZ_BIT_MAX); - + + /* Crazy workaround in the windowizer, which we need to track in + * our register allocation and render target writes. See the "If + * statistics are enabled..." paragraph of 11.5.3.2: Early Depth + * Test Cases [Pre-DevGT] of the 3D Pipeline - Windower B-Spec. + */ + if (intel->stats_wm && + (lookup & IZ_PS_KILL_ALPHATEST_BIT) && + wm_iz_table[lookup].mode == P) { + kill_stats_promoted_workaround = GL_TRUE; + } + if (lookup & IZ_PS_COMPUTES_DEPTH_BIT) key->computes_depth = 1; - if (wm_iz_table[lookup].sd_present || ps_uses_depth) { + if (wm_iz_table[lookup].sd_present || ps_uses_depth || + kill_stats_promoted_workaround) { key->source_depth_reg = reg; reg += 2; } - if (wm_iz_table[lookup].sd_to_rt) + if (wm_iz_table[lookup].sd_to_rt || kill_stats_promoted_workaround) key->source_depth_to_render_target = 1; if (wm_iz_table[lookup].ds_present || line_aa != AA_NEVER) { |