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Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_context.h')
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h132
1 files changed, 39 insertions, 93 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 356fa4d1e5..07207bfbec 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -117,8 +117,6 @@ struct intel_context
struct intel_region * depth_region,
GLuint num_regions);
- GLuint (*flush_cmd) (void);
-
void (*reduced_primitive_state) (struct intel_context * intel,
GLenum rprim);
@@ -137,14 +135,6 @@ struct intel_context
struct intel_region * draw_region,
struct intel_region * depth_region);
- void (*meta_draw_quad)(struct intel_context *intel,
- GLfloat x0, GLfloat x1,
- GLfloat y0, GLfloat y1,
- GLfloat z,
- GLuint color, /* ARGB32 */
- GLfloat s0, GLfloat s1,
- GLfloat t0, GLfloat t1);
-
void (*meta_color_mask) (struct intel_context * intel, GLboolean);
void (*meta_stencil_replace) (struct intel_context * intel,
@@ -176,27 +166,27 @@ struct intel_context
struct dri_metaops meta;
- GLint refcount;
GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
GLuint NewGLState;
dri_bufmgr *bufmgr;
unsigned int maxBatchSize;
- struct intel_region *front_region;
- struct intel_region *back_region;
- struct intel_region *depth_region;
-
/**
- * This value indicates that the kernel memory manager is being used
- * instead of the fake client-side memory manager.
+ * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
*/
- GLboolean ttm;
+ int gen;
+ GLboolean needs_ff_sync;
+ GLboolean is_ironlake;
+ GLboolean is_g4x;
+ GLboolean is_945;
+ GLboolean has_luminance_srgb;
+
+ int urb_size;
struct intel_batchbuffer *batch;
drm_intel_bo *first_post_swapbuffers_batch;
GLboolean no_batch_wrap;
- unsigned batch_id;
struct
{
@@ -216,10 +206,6 @@ struct intel_context
char *prevLockFile;
int prevLockLine;
- GLuint ClearColor565;
- GLuint ClearColor8888;
-
-
/* Offsets of fields within the current vertex:
*/
GLuint coloroffset;
@@ -236,6 +222,7 @@ struct intel_context
GLboolean hw_stipple;
GLboolean depth_buffer_is_float;
GLboolean no_rast;
+ GLboolean no_hw;
GLboolean always_flush_batch;
GLboolean always_flush_cache;
@@ -261,19 +248,6 @@ struct intel_context
intel_tri_func draw_tri;
/**
- * Set to true if a single constant cliprect should be used in the
- * batchbuffer. Otherwise, cliprects must be calculated at batchbuffer
- * flush time while the lock is held.
- */
- GLboolean constant_cliprect;
-
- /**
- * In !constant_cliprect mode, set to true if the front cliprects should be
- * used instead of back.
- */
- GLboolean front_cliprects;
-
- /**
* Set if rendering has occured to the drawable's front buffer.
*
* This is used in the DRI2 case to detect that glFlush should also copy
@@ -301,48 +275,23 @@ struct intel_context
GLboolean use_early_z;
drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
- int perf_boxes;
-
- GLuint do_usleeps;
- int do_irqs;
- GLuint irqsEmitted;
-
- GLboolean scissor;
drm_clip_rect_t draw_rect;
drm_clip_rect_t scissor_rect;
- drm_context_t hHWContext;
- drmLock *driHwLock;
int driFd;
- __DRIcontextPrivate *driContext;
- __DRIdrawablePrivate *driDrawable;
- __DRIdrawablePrivate *driReadDrawable;
- __DRIscreenPrivate *driScreen;
+ __DRIcontext *driContext;
+ __DRIdrawable *driDrawable;
+ __DRIdrawable *driReadDrawable;
+ __DRIscreen *driScreen;
intelScreenPrivate *intelScreen;
- volatile drm_i915_sarea_t *sarea;
-
- GLuint lastStamp;
-
- GLboolean no_hw;
/**
* Configuration cache
*/
driOptionCache optionCache;
-
- int64_t swap_ust;
- int64_t swap_missed_ust;
-
- GLuint swap_count;
- GLuint swap_missed_count;
};
-/* These are functions now:
- */
-void LOCK_HARDWARE( struct intel_context *intel );
-void UNLOCK_HARDWARE( struct intel_context *intel );
-
extern char *__progname;
@@ -353,14 +302,14 @@ extern char *__progname;
#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
#define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
-static inline uint32_t
+static INLINE uint32_t
U_FIXED(float value, uint32_t frac_bits)
{
value *= (1 << frac_bits);
return value < 0 ? 0 : value;
}
-static inline uint32_t
+static INLINE uint32_t
S_FIXED(float value, uint32_t frac_bits)
{
return value * (1 << frac_bits);
@@ -373,29 +322,6 @@ do { \
} while (0)
/* ================================================================
- * Color packing:
- */
-
-#define INTEL_PACKCOLOR4444(r,g,b,a) \
- ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
-
-#define INTEL_PACKCOLOR1555(r,g,b,a) \
- ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
- ((a) ? 0x8000 : 0))
-
-#define INTEL_PACKCOLOR565(r,g,b) \
- ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
-
-#define INTEL_PACKCOLOR8888(r,g,b,a) \
- ((a<<24) | (r<<16) | (g<<8) | b)
-
-#define INTEL_PACKCOLOR(format, r, g, b, a) \
-(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) : \
- (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) : \
- (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) : \
- 0)))
-
-/* ================================================================
* From linux kernel i386 header files, copes with odd sizes better
* than COPY_DWORDS would:
* XXX Put this in src/mesa/main/imports.h ???
@@ -480,14 +406,13 @@ extern int INTEL_DEBUG;
extern GLboolean intelInitContext(struct intel_context *intel,
const __GLcontextModes * mesaVis,
- __DRIcontextPrivate * driContextPriv,
+ __DRIcontext * driContextPriv,
void *sharedContextPrivate,
struct dd_function_table *functions);
-extern void intelGetLock(struct intel_context *intel, GLuint flags);
-
extern void intelFinish(GLcontext * ctx);
extern void intelFlush(GLcontext * ctx);
+extern void intel_flush(GLcontext * ctx, GLboolean needs_mi_flush);
extern void intelInitDriverFunctions(struct dd_function_table *functions);
@@ -587,4 +512,25 @@ is_power_of_two(uint32_t value)
return (value & (value - 1)) == 0;
}
+static INLINE void
+intel_bo_map_gtt_preferred(struct intel_context *intel,
+ drm_intel_bo *bo,
+ GLboolean write)
+{
+ if (intel->intelScreen->kernel_exec_fencing)
+ drm_intel_gem_bo_map_gtt(bo);
+ else
+ drm_intel_bo_map(bo, write);
+}
+
+static INLINE void
+intel_bo_unmap_gtt_preferred(struct intel_context *intel,
+ drm_intel_bo *bo)
+{
+ if (intel->intelScreen->kernel_exec_fencing)
+ drm_intel_gem_bo_unmap_gtt(bo);
+ else
+ drm_intel_bo_unmap(bo);
+}
+
#endif