diff options
Diffstat (limited to 'src/mesa/drivers/dri/intel')
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_chipset.h | 14 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_context.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 26 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_layout.c | 27 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_layout.h | 2 |
6 files changed, 61 insertions, 19 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h index 4593d90df3..3c38f1676c 100644 --- a/src/mesa/drivers/dri/intel/intel_chipset.h +++ b/src/mesa/drivers/dri/intel/intel_chipset.h @@ -67,13 +67,18 @@ #define PCI_CHIP_G45_G 0x2E22 #define PCI_CHIP_G41_G 0x2E32 +#define PCI_CHIP_ILD_G 0x0042 +#define PCI_CHIP_ILM_G 0x0046 + #define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \ devid == PCI_CHIP_I915_GM || \ devid == PCI_CHIP_I945_GM || \ devid == PCI_CHIP_I945_GME || \ devid == PCI_CHIP_I965_GM || \ devid == PCI_CHIP_I965_GME || \ - devid == PCI_CHIP_GM45_GM || IS_IGD(devid)) + devid == PCI_CHIP_GM45_GM || \ + IS_IGD(devid) || \ + devid == PCI_CHIP_ILM_G) #define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \ devid == PCI_CHIP_Q45_G || \ @@ -82,6 +87,10 @@ #define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM) #define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid)) +#define IS_ILD(devid) (devid == PCI_CHIP_ILD_G) +#define IS_ILM(devid) (devid == PCI_CHIP_ILM_G) +#define IS_IGDNG(devid) (IS_ILD(devid) || IS_ILM(devid)) + #define IS_915(devid) (devid == PCI_CHIP_I915_G || \ devid == PCI_CHIP_E7221_G || \ devid == PCI_CHIP_I915_GM) @@ -99,7 +108,8 @@ devid == PCI_CHIP_I965_GM || \ devid == PCI_CHIP_I965_GME || \ devid == PCI_CHIP_I946_GZ || \ - IS_G4X(devid)) + IS_G4X(devid) || \ + IS_IGDNG(devid)) #define IS_9XX(devid) (IS_915(devid) || \ IS_945(devid) || \ diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index ce9b118134..123e63f655 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -161,6 +161,12 @@ intelGetString(GLcontext * ctx, GLenum name) case PCI_CHIP_G41_G: chipset = "Intel(R) G41"; break; + case PCI_CHIP_ILD_G: + chipset = "Intel(R) IGDNG_D"; + break; + case PCI_CHIP_ILM_G: + chipset = "Intel(R) IGDNG_M"; + break; default: chipset = "Unknown Intel Chipset"; break; diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index 311fe01f29..c985da5aa2 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -353,23 +353,31 @@ intel_miptree_set_level_info(struct intel_mipmap_tree *mt, } - void -intel_miptree_set_image_offset(struct intel_mipmap_tree *mt, - GLuint level, GLuint img, - GLuint x, GLuint y) +intel_miptree_set_image_offset_ex(struct intel_mipmap_tree *mt, + GLuint level, GLuint img, + GLuint x, GLuint y, + GLuint offset) { if (img == 0 && level == 0) assert(x == 0 && y == 0); assert(img < mt->level[level].nr_images); - mt->level[level].image_offset[img] = (x + y * mt->pitch) * mt->cpp; + mt->level[level].image_offset[img] = (x + y * mt->pitch) * mt->cpp + offset; DBG("%s level %d img %d pos %d,%d image_offset %x\n", __FUNCTION__, level, img, x, y, mt->level[level].image_offset[img]); } +void +intel_miptree_set_image_offset(struct intel_mipmap_tree *mt, + GLuint level, GLuint img, + GLuint x, GLuint y) +{ + intel_miptree_set_image_offset_ex(mt, level, img, x, y, 0); +} + /* Although we use the image_offset[] array to store relative offsets * to cube faces, Mesa doesn't know anything about this and expects @@ -483,7 +491,7 @@ intel_miptree_image_data(struct intel_context *intel, } } -extern GLuint intel_compressed_alignment(GLenum); +extern void intel_get_texture_alignment_unit(GLenum, GLuint *, GLuint *); /* Copy mipmap image between trees */ void @@ -503,9 +511,11 @@ intel_miptree_image_copy(struct intel_context *intel, GLboolean success; if (dst->compressed) { - GLuint alignment = intel_compressed_alignment(dst->internal_format); + GLuint align_w, align_h; + + intel_get_texture_alignment_unit(dst->internal_format, &align_w, &align_h); height = (height + 3) / 4; - width = ((width + alignment - 1) & ~(alignment - 1)); + width = ALIGN(width, align_w); } for (i = 0; i < depth; i++) { diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h index 2a809cfda5..c890b2a0d0 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h @@ -196,6 +196,11 @@ void intel_miptree_set_level_info(struct intel_mipmap_tree *mt, GLuint x, GLuint y, GLuint w, GLuint h, GLuint d); +void intel_miptree_set_image_offset_ex(struct intel_mipmap_tree *mt, + GLuint level, + GLuint img, GLuint x, GLuint y, + GLuint offset); + void intel_miptree_set_image_offset(struct intel_mipmap_tree *mt, GLuint level, GLuint img, GLuint x, GLuint y); diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c index 2c1b722b7f..7d69ea4484 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_layout.c +++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c @@ -35,28 +35,39 @@ #include "intel_context.h" #include "main/macros.h" -GLuint intel_compressed_alignment(GLenum internalFormat) +void intel_get_texture_alignment_unit(GLenum internalFormat, GLuint *w, GLuint *h) { - GLuint alignment = 4; - switch (internalFormat) { case GL_COMPRESSED_RGB_FXT1_3DFX: case GL_COMPRESSED_RGBA_FXT1_3DFX: - alignment = 8; + *w = 8; + *h = 4; + break; + + case GL_RGB_S3TC: + case GL_RGB4_S3TC: + case GL_COMPRESSED_RGB_S3TC_DXT1_EXT: + case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT: + case GL_RGBA_S3TC: + case GL_RGBA4_S3TC: + case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT: + case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT: + *w = 4; + *h = 4; break; default: + *w = 4; + *h = 2; break; } - - return alignment; } void i945_miptree_layout_2d( struct intel_context *intel, struct intel_mipmap_tree *mt, uint32_t tiling ) { - GLint align_h = 2, align_w = 4; + GLuint align_h = 2, align_w = 4; GLuint level; GLuint x = 0; GLuint y = 0; @@ -64,9 +75,9 @@ void i945_miptree_layout_2d( struct intel_context *intel, GLuint height = mt->height0; mt->pitch = mt->width0; + intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h); if (mt->compressed) { - align_w = intel_compressed_alignment(mt->internal_format); mt->pitch = ALIGN(mt->width0, align_w); } diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.h b/src/mesa/drivers/dri/intel/intel_tex_layout.h index 7bc25b6bcb..c9de9b5678 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_layout.h +++ b/src/mesa/drivers/dri/intel/intel_tex_layout.h @@ -41,4 +41,4 @@ static GLuint minify( GLuint d ) extern void i945_miptree_layout_2d(struct intel_context *intel, struct intel_mipmap_tree *mt, uint32_t tiling); -extern GLuint intel_compressed_alignment(GLenum); +extern void intel_get_texture_alignment_unit(GLenum, GLuint *, GLuint *); |