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Diffstat (limited to 'src/mesa/drivers/dri/radeon/radeon_bo_legacy.c')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_bo_legacy.c116
1 files changed, 61 insertions, 55 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
index 992eb4611b..5575da6971 100644
--- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
@@ -69,9 +69,6 @@ struct bo_legacy {
void *ptr;
struct bo_legacy *next, *prev;
struct bo_legacy *pnext, *pprev;
-#ifdef RADEON_DEBUG_BO
- char szBufUsage[16];
-#endif /* RADEON_DEBUG_BO */
};
struct bo_manager_legacy {
@@ -289,12 +286,7 @@ static struct bo_legacy *bo_allocate(struct bo_manager_legacy *boml,
uint32_t size,
uint32_t alignment,
uint32_t domains,
-#ifdef RADEON_DEBUG_BO
- uint32_t flags,
- char * szBufUsage)
-#else
uint32_t flags)
-#endif /* RADEON_DEBUG_BO */
{
struct bo_legacy *bo_legacy;
static int pgsize;
@@ -327,10 +319,6 @@ static struct bo_legacy *bo_allocate(struct bo_manager_legacy *boml,
bo_legacy->next->prev = bo_legacy;
}
-#ifdef RADEON_DEBUG_BO
- sprintf(bo_legacy->szBufUsage, "%s", szBufUsage);
-#endif /* RADEON_DEBUG_BO */
-
return bo_legacy;
}
@@ -429,12 +417,7 @@ static struct radeon_bo *bo_open(struct radeon_bo_manager *bom,
uint32_t size,
uint32_t alignment,
uint32_t domains,
-#ifdef RADEON_DEBUG_BO
- uint32_t flags,
- char * szBufUsage)
-#else
uint32_t flags)
-#endif /* RADEON_DEBUG_BO */
{
struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bom;
struct bo_legacy *bo_legacy;
@@ -451,11 +434,7 @@ static struct radeon_bo *bo_open(struct radeon_bo_manager *bom,
}
return NULL;
}
-#ifdef RADEON_DEBUG_BO
- bo_legacy = bo_allocate(boml, size, alignment, domains, flags, szBufUsage);
-#else
bo_legacy = bo_allocate(boml, size, alignment, domains, flags);
-#endif /* RADEON_DEBUG_BO */
bo_legacy->static_bo = 0;
r = legacy_new_handle(boml, &bo_legacy->base.handle);
if (r) {
@@ -577,6 +556,8 @@ static struct radeon_bo_funcs bo_legacy_funcs = {
bo_unmap,
NULL,
bo_is_static,
+ NULL,
+ NULL,
};
static int bo_vram_validate(struct radeon_bo *bo,
@@ -622,12 +603,34 @@ static int bo_vram_validate(struct radeon_bo *bo,
if (bo_legacy->dirty || bo_legacy->tobj->base.dirty_images[0]) {
if (IS_R600_CLASS(boml->screen)) {
- char *src = bo_legacy->ptr;
- char *dst = (char *) boml->screen->driScreen->pFB +
- (bo_legacy->offset - boml->fb_location);
+ drm_radeon_texture_t tex;
+ drm_radeon_tex_image_t tmp;
+ int ret;
- /* FIXME: alignment, pitch, etc. */
- memcpy(dst, src, bo->size);
+ tex.offset = bo_legacy->offset;
+ tex.image = &tmp;
+ assert(!(tex.offset & 1023));
+
+ tmp.x = 0;
+ tmp.y = 0;
+ tmp.width = bo->size;
+ tmp.height = 1;
+ tmp.data = bo_legacy->ptr;
+ tex.format = RADEON_TXFORMAT_ARGB8888;
+ tex.width = tmp.width;
+ tex.height = tmp.height;
+ tex.pitch = bo->size;
+ do {
+ ret = drmCommandWriteRead(bo->bom->fd,
+ DRM_RADEON_TEXTURE,
+ &tex,
+ sizeof(drm_radeon_texture_t));
+ if (ret) {
+ if (RADEON_DEBUG & DEBUG_IOCTL)
+ fprintf(stderr, "DRM_RADEON_TEXTURE: again!\n");
+ usleep(1);
+ }
+ } while (ret == -EAGAIN);
} else {
/* Copy to VRAM using a blit.
* All memory is 4K aligned. We're using 1024 pixels wide blits.
@@ -689,14 +692,8 @@ int radeon_bo_legacy_validate(struct radeon_bo *bo,
int retries = 0;
if (bo_legacy->map_count) {
-#ifdef RADEON_DEBUG_BO
- fprintf(stderr, "bo(%p, %d, %s) is mapped (%d) can't valide it.\n",
- bo, bo->size, bo_legacy->szBufUsage, bo_legacy->map_count);
-#else
fprintf(stderr, "bo(%p, %d) is mapped (%d) can't valide it.\n",
bo, bo->size, bo_legacy->map_count);
-#endif /* RADEON_DEBUG_BO */
-
return -EINVAL;
}
if (bo_legacy->static_bo || bo_legacy->validated) {
@@ -768,21 +765,13 @@ void radeon_bo_manager_legacy_dtor(struct radeon_bo_manager *bom)
}
static struct bo_legacy *radeon_legacy_bo_alloc_static(struct bo_manager_legacy *bom,
- int size,
-#ifdef RADEON_DEBUG_BO
- uint32_t offset,
- char * szBufUsage)
-#else
- uint32_t offset)
-#endif /* RADEON_DEBUG_BO */
+ int size,
+ uint32_t offset)
{
struct bo_legacy *bo;
-#ifdef RADEON_DEBUG_BO
- bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0, szBufUsage);
-#else
bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0);
-#endif /* RADEON_DEBUG_BO */
+
if (bo == NULL)
return NULL;
bo->static_bo = 1;
@@ -843,11 +832,8 @@ struct radeon_bo_manager *radeon_bo_manager_legacy_ctor(struct radeon_screen *sc
size = 4096*4096*4;
/* allocate front */
-#ifdef RADEON_DEBUG_BO
- bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->frontOffset, "FRONT BUF");
-#else
bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->frontOffset);
-#endif /* RADEON_DEBUG_BO */
+
if (!bo) {
radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom);
return NULL;
@@ -857,11 +843,8 @@ struct radeon_bo_manager *radeon_bo_manager_legacy_ctor(struct radeon_screen *sc
}
/* allocate back */
-#ifdef RADEON_DEBUG_BO
- bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->backOffset, "BACK BUF");
-#else
bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->backOffset);
-#endif /* RADEON_DEBUG_BO */
+
if (!bo) {
radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom);
return NULL;
@@ -871,11 +854,8 @@ struct radeon_bo_manager *radeon_bo_manager_legacy_ctor(struct radeon_screen *sc
}
/* allocate depth */
-#ifdef RADEON_DEBUG_BO
- bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->depthOffset, "Z BUF");
-#else
bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->depthOffset);
-#endif /* RADEON_DEBUG_BO */
+
if (!bo) {
radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom);
return NULL;
@@ -904,3 +884,29 @@ unsigned radeon_bo_legacy_relocs_size(struct radeon_bo *bo)
return bo->size;
}
+/*
+ * Fake up a bo for things like texture image_override.
+ * bo->offset already includes fb_location
+ */
+struct radeon_bo *radeon_legacy_bo_alloc_fake(struct radeon_bo_manager *bom,
+ int size,
+ uint32_t offset)
+{
+ struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bom;
+ struct bo_legacy *bo;
+
+ bo = bo_allocate(boml, size, 0, RADEON_GEM_DOMAIN_VRAM, 0);
+
+ if (bo == NULL)
+ return NULL;
+ bo->static_bo = 1;
+ bo->offset = offset;
+ bo->base.handle = bo->offset;
+ bo->ptr = boml->screen->driScreen->pFB + (offset - boml->fb_location);
+ if (bo->base.handle > boml->nhandle) {
+ boml->nhandle = bo->base.handle + 1;
+ }
+ radeon_bo_ref(&(bo->base));
+ return &(bo->base);
+}
+
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-16 05:15:34 +0000