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-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c19
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_validate.c5
2 files changed, 16 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index ae42b102db..d1b0dcdf31 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -307,10 +307,21 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
}
- state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(tObj->_BorderChan[0],
- tObj->_BorderChan[1],
- tObj->_BorderChan[2],
- tObj->_BorderChan[3]);
+ if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) {
+ /* GL specs that border color for depth textures is taken from the
+ * R channel, while the hardware uses A. Spam R into all the channels
+ * for safety.
+ */
+ state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(tObj->_BorderChan[0],
+ tObj->_BorderChan[0],
+ tObj->_BorderChan[0],
+ tObj->_BorderChan[0]);
+ } else {
+ state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(tObj->_BorderChan[0],
+ tObj->_BorderChan[1],
+ tObj->_BorderChan[2],
+ tObj->_BorderChan[3]);
+ }
I915_ACTIVESTATE(i915, I915_UPLOAD_TEX(unit), GL_TRUE);
diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c
index 3dae738ac2..820683d42e 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c
@@ -141,10 +141,7 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit)
/* Fallback case:
*/
- if (firstImage->base.Border ||
- ((firstImage->base._BaseFormat == GL_DEPTH_COMPONENT) &&
- ((tObj->WrapS == GL_CLAMP_TO_BORDER) ||
- (tObj->WrapT == GL_CLAMP_TO_BORDER)))) {
+ if (firstImage->base.Border) {
if (intelObj->mt) {
intel_miptree_release(intel, &intelObj->mt);
}