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-rw-r--r--src/mesa/pipe/i915simple/i915_flush.c6
-rw-r--r--src/mesa/pipe/p_defines.h3
2 files changed, 7 insertions, 2 deletions
diff --git a/src/mesa/pipe/i915simple/i915_flush.c b/src/mesa/pipe/i915simple/i915_flush.c
index 9c2adf8763..5a80ed5e2f 100644
--- a/src/mesa/pipe/i915simple/i915_flush.c
+++ b/src/mesa/pipe/i915simple/i915_flush.c
@@ -47,7 +47,7 @@ static void i915_flush( struct pipe_context *pipe,
/* Do we need to emit an MI_FLUSH command to flush the hardware
* caches?
*/
- if (flags) {
+ if (flags & (PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_TEXTURE_CACHE)) {
unsigned flush = MI_FLUSH;
if (!(flags & PIPE_FLUSH_RENDER_CACHE))
@@ -67,6 +67,10 @@ static void i915_flush( struct pipe_context *pipe,
/* If there are no flags, just flush pending commands to hardware:
*/
FLUSH_BATCH();
+
+ if (flags & PIPE_FLUSH_WAIT) {
+ i915->pipe.winsys->wait_idle(i915->pipe.winsys, i915->pipe.private);
+ }
}
diff --git a/src/mesa/pipe/p_defines.h b/src/mesa/pipe/p_defines.h
index ca9929bfee..6b5881b64d 100644
--- a/src/mesa/pipe/p_defines.h
+++ b/src/mesa/pipe/p_defines.h
@@ -187,8 +187,9 @@
/**
* Flush types:
*/
-#define PIPE_FLUSH_RENDER_CACHE 0x1
+#define PIPE_FLUSH_RENDER_CACHE 0x1
#define PIPE_FLUSH_TEXTURE_CACHE 0x2
+#define PIPE_FLUSH_WAIT 0x4
/**