Age | Commit message (Collapse) | Author |
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since we plan on using dx10 constant buffers everywhere.
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Add bo offset everywhere needed if r600_bo is ever a sub bo
of a bigger bo.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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there are some vertex formats defined in r600c not in the docs.
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These need to be emitted, we also need them to do proper vtx start,
instead of abusing index offset.
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although evergreen can apparantly sample direct from 24-bit,
just make it work with the current method for now.
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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mainly remove 2 suffix from function names
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Lot of clean can now happen.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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This reverts commit 914b669b082258fc05d0fec047b69949d88585c4.
I didn't mean to commit this yet, will redo in new state system once
we clean it up.
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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So texture code can be shared btw new state design
& old one.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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we were leaking buffers since the flush code was added, it wasn't dropping references.
move setting up flush to the set_framebuffer_state.
clean up the flush state object.
make more space in the BOs array for flushing.
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this add support for the upload manager for uploading user vbo/index buffers.
this provides a considerable speedup in q3 type games.
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introduce an abstraction layer between kernel bos and the winsys BOs.
this is to allow plugging in pb manager with minimal disruption to pipe driver.
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adds shader opcodes + assembler support (except ARL)
uses constant buffers
add interp instructions in fragment shader
adds all evergreen hw states
adds evergreen pm4 support.
this runs gears for me on my evergreen
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the DDX and r600c both flush cb/db after the draw is emitted,
as long as they do that, r600g can't be different, as it races.
We end up with r600g flush, set CB, DDX set CB, flush. This
was causing misrendering on my evergreen, where sometimes the drawing
would go to an old CB.
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DX9 constants were in the constant file, and evergreen no longer support
cfile. r600/700 can also use constants in memory buffers, so add the code
(disabled for now) to enable that as precursor for evergreen.
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this is step one towards evergreen support, it lets us plug in whole
new hw level states.
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We end up referencing the new surf and derefing the old surface which
is a copy of the pointer to the new surf. So just bump the ref count directly.
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Need to remove from context as well.
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probably can improve this a bit.
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I will not cut-n-paste.
I will not cut-n-paste.
I will not cut-n-paste.
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Okay I finally wrapped my head around what r600_context_state is meant to be,
maybe I should just rename all the structs so that have distinct names.
I've no idea however why 16 is a good magic number for R600_MAX_RSTATE.
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This was another ugly function that really wasn't needed.
The 3 calls to it from the gallium api were shorter than it,
and all the calls from the set_ functions were pointless.
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having some sort of locality of code really matters, just create
and setup state at time. Not sure if this is just further polishing of a bad thing,
but at least it makes it more readable.
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this gets them out of sight of the main codeflow.
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this also fixes occulsion queries.
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Previously bind sampler/sampler_view can be converted and endup
overwritting the current state we want to schedule. Example :
bind texA texB to sampler_view[0] & sampler_view[1], render,
bind texB to sampler_view[0] render. Now state associated to
texB are set to configure sampler_view slot 0, but as we don't
unbind sampler_view[1] still point to texB state so we end up
with sampler_view[1] overwritting sampler_view[0], which gives
wrong rendering if next rendering bind texA to sampler_view[0],
it will endup as texB is bound to sampler_view[0]. If you are
not confuse at that point give me a call i will be buying you
beer.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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One can bind same texture or sampler to different slot,
each slot needs it own state. The solution implemented
here is not exactly beautifull or optimal need to think
to somethings better.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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fixes problems in valgrind with uninitialised values.
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Make state statically allocated, this kills a bunch of code
and avoid intensive use of malloc/free. There is still a lot
of useless duplicate function wrapping that can be kill. This
doesn't improve yet performance, needs to avoid memcpy states
in radeon_ctx_set_draw and to avoid rebuilding vs_resources,
dsa, scissor, cb_cntl, ... states at each draw command.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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This reverts commit 1fa7245c348cb7aced81f1672140f64cb6450e2f.
Conflicts:
src/gallium/drivers/r600/r600_state.c
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This fixes fbo-3d and fbo-cubemap
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This reverts commit de0b76cab22caa9fc7260f80acb8f151ccced6c5, its pre-computes the texture state wrong,
you can't just use an array of levels, since you can have FBOs to depth texture slices inside a level as well
it would get really messy quickly. Probably need to split commits like this up into pieces for each piece
of state, so we can revert bits easier in case of regressions.
This also break 5 piglit tests, and valgrind starts to warn about invalid read/writes after this.
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Idea is to build hw state at pipe state creation and
reuse them while keeping a non PM4 packet interface
btw winsys & pipe driver. This commit also force rebuild
of pm4 packet on each call to radeon_state_pm4 which
in turn slow down everythings, this will be addressed.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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The current states code had an unhealthy relationship between
that had to somehow magically align themselves, editing either
place meant renumbering all states after the one you were on,
and it was pretty unapproachable code.
This replaces the huge types structures with a simple type + sub
type struct, which is keyed on an stype enum in radeon.h. Each
stype can have a per-shader type subclassing (4 types supported,
PS/VS/GS/FS), and also has a number of states per-subtype. So you
have 256 constants per 4 shaders per one CONSTANT stype.
The interface from the driver is changed to pass in the tuple,
(stype, id, shader_type), and we look for this. If
radeon_state_shader ever shows up on profile, it could use a
hashtable based on stype/shader_type to speed things up.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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passes glsl1-discard tests
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