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path: root/src/mesa/drivers/dri/i965/brw_defines.h
AgeCommit message (Expand)Author
2010-10-28i965: Add user clip planes support to gen6.Eric Anholt
2010-10-26i965: Use SENDC on the first render target write on gen6.Eric Anholt
2010-10-06i965: Add some clarification of the WECtrl field.Eric Anholt
2010-09-28i965: force zero in clipper to ignore RTAIndex on sandybridgeZhenyu Wang
2010-08-30i965: Add support for texturing with bias to i965 FS backend.Eric Anholt
2010-07-26i965: Clean up a few magic numbers to use brw_defines.h defs.Eric Anholt
2010-07-21i965: Fix the DP read msg_control definitions other than plain OWORD.Eric Anholt
2010-07-08i965: Add definitions for Sandybridge DP write/read messages.Zhenyu Wang
2010-06-14i965: correct the gen6 line stipple enable define.Zhenyu Wang
2010-05-18 gen6 fix: fix a wrong bit in binding_table_pointerZou Nan hai
2010-04-21intel: Clean up chipset name and gen num for IronlakeZhenyu Wang
2010-03-22i965: Correct copy and wasted field shifts for SNB GS URB.Eric Anholt
2010-03-10i965: Use the PLN instruction when possible in interpolation.Eric Anholt
2010-02-25i965: Fix the SNB VE valid bit.Eric Anholt
2010-02-25i965: Fix the SNB clip near VP API bit.Eric Anholt
2010-02-25i965: Add SNB math opcode support.Eric Anholt
2010-02-25i965: Set up the SNB sampler state pointers.Eric Anholt
2010-02-25i965: Add a couple SNB state packets I saw in other batchbuffer dumps.Eric Anholt
2010-02-25i965: Re-disable the VS.Eric Anholt
2010-02-25i965: Untested Sandybridge WM packets.Eric Anholt
2010-02-25i965: Untested Sandybridge SF setup.Eric Anholt
2010-02-25i965: Fix up Sandybridge GS reg definitionsEric Anholt
2010-02-25i965: fix typo in SNB VS defines commentEric Anholt
2010-02-25i965: fix typo in SNB GS register definesEric Anholt
2010-02-25i965: Add Sandybridge viewport setup.Eric Anholt
2010-02-25i965: Add Sandybridge scissor state.Eric Anholt
2010-02-25i965: Fix some defines of gen6 regs from docs comparison.Eric Anholt
2010-02-25i965: Reconnect the index/vertex setup.Eric Anholt
2010-02-25i965: Set up the SNB URB.Eric Anholt
2010-02-25i965: Add untested REJECT_ALL clip state.Eric Anholt
2010-02-25i965: Add untested passthrough GS setup.Eric Anholt
2010-02-25i965: Add untested Sandybridge passthrough VS setup.Eric Anholt
2010-02-25i965: Start adding support for the Sandybridge CC unit.Eric Anholt
2010-02-25i965: Set up sandybridge binding table pointers but don't enable it yet.Eric Anholt
2009-12-22intel: Replace IS_965 checks with context structure usage.Eric Anholt
2009-12-22intel: Replace IS_G4X() across the driver with context structure usage.Eric Anholt
2009-11-13i965: Clean up Ironlake sampler type definitions.Eric Anholt
2009-08-04i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt
2009-07-13i965: add support for new chipsetsXiang, Haihao
2009-03-28i965: srgb texture fixesRoland Scheidegger
2009-03-24i965: fix point rasterization when rendering to FBORobert Ellison
2009-02-25i965: Rename CMD_CONST_BUFFER_STATE to the CS_URB_STATE used in the docs.Eric Anholt
2008-11-02i965: Merge GM45 into the G4X chipset define.Eric Anholt
2008-08-24Revert "Revert "Merge branch 'drm-gem'""Dave Airlie
2008-08-24Revert "Merge branch 'drm-gem'"Dave Airlie
2008-07-25Merge branch 'master' into drm-gemIan Romanick
2008-07-08i965: official name for GM45 chipsetXiang, Haihao
2008-06-26intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.Eric Anholt
2008-05-23Emit a flush after the swapbuffers blit, so contents end up on the screen.Eric Anholt
2008-02-04[965] Replace VEP/VBP state structures with inline batch emits.Eric Anholt
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