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path: root/src/mesa/drivers/dri/i965/brw_misc_state.c
AgeCommit message (Expand)Author
2008-04-18i965: fixup depth buffer checkDave Airlie
2008-04-18i965: initial attempt at fixing the aperture overflowDave Airlie
2008-02-22Merge {i915,i965}/intel_context.h as intel/intel_context.hKristian Høgsberg
2008-02-07[965] Flush icache on new batch, not just new context.Eric Anholt
2008-01-29i965: new integrated graphics chipset supportXiang, Haihao
2008-01-10[intel] Add more cliprect modes to cover other meanings for batch emits.Eric Anholt
2008-01-09[965] Replace the always_update dirty flag with BRW_NEW_BATCH.Eric Anholt
2008-01-09[965] Remove drawing rect upload, which is handled (better) by the kernel.Eric Anholt
2007-12-20[965] Enable EXT_framebuffer_object.Eric Anholt
2007-12-17[965] Allow draw or depth regions to be NULL.Eric Anholt
2007-12-14[965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt
2007-12-07[965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt
2006-12-08fix bug#9237Xiang, Haihao
2006-10-23Emit cliprects in the userspace driver as required, rather thanKeith Whitwell
2006-09-07Make sure bmBufferOffset is called for all active buffers every timeKeith Whitwell
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt
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