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path: root/src/mesa/drivers/dri/i965/brw_wm_pass1.c
AgeCommit message (Expand)Author
2010-11-03intel: Annotate debug printout checks with unlikely().Eric Anholt
2010-07-02i965: Add support for the DP2 opcode, which we use for dot(vec2, vec2).Eric Anholt
2010-06-30i965: Add support for OPCODE_SSG.Eric Anholt
2009-09-11i965: Move OPCODE_DDX/DDY to brw_wm_emit.c and make it actually work.Eric Anholt
2009-09-04i965: Add support for KIL_NV in brw_wm_emit.cEric Anholt
2009-06-02i965: Support OPCODE_TRUNC in the brw_wm_fp.c code.Eric Anholt
2009-03-23i965: Fix glFrontFacing in twoside GLSL demo.Eric Anholt
2009-02-20i965: use the new prog_instruction::TexShadow fieldBrian Paul
2009-01-22i965: whitespace changes and reformattingBrian Paul
2008-03-26[965] Correctly set read mask for OPCODE_SWZ in pass1.Michal Wajdeczko
2007-04-12 Initial 965 GLSL supportZou Nan hai
2007-02-23Update DRI drivers for new glsl compiler.Brian
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt