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BaseLevel/MaxLevel are mostly used for two things: clamping texture
access for FBO rendering, and limiting the used mipmap levels when
incrementally loading textures. By restricting our mipmap trees to
just the current BaseLevel/MaxLevel, we caused reallocation thrashing
in the common case, for a theoretical win if someone really did want
just levels 2..4 or whatever of their texture object.
Bug #30366
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This has always been ugly about our texture code -- object base/max
level vs intel object first/last level vs image level vs miptree
first/last level. We now get rid of intelObj->first_level which is
just tObj->BaseLevel, and make intelObj->_MaxLevel clearly based off
of tObj->_MaxLevel instead of duplicating its code (incorrectly, as
image->MaxLog2 only considers width/height and not depth!)
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This doesn't actually fix border color on Ironlake, but it appears to
be a requirement, and gen6 needs it too.
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Sandybridge has not much change on texture sampler with Ironlake.
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Now that the binding table is streamed indirect state, they were
always NULL/0.
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The new API makes so much more sense, I'd like to forget how the old
one worked.
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The slightly less mechanical change of converting the emit_reloc calls
will follow.
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This struct is used to generate a hash, ignoring the entry boundaries.
Signed-off-by: Eric Anholt <eric@anholt.net>
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The whole structure is 836 bytes, but if only the first one or two
samplers are used (as is common), the part that matters is only 56 or
108 bytes. By using just that subset as the key (since the key size
is also part of the key), we improve firefox-talos-gfx performance by
1%.
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Since it's a BO pointer, it already lives outside the key in
brw->wm.sdc_bo[] which is used for sampler state lookup and setup.
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This may break the SUNOS4 build, but it's no longer relevant.
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Everything has been constant-sized until now, but constant buffer
handling changes will make us want some additional variable sized
array.
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When we have integer-valued texture formats, the texture border color
must also store integer and uint values.
With GL 3.0, the new glTexParameterIiv() and glTexParameterIuiv() functions
can set the border color to int or uint values.
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This keeps the individual state files from having to export their
structures for brw_state_cache initialization.
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This gets us expected behavior for clamping between mipmap levels, and
avoids relayout of textures for doing clamping.
Fixes piglit lodclamp-between.
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With 1D textures, GL_TEXTURE_WRAP_T should be ignored (only
GL_TEXTURE_WRAP_S should be respected). But the i965 hardware
seems to follow the value of GL_TEXTURE_WRAP_T even when sampling
1D textures.
This fix forces GL_TEXTURE_WRAP_T to be GL_REPEAT whenever 1D
textures are used; this allows the texture to be sampled
correctly, avoiding "imaginary" border elements in the T direction.
This bug was demonstrated in the Piglit tex1d-2dborder test.
With this fix, that test passes.
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i915 actually supports up to 4 (according to header file - not tested),
i965 up to 16 (code already handled this but slightly broken), so don't use 2
for all chips, even though angular dependency is very high.
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This code won't actually be used and will be removed in a subsequent commit.
Just committing for posterity.
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If we're using anything but GL_NEAREST sampling of a cube map, we need to
use the BRW_TEXCOORDMODE_CUBE texcoord wrap mode. Before this, the GPU
would either lock up or subsequent texture filtering would be corrupted.
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The fallback was introduced to fix bug #16697, but made the test it was
fixing run excessively long.
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See volume 4, SAMPLER_BORDER_COLOR_STATE programming notes.
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Makefile.template
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This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
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This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
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To do this, I had to clean up some of 965 state upload stuff. We may end
up over-emitting state in the aperture overflow case, but that should be rare,
and I'd rather have the simplification of state management.
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This is an API breakage only.
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The GEM flags are much more descriptive for what we need. Since this makes
bufmgr_fake rather device-specific, move it to the intel common directory.
We've wanted to do device-specific stuff to it before.
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Makes state emission into a 2 phase, prepare sets things up and accounts
the size of all referenced buffer objects. The emit stage then actually
does the batchbuffer touching for emitting the objects.
There is an assert in dri_emit_reloc if a reloc occurs for a buffer
that hasn't been accounted yet.
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We have two consumers of relocations. One is static state buffers, which
want the same relocation every time. The other is the batchbuffer, which gets
thrown out immediately after submit. This lets us reduce repeated computation
for static state buffers, and clean up the code by moving relocations nearer
to where the state buffer is computed.
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The user-space suballocator that was used avoided relocation computations by
using the general and surface state base registers and allocating those types
of buffers out of pools built on top of single buffer objects. It also
avoided calls into the buffer manager for these small state allocations, since
only one buffer object was being used.
However, the buffer allocation cost appears to be low, and with relocation
caching, computing relocations for buffers is essentially free. Additionally,
implementing the suballocator required a don't-fence-subdata flag to disable
waiting on buffer maps so that writing new data didn't block on rendering using
old data, and careful handling when mapping to update old data (which we need
to do for unavoidable relocations with FBOs). More importantly, when the
suballocator filled, it had no replacement algorithm and just threw out all
of the contents and forced them to be recomputed, which is a significant cost.
This is the first step, which just changes the buffer type, but doesn't yet
improve the hash table to not result in full recompute on overflow. Because
the buffers are all allocated out of the general buffer allocator, we can
no longer use the general/surface state bases to avoid relocations, and they
are set to 0 instead.
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internal function to match the EXT_shadow_funs
spec. fix bug#11925
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to implement GL_CLAMP
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This driver comes from Tungsten Graphics, with a few further modifications by
Intel.
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