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path: root/src/mesa/drivers/dri/i965
AgeCommit message (Expand)Author
2009-10-12i965: remove unused varBrian Paul
2009-10-08i965: Use bo_references for the state cache delete function.Eric Anholt
2009-10-02i965: Use a little stack space to avoid a malloc in wm_get_binding_table.Eric Anholt
2009-10-01Merge branch 'mesa_7_6_branch'Brian Paul
2009-09-30i965: Fix massive memory allocation for streaming texture usage.Eric Anholt
2009-09-28intel: Drop my generatemipmap code in favor of the new shared code.Eric Anholt
2009-09-28intel: Remove some dead metaops code.Eric Anholt
2009-09-25Merge branch 'mesa_7_6_branch'Brian Paul
2009-09-24i965: Clean up some mess with the batch cache.Eric Anholt
2009-09-24Merge branch 'mesa_7_6_branch'Brian Paul
2009-09-24i965: Emit zero initialization for NV VP temporaries as required.Eric Anholt
2009-09-24i965: Remove assert about NV_vp now that it somewhat works.Eric Anholt
2009-09-24i965: Load NV program matrices when required.Eric Anholt
2009-09-11i965: Move OPCODE_DDX/DDY to brw_wm_emit.c and make it actually work.Eric Anholt
2009-09-10i965: Enable loops in the VS.Eric Anholt
2009-09-10i965: Fix relocation delta for WM surfaces.Eric Anholt
2009-09-09i965: Fix relocation delta for WM surfaces.Eric Anholt
2009-09-09Merge branch 'mesa_7_6_branch'Brian Paul
2009-09-09Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul
2009-09-08intel: Add support for ARB_draw_elements_base_vertex.Eric Anholt
2009-09-08i965: Add support for ARB_depth_clamp.Eric Anholt
2009-09-08i965: Respect spec requirement for pixel shader computed depth with no zbuffer.Eric Anholt
2009-09-08i965: Set NULL WM surfaces as tiled according to requirement by specs.Eric Anholt
2009-09-08i965: Use the renderbuffer surface size instead of region size for WM surfaces.Eric Anholt
2009-09-08i965: #include clean-upsBrian Paul
2009-09-08i965: use _mesa_is_bufferobj()Brian Paul
2009-09-08i965: fix incorrect test for vertex position attributeBrian Paul
2009-09-04intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt
2009-09-04intel: Update Mesa state before span setup in glReadPixels.Eric Anholt
2009-09-04i965: Don't set the complete field when there is more VUE yet to come.Eric Anholt
2009-09-04i965: Add support for 2 threads in the GS.Eric Anholt
2009-09-04i965: Add support for KIL_NV in brw_wm_emit.cEric Anholt
2009-09-04i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt
2009-09-04intel: Align cubemap texture height to its padding requirements.Eric Anholt
2009-09-04i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt
2009-09-04i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt
2009-09-04i965: asst clean-ups, etc in brw_vs_emit()Brian Paul
2009-09-04i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt
2009-09-04i965: Spell "conditional" correctly.Eric Anholt
2009-09-04i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt
2009-09-04i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt
2009-09-04i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt
2009-09-04i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt
2009-09-04i965: Don't emit bad packets when no VBs are referenced.Eric Anholt
2009-09-04i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt
2009-09-04i965: Set the max index buffer address correctly according to the docs.Eric Anholt
2009-09-04i965: rename var: s/tmp/vs_inputs/Brian Paul
2009-09-03intel: Add support for ARB_sync.Eric Anholt
2009-09-02Revert "i965: Use VBOs in the VBO module on 965, now that we have ARB_map_buf...Eric Anholt
2009-09-02i965: CS FENCE in URB_FENCE is 11-bits wideXiang, Haihao
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