summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i965
AgeCommit message (Expand)Author
2011-03-09i965: Pack the tracked state atoms into separate arrays for prepare/emit.Chris Wilson
2011-03-04i965: Apply a workaround for the Ironlake "vertex flashing".Eric Anholt
2011-03-04i965: Fix extending VB packetsChris Wilson
2011-03-04i965: Handle URB_FENCE erratum for BroadwaterChris Wilson
2011-03-04i965: Align index to type size and flush if the type changesChris Wilson
2011-03-04i965: Prevent using a zero sized (or of unknown type) vertex arrayChris Wilson
2011-03-03i965: SNB GT1 has only 32k urb and max 128 urb entries.Zou Nan hai
2011-03-02i965: Maxinum the usage of urb space on SNB.Zou Nan hai
2011-03-01i965: Use negative relocation deltas to minimse vertex uploadsChris Wilson
2011-03-01i965: Undo 'continuation of vb packets'Chris Wilson
2011-03-01i965: Fix uploading of shortened vertex packetsChris Wilson
2011-03-01i965: Upload all vertices usedChris Wilson
2011-03-01Revert "i965/fs: Correctly set up gl_FragCoord.w on Sandybridge."Kenneth Graunke
2011-03-01i965: bump VS thread number to 60 on SNBZou Nan hai
2011-02-25i965/fs: Initial plumbing to support TXD.Kenneth Graunke
2011-02-25i965/fs: Complete TXL support on gen5+.Kenneth Graunke
2011-02-25i965/fs: Complete TXL support on gen4.Kenneth Graunke
2011-02-25i965/fs: Use a properly named constant in TXB handling.Kenneth Graunke
2011-02-25i965: Add #defines for gen4 SIMD8 TXB/TXL with shadow comparison.Kenneth Graunke
2011-02-24i965: Increase Sandybridge point size clamp in the clip state.Kenneth Graunke
2011-02-24i965: Remember to pack the constant blend color as floats into the batchChris Wilson
2011-02-24intel: Reset the buffer offset after releasing reference to packed uploadChris Wilson
2011-02-24i965: Unmap the correct pointer after discontiguous uploadChris Wilson
2011-02-22i965: Increase Sandybridge point size clamp.Kenneth Graunke
2011-02-22i965/fs: Correctly set up gl_FragCoord.w on Sandybridge.Kenneth Graunke
2011-02-22i965/fs: Refactor control flow stack handling.Kenneth Graunke
2011-02-22i965/fs: Avoid register coalescing away gen6 MATH workarounds.Kenneth Graunke
2011-02-22i965/fs: Apply source modifier workarounds to POW as well.Kenneth Graunke
2011-02-22i965: Fix shaders that write to gl_PointSize on Sandybridge.Kenneth Graunke
2011-02-22i965: Trim the interleaved upload to the minimum number of verticesChris Wilson
2011-02-22i965: Reinstate max-index paranoiaChris Wilson
2011-02-22i965: Zero the offset into the vbo when uploading non-interleavedChris Wilson
2011-02-21i965: Fix VB packet reuse when offset for the new buffer isn't stride aligned.Eric Anholt
2011-02-21i965: Remove spurious duplicate ADVANCE_BATCHChris Wilson
2011-02-21i965: Use compiler builtins when availableChris Wilson
2011-02-21i965: Micro-optimise check_stateChris Wilson
2011-02-21i965: Remove unused 'next_free_page' memberChris Wilson
2011-02-21intel: extend current vertex buffersChris Wilson
2011-02-21intel: Use specified alignment for writes into the upload bufferChris Wilson
2011-02-21i965: Clean up brw_prepare_vertices()Chris Wilson
2011-02-21intel: combine short memcpy using a temporary allocated bufferChris Wilson
2011-02-21i965: upload normal arrays as interleavedChris Wilson
2011-02-21i965: interleaved vboChris Wilson
2011-02-21i965: emit one vb packet per vboChris Wilson
2011-02-21i965: upload transient indices into the same discontiguous bufferChris Wilson
2011-02-21i965: suppress repeat-emission of identical vertex elementsChris Wilson
2011-02-21i965: Move repeat-instruction-suppression to batchbuffer coreChris Wilson
2011-02-21intel: use pwrite for batchChris Wilson
2011-02-21i965: drop state_bo references to batch_boChris Wilson
2011-02-21i965: directly write wm state to batchChris Wilson