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android-x86-mesa.git
envsa_r300
froyo-x86
r300
Androïd/x86 port of Mesa drivers
Hugues Hiegel
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intel
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intel_reg.h
Age
Commit message (
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Author
2010-12-23
i965: Use MI_FLUSH_DW for blt ring flush on sandybridge
Zhenyu Wang
2010-09-28
i965: sandybridge pipe control workaround before write cache flush
Zhenyu Wang
2010-06-10
i965: Add support for GL_ALPHA framebuffer objects.
Eric Anholt
2010-03-18
intel: Correct value of S0_VB_OFFSET_MASK to match hardware docs.
Ian Romanick
2009-06-04
i915: Don't rely on fence regs when we don't have to.
Eric Anholt
2008-12-02
intel: restore old vertex submit paths for i8xx hardware.
Dave Airlie
2008-11-20
intel: fix i830 comment + backwards VB offsets.
airlied
2008-11-20
intel: fix i8xx vbo enable bit
airlied
2008-10-28
intel: Don't keep intel->pClipRects, and instead just calculate it when needed.
Eric Anholt
2008-10-07
i965: Add ARB_occlusion_query support.
Eric Anholt
2008-08-24
Revert "Revert "Merge branch 'drm-gem'""
Dave Airlie
2008-08-24
Revert "Merge branch 'drm-gem'"
Dave Airlie
2008-06-23
i915: Convert to using VBs instead of inline prims.
Eric Anholt
2008-05-23
Emit a flush after the swapbuffers blit, so contents end up on the screen.
Eric Anholt
2007-12-20
[965] Enable EXT_framebuffer_object.
Eric Anholt
2007-11-12
i965: correct the opcode of XY_SETUP_BLT_CMD. fix bug #12730
Xiang, Haihao
2007-10-04
Replace duplicated intel_reg.h with a shared header.
Eric Anholt
