Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-02-26 | [r300] Document based on chapter 10.4 and 10.5 | Christoph Brill | |
This commit adds most of the graphics backend registers and of the rasterizer registers. Again, some minor bugs were found and marked with TODO or even fixed. | |||
2008-02-25 | [r300] Document registers completed 10.1 to 10.3 | Christoph Brill | |
2008-02-25 | [r300] Add more register from the AMD spec | Christoph Brill | |
2008-02-25 | [r300] Document POLY_MODE and add some TODOs that might have triggered some bugs | Christoph Brill | |
2008-02-25 | [r300] Document some registers in the POINT area | Christoph Brill | |
2008-02-25 | [r300] Further document and add register definitions (found bugs in LINE ↵ | Christoph Brill | |
handling) | |||
2008-02-25 | [r300] Sync fog color register names | Christoph Brill | |
2008-02-25 | [r300] Sync fog register names to the AMD spec | Christoph Brill | |
2008-02-25 | [r300] Further document FG_ALPHA_FUNC (renamed from R300_PP_ALPHA_TEST) and ↵ | Christoph Brill | |
finally add some information to R300_RB3D_DSTCACHE_CTLSTAT | |||
2008-02-25 | [r300] Document R300_RB3D_COLORMASK properly and rename it to ↵ | Christoph Brill | |
RB3D_COLOR_CHANNEL_MASK | |||
2008-02-25 | [r300] Add register definitions based on AMD spec starting with chapter 10 | Christoph Brill | |
2008-02-25 | [r300] Add some more register from the AMD spec in the area of AARESOLVE | Christoph Brill | |
2008-02-25 | [r300] Sync the names for Z-Buffer registers with the AMD spec | Christoph Brill | |
This patch tries to get the Z-Buffer register names in sync with the AMD spec so that talking to AMD engineers is much simpler. | |||
2008-02-25 | [r300] rename all unkown structs r300_hw_state to readable names | Christoph Brill | |
2008-02-25 | [r300] Add RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD and some HyperZ defintions | Christoph Brill | |
2008-02-25 | [r300] Replace more magic number by register definitions from AMD | Christoph Brill | |
2008-02-25 | [r300] clean some more magic registers based on AMD spec | Christoph Brill | |
2008-02-25 | [r300] Update some magic registers to real names | Christoph Brill | |
2008-02-25 | [r300] Document Z-buffer related register ZB_BW_CNTL | Christoph Brill | |
2008-02-25 | [r300] document VAP_CNTL based on AMD spec | Christoph Brill | |
2008-02-25 | [r300] Document some of the wild guesses in VAP_OUTPUT_VTX_FMT based on AMD spec | Christoph Brill | |
2008-02-25 | [r300] document type 3 packets to draw primitives based on AMD spec | Christoph Brill | |
2008-02-23 | r300: fixup some more names | Dave Airlie | |
2008-02-23 | r300: some initial register info from doc drop | Dave Airlie | |
2007-11-05 | Renamed the R300_VAP_UNKNOWN_221C to R300_VAP_CLIP_CNTL. | Oliver McFadden | |
2007-11-05 | r300: initial user clipping for TCL paths | Dave Airlie | |
I've no idea if this code might break something or how it should interact with vertex shaders, it makes the clip demo work for me | |||
2007-11-03 | r300: fix misnumber register | Dave Airlie | |
2007-10-17 | Framework for supporting z24_s8 and z32 depth textures on r300. | Ian Romanick | |
2007-07-16 | r300: Use the R300_PVS_UPLOAD_* defines. | Oliver McFadden | |
2007-07-16 | r300: Added the clip plane upload defines. | Oliver McFadden | |
2007-06-24 | r300: Vertex program position end bits are known. | Oliver McFadden | |
Possibly performance may improve by setting it to the last instruction that writes result.position, rather than the last instruction in the vertex program. | |||
2007-06-07 | r300: Added a comment regarding the R300_VAP_CLIP registers. | Oliver McFadden | |
2007-06-07 | r300: Explain the R300_VAP_OUTPUT_VTX_FMT_1 register. | Oliver McFadden | |
2007-05-30 | r300: Document registers 0x2220 to 0x2230. | Oliver McFadden | |
These registers are per-pixel and per-vertex X and Y clipping planes. | |||
2007-05-30 | r300: Use the CP_PACKET3 macro for Type 3 packets. | Oliver McFadden | |
I haven't converted all of the Type 3 packets to the CP_PACKET3 macro yet because some of the Type 3 packet defines are missing from the R300 register definition file. These defines need to be copied from DRM and Mesa into the R300 register definition file then copied into both DRM and Mesa. | |||
2007-05-27 | Revert "r300: Removed the R300_RS_INTERP_[0-9]_UNKNOWN (magic) defines." | Oliver McFadden | |
This reverts commit bb3558e6517209086cf8426bbe4743da50351158. This commit caused a regression reported by Markus Amsler <markus.amsler@oribi.org>. Apparently these defines are required, although I'm not sure why. | |||
2007-05-26 | r300: Removed R300_PFS_NODE_LAST_NODE replaced by R300_PFS_NODE_OUTPUT_COLOR. | Oliver McFadden | |
2007-05-23 | r300: Removed the R300_RS_INTERP_[0-9]_UNKNOWN (magic) defines. | Oliver McFadden | |
Supposedly you need to set these values for the interpolaters to work, but they seem to work fine without these values. | |||
2007-05-13 | r300: Use the defined values when writing to R300_RS_ROUTE_0. | Oliver McFadden | |
2007-05-13 | r300: A few very minor indenting corrections. | Oliver McFadden | |
2007-05-09 | r300; Indent would destroy r300_reg.h, so add *INDENT-OFF*. | Oliver McFadden | |
2007-05-09 | r300: Added R300_PRIM_NUM_VERTICES_MASK suggested by Jerome Glisse. | Oliver McFadden | |
2007-05-06 | r300: Added R300_AA_DISABLE for R300_GB_AA_CONFIG. | Oliver McFadden | |
2007-04-10 | r300: don't enable VAP/TCL on cards that don't support it | Dave Airlie | |
2007-03-24 | r300: No assertion when accessing incomplete texture images. | Nicolai Haehnle | |
There used to be an assertion when a fragment program accesses an incomplete texture image. Work around this assertion. Note: I am unsure whether this workaround produces the desired result (0,0,0,1) on all hardware. | |||
2007-03-19 | r300: Fix fragment program instruction pairing and register allocation | Nicolai Haehnle | |
There were a number of bugs related to the pairing of vector and scalar operations where swizzles ended up using the wrong source register, or an instruction was moved forward and ended up overwriting an aliased register. The new algorithm for register allocation is quite conservative and may run out of registers before necessary. On the plus side, It Just Works. Pairing is done whenever possible, and in more cases than before, so in practice this change should be a net win. | |||
2007-03-13 | r300: Renamed the CACHE_CTLSTAT values to include UNKNOWN in the name; not | Oliver McFadden | |
enough information is known about them to be sure as to what the values mean. | |||
2007-03-13 | Add defines for the values written to R300_RB3D_ZCACHE_CTLSTAT. | Oliver McFadden | |
Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these values are really unknown; ideally more reverse engineering should be done to determine what these values mean and when they should be set. | |||
2007-03-13 | Documented the value written for R300_TX_CNTL cache flush. | Oliver McFadden | |
2007-03-13 | Guess another unknown register used for R300 pacification. | Oliver McFadden | |