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path: root/src/mesa/drivers/dri/r300/r300_reg.h
AgeCommit message (Expand)Author
2008-03-29Merge branch 'r300-vertprog-branch' of ssh://people.freedesktop.org/~z3ro/mesaOliver McFadden
2008-03-28r300: finish conversion of RS_INST regsDave Airlie
2008-03-28r300: move to using RS_INST namesDave Airlie
2008-03-24R300: fix typo r300 fog regAlex Deucher
2008-03-04r300: Fix some issues with masks in stencil buffer areaChristoph Brill
2008-03-02r300: Corrected a bug with the MAD instruction.Oliver McFadden
2008-03-01r300: Added the PVS_SRC_OPERAND documentation from AMD.Oliver McFadden
2008-03-01r300: Added the PVS_OP_DST_OPERAND documentation from AMD.Oliver McFadden
2008-03-01r300: Moved the vertex program shift/mask defines into the appropriate file.Oliver McFadden
2008-03-01r300: Removed the (undocumented) MAD_2 opcode.Oliver McFadden
2008-03-01r300: Added the vertex program swizzle (aka selection) defines.Oliver McFadden
2008-03-01r300: Converted to the new src/dest register defines.Oliver McFadden
2008-03-01r300: Converted to the new Math Engine defines.Oliver McFadden
2008-03-01r300: Converted to the new Vector Engine defines.Oliver McFadden
2008-03-01r300: Added the vertex program src/dest register defines.Oliver McFadden
2008-03-01r300: Added the Vector Engine and Math Engine defines from AMD's documentation.Oliver McFadden
2008-02-28r300: R5xx and R3xx use different registers for RS_IP and RS_INSTChristoph Brill
2008-02-26[r300] Document based on chapter 10.4 and 10.5Christoph Brill
2008-02-25[r300] Document registers completed 10.1 to 10.3Christoph Brill
2008-02-25[r300] Add more register from the AMD specChristoph Brill
2008-02-25[r300] Document POLY_MODE and add some TODOs that might have triggered some bugsChristoph Brill
2008-02-25[r300] Document some registers in the POINT areaChristoph Brill
2008-02-25[r300] Further document and add register definitions (found bugs in LINE hand...Christoph Brill
2008-02-25[r300] Sync fog color register namesChristoph Brill
2008-02-25[r300] Sync fog register names to the AMD specChristoph Brill
2008-02-25[r300] Further document FG_ALPHA_FUNC (renamed from R300_PP_ALPHA_TEST) and f...Christoph Brill
2008-02-25[r300] Document R300_RB3D_COLORMASK properly and rename it to RB3D_COLOR_CHAN...Christoph Brill
2008-02-25[r300] Add register definitions based on AMD spec starting with chapter 10Christoph Brill
2008-02-25[r300] Add some more register from the AMD spec in the area of AARESOLVEChristoph Brill
2008-02-25[r300] Sync the names for Z-Buffer registers with the AMD specChristoph Brill
2008-02-25[r300] rename all unkown structs r300_hw_state to readable namesChristoph Brill
2008-02-25[r300] Add RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD and some HyperZ defintionsChristoph Brill
2008-02-25[r300] Replace more magic number by register definitions from AMDChristoph Brill
2008-02-25[r300] clean some more magic registers based on AMD specChristoph Brill
2008-02-25[r300] Update some magic registers to real namesChristoph Brill
2008-02-25[r300] Document Z-buffer related register ZB_BW_CNTLChristoph Brill
2008-02-25[r300] document VAP_CNTL based on AMD specChristoph Brill
2008-02-25[r300] Document some of the wild guesses in VAP_OUTPUT_VTX_FMT based on AMD specChristoph Brill
2008-02-25[r300] document type 3 packets to draw primitives based on AMD specChristoph Brill
2008-02-23r300: fixup some more namesDave Airlie
2008-02-23r300: some initial register info from doc dropDave Airlie
2007-11-05Renamed the R300_VAP_UNKNOWN_221C to R300_VAP_CLIP_CNTL.Oliver McFadden
2007-11-05r300: initial user clipping for TCL pathsDave Airlie
2007-11-03r300: fix misnumber registerDave Airlie
2007-10-17Framework for supporting z24_s8 and z32 depth textures on r300.Ian Romanick
2007-07-16r300: Use the R300_PVS_UPLOAD_* defines.Oliver McFadden
2007-07-16r300: Added the clip plane upload defines.Oliver McFadden
2007-06-24r300: Vertex program position end bits are known.Oliver McFadden
2007-06-07r300: Added a comment regarding the R300_VAP_CLIP registers.Oliver McFadden
2007-06-07r300: Explain the R300_VAP_OUTPUT_VTX_FMT_1 register.Oliver McFadden
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