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path: root/src/mesa/drivers/dri/r600
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2009-12-08r600: merge alu_instruction/alu_instruction2Andre Maasikas
2009-12-08r600: add ABS support for source regs to assemblerAndre Maasikas
use it in tex cube instruction sequence
2009-12-08r600: glsl - allow specifying texture sampler via uniformsAndre Maasikas
looks kinda hackish, should rethink later
2009-12-08r600: implement FRAG_ATTRIB_FACE, glsl/twoside worksAndre Maasikas
2009-12-08r600: quick hack to get KIL_NV working - does condition TR only for nowAndre Maasikas
2009-12-08r600: wip glsl - refactor conditional instructions a bitAndre Maasikas
remember the dst register which is used for cond updates when it's time to use the cond codes issue a separate PRED instruction
2009-12-08r600: execute SET funtions on all channelsAndre Maasikas
seems assemble_LOGIC was meant for non-condition-code instructions so execute in for all components as previously
2009-12-08Merge branch 'mesa_7_7_branch'Andre Maasikas
Conflicts: src/mesa/drivers/dri/r600/r700_assembler.c src/mesa/main/version.h
2009-12-08Merge branch 'mesa_7_6_branch' into mesa_7_7_branchAndre Maasikas
2009-12-08r600: add support for TXB instructionAndre Maasikas
makes testing other things easier - does not hang the card TODO: enable TEX dependency tracking in vertex programs
2009-12-08r600: reorder state for render_target and blendAndre Maasikas
First time around render targets are not enabled yet (done in r700SendRenderTargetState) so blend state is not emitted for any targets. Affects first glClear in some mesa tests. As a quick fix reorder state emit so that target is set first
2009-12-05radeon/r200/r600: fix drivers for changes in ↵Alex Deucher
433f0a82f5a4696e6b0c4061f645485ec8079bb4
2009-11-29r600 : clena up a bit for last commit.Richard Li
2009-11-29r600 : add read port allocation for uniform;Richard Li
mapping ps input based on vs output; fix bugs including constants updating for vs.
2009-11-25r600: add ARB_texture_non_power_of_two support.Dave Airlie
This makes the miptree rounds up to the near POT for each level for all radeons, however since mipmaps aren't support with NPOT on previous radeons this calculation shouldn't cause any problems. If it does we can just make it r600 only. I tested a few mipmap demos on r500 and they all seem to work. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-24r600 : reset stack flag with one channel only.Richard Li
2009-11-24r600 : fix stack depth setting bug.Richard Li
2009-11-24radeon/r200/r300/r600: make bo mapping be explicitDave Airlie
This moves the bo mapping outside the DMA layer and makes it explicit, this should in theory make it simpler to split the clean up the dma/cmdbuf linkage that I created before that is broken. Tested on: r600, rv380 (tcl/no-tcl), rv200 (tcl/no-tcl) Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-22r600 : add support for shader instruction trunc and discard.Richard Li
2009-11-23r600: hopefully fix segfault.Dave Airlie
2009-11-23r600: fix inline issuesDave Airlie
2009-11-22r600 : add stack depth calculation, enable CF pop.Richard Li
2009-11-22r600 : use cf for all pop now, left optimization for future.Richard Li
2009-11-20r600 : eliminate Wondows line ending for test code.Richard Li
2009-11-20Merge remote branch 'origin/mesa_7_7_branch'Dave Airlie
2009-11-19r600 : Clean up a bit test code mess.Richard Li
2009-11-19r600 : change shader pop method for now.Richard Li
2009-11-19r600 : check in shader code test enable flag: if flagRichard Li
R600_ENABLE_GLSL_TEST defined, IL shader code will goto r600 assembler. The test base is /mesa/progs/glsl/brick, and changes shader code in CH06-brick.frag/vert to test different logic op combination. (if,else,while,function,...). The stack depth code is not in yet, so it is hard coded now. So complex code would not run (such as things like 8 loops embeded loop in loop).
2009-11-18r600 : update PS and VS emit count for loop constants.Richard Li
2009-11-18r600 : add some defsRichard Li
2009-11-18r600 : Initial version of glsl fc.Richard Li
2009-11-18r600: disable compressed texture supportAlex Deucher
It's not implemented yet. fixes fdo bug 24047
2009-11-18Merge branch 'radeon-texrewrite-clean' into mesa_7_7_branchMaciej Cencora
2009-11-18r600: align for mipmap tree changesMaciej Cencora
2009-11-16r600: don't force Z orderAlex Deucher
Let the hw decide (early vs late Z) fixes fdo bug 25092 Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-11-09r600/r700: typo, fix mask of DB_ALPHA_TO_MASKJerome Glisse
2009-11-09r600: don't emit htile regsAlex Deucher
These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm.
2009-11-09r600: rework DB render setupAlex Deucher
- consolidate DB render setup - only enable perfect ZPASS counts and cull disable when OQ is active - enable early Z
2009-11-09r600: don't emit htile regsAlex Deucher
These are needed for HiZ which is not currently used and the _BASE reg requires a reloc which is not currently supported in the drm.
2009-11-09r600: add missing ZPASS setup bits for r7xx+Alex Deucher
2009-11-04r600: rework draw functionsAlex Deucher
Seems INDX_OFFSET doesn't work properly on some cards, so change back to immediate mode indices. Seems to only affect DRI1. Needs more investigation. Rework and clean up the draw functions. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-11-04r600: fix count prediction for IB caseAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-11-02r600: implement LOG op in compilerPierre Ossman
2009-11-02r600: implement EXP op in compilerPierre Ossman
2009-10-30r600: remove duplicate lineAlex Deucher
2009-10-30r600: fill in some missing tex formatsAlex Deucher
This improves shadowtex since the component ordering is at least correct now, but I'm not sure how to deal with texturing from a depth surface yet due to differences in depth and color tile layouts. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-10-30r600: fix a warning, update commentsAlex Deucher
2009-10-30r600: use AUTO_INDEX for draw - saves cmd buffer spaceAndre Maasikas
also seems we can use INDX_OFFSET if start != 0
2009-10-29r600: remove the no rrb messagesAlex Deucher
2009-10-29r600: Add support for ARB_depth_clampAlex Deucher