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Use _mesa_format_image_size() instead.
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Replace calls to ctx->Driver.CompressedTextureSize with calls to
_mesa_format_image_size. The former always called the later.
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Can just use s8z24 everywhere.
Note: the WRITE_DEPTH macro for R600 may need to be fixed.
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Core Mesa deals with MESA_FORMAT_S8_Z24 everywhere it should so
we shouldn't have to use MESA_FORMAT_Z24_S8 anymore.
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Plus, use MESA_FORMAT_S8_Z24 everywhere.
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_ActualFormat is replaced by Format (MESA_FORMAT_x).
ColorEncoding, ComponentType, RedBits, GreenBits, BlueBits, etc. are
all replaced by MESA_FORMAT_x queries.
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And remove other unneeded #includes while we're at it.
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Call it from in the main Mesa glTexImage functions.
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Just call ctx->Driver.CompressedTextureSize() when we need to get
the compressed image size.
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XXX need to still verify that the table entries are in correct order.
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Use _mesa_is_format_compressed() instead.
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Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum.
ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x.
gl_texture_format will go away next.
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Radeon generic scissors code had problem that some of code was using exclusive
and some inclusive bottom right corner. Only r600 driver is using exclusive
coordinate so changed generic code to pass inclusive coordinate and r600 driver
changes BR coordinate to be exclusive.
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- max texture size is 8k, but mesa doesn't support
that at the moment.
- attempt to set shader limits to what the hw actually
supports
- clean up some old r300 cruft
- no need to explicitly disable irqs. This is fixed
in the drm now.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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1D tile span support for depth/stencil/color/textures
Z and stencil buffers are always tiled, so this fixes
sw access to Z and stencil buffers. color and textures
are currently linear, but this adds span support when we
implement 1D tiling.
This fixes the text in progs/demos/engine and progs/tests/z*
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92033a9516942d7272ce4bf36ecd422009bbaf60 and 822c7964819ca1fcc270880d4ca8b3de8a4276d0
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- max texture size is 8k, but mesa doesn't support
that at the moment.
- attempt to set shader limits to what the hw actually
supports
- clean up some old r300 cruft
- no need to explicitly disable irqs. This is fixed
in the drm now.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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92033a9516942d7272ce4bf36ecd422009bbaf60 and 822c7964819ca1fcc270880d4ca8b3de8a4276d0
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This reverts commit 651cffd626a82d9bf539437ca4bdf8ea4b396fab.
The commit inadvertantly introduced a new gallium dependency on the meta code.
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This should help detecting possible memory leaks with dma buffers and prevent
possible visual corruption if data would be overwriten too early.
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Do-while makes macro safe to be used with if and for constructions.
Also remove __LINE__ macro from variable name because scope is local to macro anyway.
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Copy'n'paste apparently prevented the RADEON_VERTS flag from being enabled.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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I inherited this and really it stayed around far too long,
make it nice and simple.
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This is more logical, and fixes a TFP issue.
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Per the suggestion in the Intel driver, move the calls to
ctx->Driver.GenerateMipmap() into core Mesa so that drivers don't
have to worry about it.
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1D tile span support for depth/stencil/color/textures
Z and stencil buffers are always tiled, so this fixes
sw access to Z and stencil buffers. color and textures
are currently linear, but this adds span support when we
implement 1D tiling.
This fixes the text in progs/demos/engine and progs/tests/z*
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dma_bo varaible is only used for iterating so allocating memory for it only
causes memory leaks.
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Variadic functions can't be inlined which makes debugging to have quite large
function overead. Only aleternative method is to use variadic macros which are
inlined so compiler can optimize debugging to minimize overhead.
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Return GL_FALSE if we failed to allocate the buffer. Then raise
GL_OUT_OF_MEMORY in core Mesa.
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