| Age | Commit message (Expand) | Author |
|---|
| 2009-11-13 | i965: Share OPCODE_TXB between brw_wm_emit.c and brw_wm_glsl.c | Eric Anholt |
| 2009-11-13 | i965: Share OPCODE_TEX between brw_wm_emit.c and brw_wm_glsl.c. | Eric Anholt |
| 2009-11-13 | i965: Clean up emit_tex a bit. | Eric Anholt |
| 2009-11-13 | Merge remote branch 'origin/mesa_7_6_branch' | Eric Anholt |
| 2009-11-13 | i965: Flag BRW_NEW_CONTEXT on some context state. | Eric Anholt |
| 2009-11-13 | intel: Remove some dead context structure fields. | Eric Anholt |
| 2009-11-13 | i965: Remove an unused cache_item field. | Eric Anholt |
| 2009-11-13 | i965: Remove long dead structures for ffvertex_prog.c. | Eric Anholt |
| 2009-11-13 | i965: Use bo_map instead of subdata to upload the bits of constant buffer. | Eric Anholt |
| 2009-11-13 | i965: Validate the number of URB entries selected for the VS. | Eric Anholt |
| 2009-11-13 | intel: When subdataing a busy buffer, use a temporary and blit in. | Eric Anholt |
| 2009-11-13 | i965: Clean up Ironlake sampler type definitions. | Eric Anholt |
| 2009-11-13 | i965: Avoid moving the current value back into the accumulator for MAD. | Eric Anholt |
| 2009-11-12 | intel: Don't check for context pointer to be NULL during extension init | Ian Romanick |
| 2009-11-12 | intel: Remove unused enable_imaging parameter to intelInitExtensions | Ian Romanick |
| 2009-11-12 | i965: Fix Ironlake shadow comparisons. | Eric Anholt |
| 2009-11-12 | i965: Fix VBO last-valid-offset setup on Ironlake. | Eric Anholt |
| 2009-11-11 | i965: fix EXT_provoking_vertex support | Roland Scheidegger |
| 2009-11-11 | r300, r300g: Add missing registers. | Corbin Simpson |
| 2009-11-10 | i965: Fix VS constant buffer value loading. | Eric Anholt |
| 2009-11-10 | i965: Unalias src/dst registers for SGE and friends. | Eric Anholt |
| 2009-11-10 | i965: Allow use of PROGRAM_LOCAL constants in ARB_vp. | Eric Anholt |
| 2009-11-10 | Merge remote branch 'origin/mesa_7_6_branch' | Eric Anholt |
| 2009-11-10 | i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile. | Eric Anholt |
| 2009-11-10 | i965: Add a note explaining the data cache domain. | Eric Anholt |
| 2009-11-10 | i965: Unalias src/dst registers for SGE and friends. | Eric Anholt |
| 2009-11-10 | i965: Allow use of PROGRAM_LOCAL constants in ARB_vp. | Eric Anholt |
| 2009-11-09 | r600/r700: typo, fix mask of DB_ALPHA_TO_MASK | Jerome Glisse |
| 2009-11-09 | r600: don't emit htile regs | Alex Deucher |
| 2009-11-09 | r600: rework DB render setup | Alex Deucher |
| 2009-11-09 | r600: don't emit htile regs | Alex Deucher |
| 2009-11-09 | r600: add missing ZPASS setup bits for r7xx+ | Alex Deucher |
| 2009-11-06 | i965: Use Compr4 instruction compression mode on G4X and newer. | Eric Anholt |
| 2009-11-06 | i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.c | Eric Anholt |
| 2009-11-06 | i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.c | Eric Anholt |
| 2009-11-06 | i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.c | Eric Anholt |
| 2009-11-06 | i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c. | Eric Anholt |
| 2009-11-06 | i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c. | Eric Anholt |
| 2009-11-06 | i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.c | Eric Anholt |
| 2009-11-06 | i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.c | Eric Anholt |
| 2009-11-06 | i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code. | Eric Anholt |
| 2009-11-06 | i965: Use a normal alu1 emit for OPCODE_TRUNC. | Eric Anholt |
| 2009-11-06 | i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.c | Eric Anholt |
| 2009-11-06 | i965: Collect GLSL src/dst regs up in generic code. | Eric Anholt |
| 2009-11-06 | intel: better front color buffer test in intelClear() | Brian Paul |
| 2009-11-06 | i965: Always pass the size argument to brw_cache_data. | Eric Anholt |
| 2009-11-06 | intel: Finish removing the fallback code for bug #16697. | Eric Anholt |
| 2009-11-06 | intel: Don't validate in a texture image used as a render target. | Eric Anholt |
| 2009-11-06 | intel: Clean up some extra struct indirection in finalize. | Eric Anholt |
| 2009-11-06 | intel: Use _mesa_get_current_tex_object() to clean up TFP path. | Eric Anholt |
