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Texture images are tiled in PPU code. SPUs use a texture cache for getting
texels from textures.
This is very rough code, but demos/texcyl.c works.
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When the SPU is done copying a batch buffer to local store, use an mfc_put()
to write a "done" message back to the buffer status array in main memory.
We were previously using a mailbox message for synchronization.
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The draw module's vbuf stage builds buffers of post-transformed vertices
and issues draw-elements calls to render them. We'll pass the vertex and
index buffers to the SPUs...
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The cell "render_stage" (last in the "draw" pipeline) emits vertices into
a buffer which is pulled by the SPUs in response to a "RENDER" command.
This is pretty much temporary/scaffold code for now.
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Track vertex/fragment shader state.
Plug in pipe->draw_arrays(), pipe->draw_elements().
Plug render stage (a stub) into end of 'draw' pipeline.
Specify a hard-coded vertex format for now.
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The effect of this mapping can be acheived by the state tracker and
setting up the pipe texture state pointers to incorporate its affects.
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The state setting code was mostly just copied from the softpipe driver.
The SPUs can now get/put framebuffer tiles from/to main memory and clear
them to a given color. Lots of debug code in effect.
Tiled framebuffer is displayed in X window via the xmwinsys layer.
To enable Cell driver, export GALLIUM_CELL=1
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No real code yet. Just stand-ins and make/build infrastructure.
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