summaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Collapse)Author
2010-10-05nv50: fix always true conditional in shader optimizationNicolas Kaiser
2010-10-05r600g: improve bo flushingJerome Glisse
Flush read cache before writting register. Track flushing inside of a same cs and avoid reflushing same bo if not necessary. Allmost properly force flush if bo rendered too and then use as a texture in same cs (missing pipeline flush dunno if it's needed or not). Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-05r600g: store reloc information in bo structureJerome Glisse
Allow fast lookup of relocation information & id which was a CPU time consumming operation. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-05pb: fix numDelayed accountingDave Airlie
we weren't decreasing when removing from the list.
2010-10-05r600g: avoid unneeded bo waitDave Airlie
if we know the bo has gone not busy, no need to add another bo wait thanks to Andre (taiu) on irc for pointing this out.
2010-10-05r600g: drop use_mem_constant.Dave Airlie
since we plan on using dx10 constant buffers everywhere.
2010-10-05r600g: drop mman allocatorDave Airlie
we don't use this since constant buffers are now being used on all gpus.
2010-10-05r600g: add bo busy backoff.Dave Airlie
When we go to do a lot of bos in one draw like constant bufs we need to avoid bouncing off the busy ioctl, this mitigates by backing off on busy bos for a short amount of times.
2010-10-05pb: don't keep checking buffers after first busyDave Airlie
If we assume busy buffers are added to the list in order its unlikely we'd fine one after the first busy one that isn't busy.
2010-10-05r600g: add bo fenced list.Dave Airlie
this just keeps a list of bos submitted together, and uses them to decide bo busy state for the whole group.
2010-10-04swrast: fix choose_depth_texture_level() to respect mipmap filtering stateBrian Paul
NOTE: this is a candidate for the 7.9 branch.
2010-10-05r300g: fix microtiling for 16-bits-per-channel formatsMarek Olšák
These texture formats (like R16G16B16A16_UNORM) were untested until now because st/mesa doesn't use them. I am testing this with a hacked st/mesa here.
2010-10-04i965: Add support for gen6 FB writes to the new FS.Eric Anholt
This uses message headers for now, since we'll need it for MRT. We can cut out the header later.
2010-10-04i965: In disasm, gen6 fb writes don't put msg reg # in destreg_conditionalmod.Eric Anholt
It instead sensibly appears in the src0 slot.
2010-10-04i965: Add initial folding of constants into operand immediate slots.Eric Anholt
We could try to detect this in expression handling and do it proactively there, but it seems like less logic to do it in one optional pass at the end.
2010-10-04i965: Add trivial dead code elimination in the new FS backend.Eric Anholt
The glsl core should be handling most dead code issues for us, but we generate some things in codegen that may not get used, like the 1/w value or pixel deltas. It seems a lot easier this way than trying to work out up front whether we're going to use those values or not.
2010-10-04i965: Be more conservative on live interval calculation.Eric Anholt
This also means that our intervals now highlight dead code.
2010-10-04r600g: Fix SCons build.Vinson Lee
2010-10-04r600g: remove dead label & fix indentationJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-04r600g: rename radeon_ws_bo to r600_boJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-04r600g: use r600_bo for relocation argument, simplify codeJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-04r600g: allow r600_bo to be a sub allocation of a big boJerome Glisse
Add bo offset everywhere needed if r600_bo is ever a sub bo of a bigger bo. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-04r600g: rename radeon_ws_bo to r600_boJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-04nvfx: Pair os_malloc_aligned() with os_free_aligned().Krzysztof Smiechowicz
From AROS.
2010-10-04r600g: TODO domain managementDave Airlie
no wonder it was slow, the code is deliberately forcing stuff into GTT, we used to have domain management but it seems to have disappeared.
2010-10-04r600g: fix wwarning in bo_map functionDave Airlie
2010-10-04r600g: the code to check whether a new vertex shader is needed was wrongDave Airlie
this code was memcmp'ing two structs, but refcounting one of them afterwards, so any subsequent memcmp was never going to work. again this stops unnecessary uploads of vertex program,
2010-10-04r600g: break out of search for reloc bo after finding it.Dave Airlie
this function was taking quite a lot of pointless CPU.
2010-10-03i965: Fix glean/texSwizzle regression in previous commit.Eric Anholt
Easy enough patch, who needs a full test run. Oh, that's right. Me.
2010-10-02i965: Set up swizzling of shadow compare results for GL_DEPTH_TEXTURE_MODE.Eric Anholt
The brw_wm_surface_state.c handling of GL_DEPTH_TEXTURE_MODE doesn't apply to shadow compares, which always return an intensity value. The texture swizzles can do the job for us. Fixes: glsl1-shadow2D(): 1 glsl1-shadow2D(): 3
2010-10-02i965: Add support for EXT_texture_swizzle to the new FS backend.Eric Anholt
2010-10-02r300g: add support for L8A8 colorbuffersMarek Olšák
Blending with DST_ALPHA is undefined. SRC_ALPHA works, though. I bet some other formats have similar limitations too.
2010-10-02r300g: add support for R8G8 colorbuffersMarek Olšák
The hw swizzles have been obtained by a brute force approach, and only C0 and C2 are stored in UV88, the other channels are ignored. R16G16 is going to be a lot trickier.
2010-10-02mesa/st: initial attempt at RG support for gallium driversDave Airlie
passes all piglit RG tests with softpipe.
2010-10-01i965: Fix incorrect batchbuffer size in gen6 clip state command.Kenneth Graunke
FORCE_ZERO_RTAINDEX should be in the fourth (and final) dword.
2010-10-01i965: Don't try to emit code if we failed register allocation.Eric Anholt
2010-10-01i965: Fix off-by-ones in handling the last members of register classes.Eric Anholt
Luckily, one of them would result in failing out register allocation when the other bugs were encountered. Applies to glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined, which still fails register allocation, but now legitimately.
2010-10-01i965: Add a sanity check for register allocation sizes.Eric Anholt
2010-10-01i965: When producing a single channel swizzle, don't make a temporary.Eric Anholt
This quickly cuts 8% of the instructions in my glsl demo.
2010-10-01i965: Restore the forcing of aligned pairs for delta_xy on chips with PLN.Eric Anholt
By doing so using the register allocator now, we avoid wasting a register to make the alignment happen.
2010-10-01r600c: fix segfault in evergreen stencil codeAlex Deucher
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=30551
2010-10-01r600g: Remove unnecessary headers.Vinson Lee
2010-10-01r600g: Remove unused variable.Vinson Lee
Fixes this GCC warning. r600_shader.c: In function 'tgsi_split_literal_constant': r600_shader.c:818: warning: unused variable 'index'
2010-10-01rgtc: Detect RGTC formats as color formats and as compressed formatsIan Romanick
2010-10-01mesa: Trivial correction to commentIan Romanick
2010-10-01mesa: Fix misplaced #endifIan Romanick
If FEATURE_texture_s3tc is not defined, FXT1 formats would erroneously fall through to the MESA_FORMAT_RGBA_FLOAT32 case.
2010-10-01ARB_texture_rg: Add GL_COMPRESSED_{RED,RG} cases in _mesa_is_color_formatIan Romanick
2010-10-01mesa: Add ARB_texture_compression_rgtc as an alias for ↵Ian Romanick
EXT_texture_compression_rgtc Change the name in the extension tracking structure to ARB (from EXT).
2010-10-01savage: Remove unnecessary header.Vinson Lee
2010-10-01glsl: Remove unnecessary header.Vinson Lee
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-06 17:35:08 +0000