1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
|
/*
* Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* on the rights to use, copy, modify, merge, publish, distribute, sub
* license, and/or sell copies of the Software, and to permit persons to whom
* the Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE. */
#include "radeon_r300.h"
static boolean radeon_r300_check_cs(struct radeon_cs* cs, int size)
{
/* XXX check size here, lazy ass! */
return TRUE;
}
static void radeon_r300_write_cs_reloc(struct radeon_cs* cs,
struct pipe_buffer* pbuffer,
uint32_t rd,
uint32_t wd,
uint32_t flags)
{
radeon_cs_write_reloc(cs, ((struct radeon_pipe_buffer*)pbuffer)->bo, rd, wd, flags);
}
static void radeon_r300_flush_cs(struct radeon_cs* cs)
{
int retval = 0;
retval = radeon_cs_emit(cs);
if (retval) {
debug_printf("radeon: Bad CS, dumping...\n");
radeon_cs_print(cs, stderr);
}
radeon_cs_erase(cs);
}
/* Helper function to do the ioctls needed for setup and init. */
static void do_ioctls(struct r300_winsys* winsys, int fd)
{
drm_radeon_getparam_t gp;
uint32_t target;
int retval;
/* XXX is this cast safe? */
gp.value = (int*)⌖
/* First, get PCI ID */
gp.param = RADEON_PARAM_DEVICE_ID;
retval = drmCommandWriteRead(fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
if (retval) {
fprintf(stderr, "%s: Failed to get PCI ID, error number %d",
__FUNCTION__, retval);
exit(1);
}
winsys->pci_id = target;
/* Then, get the number of pixel pipes */
gp.param = RADEON_PARAM_NUM_GB_PIPES;
retval = drmCommandWriteRead(fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
if (retval) {
fprintf(stderr, "%s: Failed to get GB pipe count, error number %d",
__FUNCTION__, retval);
exit(1);
}
winsys->gb_pipes = target;
}
struct r300_winsys*
radeon_create_r300_winsys(int fd, struct radeon_winsys* old_winsys)
{
struct r300_winsys* winsys = CALLOC_STRUCT(r300_winsys);
struct radeon_cs_manager* csm;
if (winsys == NULL) {
return NULL;
}
do_ioctls(winsys, fd);
csm = radeon_cs_manager_gem_ctor(fd);
winsys->cs = radeon_cs_create(csm, 1024 * 64 / 4);
winsys->check_cs = radeon_r300_check_cs;
winsys->begin_cs = radeon_cs_begin;
winsys->write_cs_dword = radeon_cs_write_dword;
winsys->write_cs_reloc = radeon_r300_write_cs_reloc;
winsys->end_cs = radeon_cs_end;
winsys->flush_cs = radeon_r300_flush_cs;
memcpy(winsys, old_winsys, sizeof(struct radeon_winsys));
return winsys;
}
|
