blob: 2dbae53460f13479bb641abb02f43b5c34449c23 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
|
#ifndef __NOUVEAU_SHADER_H__
#define __NOUVEAU_SHADER_H__
typedef struct _nouveau_regrec nouveau_regrec;
typedef struct _nouveau_srcreg nouveau_srcreg;
typedef struct _nouveau_dstreg nouveau_dstreg;
typedef struct _nouveau_vertex_program nouveau_vertex_program;
/* Instruction flags, used by emit_arith functions */
#define NOUVEAU_OUT_ABS (1 << 0)
#define NOUVEAU_OUT_SAT (1 << 1)
typedef enum {
UNKNOWN = 0,
HW_TEMP,
HW_INPUT,
HW_CONST,
HW_OUTPUT
} nouveau_regtype;
/* To track a hardware register's state */
struct _nouveau_regrec {
nouveau_regtype file;
int hw_id;
int ref;
};
struct _nouveau_srcreg {
nouveau_regrec *hw;
int idx;
int negate;
int swizzle;
};
struct _nouveau_dstreg {
nouveau_regrec *hw;
int idx;
int mask;
int condup, condreg;
int condtest;
int condswz;
};
struct _nouveau_vertex_program {
struct vertex_program mesa_program; /* must be first! */
/* Used to convert from Mesa register state to on-hardware state */
long *temps_in_use;
nouveau_regrec inputs[14];
nouveau_regrec temps[64];
long *hwtemps_written;
long *hwtemps_in_use;
unsigned int *insns;
unsigned int insns_alloced;
unsigned int inst_count;
unsigned int inst_start;
};
/* Helper functions */
void nvsRecInit (long **rec, int max);
void nvsBitSet (long *rec, int bit);
void nvsBitClear (long *rec, int bit);
int nvsAllocIndex(long *rec, int max);
int nv40TranslateVertexProgram(nouveau_vertex_program *vp);
//int nv40TranslateFragmentProgram(nouveau_vertex_program *vp);
#endif /* __NOUVEAU_SHADER_H__ */
|