1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
|
/*
Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
The Weather Channel (TM) funded Tungsten Graphics to develop the
initial release of the Radeon 8500 driver under the XFree86 license.
This notice must be preserved.
Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial
portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
* Nicolai Haehnle <prefect_@gmx.net>
*/
#ifndef __RADEON_CONTEXT_H__
#define __RADEON_CONTEXT_H__
#include "mtypes.h"
#include "radeon_screen.h"
#include "drm.h"
#include "dri_util.h"
struct radeon_context;
typedef struct radeon_context radeonContextRec;
typedef struct radeon_context* radeonContextPtr;
static __inline GLuint radeonPackColor(GLuint cpp,
GLubyte r, GLubyte g, GLubyte b, GLubyte a)
{
switch (cpp) {
case 2:
return PACK_COLOR_565(r, g, b);
case 4:
return PACK_COLOR_8888(a, r, g, b);
default:
return 0;
}
}
#define TEX_0 0x1
#define TEX_1 0x2
#define TEX_2 0x4
#define TEX_3 0x8
#define TEX_4 0x10
#define TEX_5 0x20
#define TEX_6 0x40
#define TEX_7 0x80
#define TEX_ALL 0xff
/* Rasterizing fallbacks */
/* See correponding strings in r200_swtcl.c */
#define RADEON_FALLBACK_TEXTURE 0x01
#define RADEON_FALLBACK_DRAW_BUFFER 0x02
#define RADEON_FALLBACK_STENCIL 0x04
#define RADEON_FALLBACK_RENDER_MODE 0x08
#define RADEON_FALLBACK_BLEND_EQ 0x10
#define RADEON_FALLBACK_BLEND_FUNC 0x20
#define RADEON_FALLBACK_DISABLE 0x40
#define RADEON_FALLBACK_BORDER_MODE 0x80
#if R200_MERGED
extern void radeonFallback(GLcontext * ctx, GLuint bit, GLboolean mode);
#define FALLBACK( radeon, bit, mode ) do { \
if ( 0 ) fprintf( stderr, "FALLBACK in %s: #%d=%d\n", \
__FUNCTION__, bit, mode ); \
radeonFallback( (radeon)->glCtx, bit, mode ); \
} while (0)
#else
#define FALLBACK( radeon, bit, mode ) fprintf(stderr, "%s:%s\n", __LINE__, __FILE__);
#endif
/* TCL fallbacks */
extern void radeonTclFallback(GLcontext * ctx, GLuint bit, GLboolean mode);
#define RADEON_TCL_FALLBACK_RASTER 0x0001 /* rasterization */
#define RADEON_TCL_FALLBACK_UNFILLED 0x0002 /* unfilled tris */
#define RADEON_TCL_FALLBACK_LIGHT_TWOSIDE 0x0004 /* twoside tris */
#define RADEON_TCL_FALLBACK_MATERIAL 0x0008 /* material in vb */
#define RADEON_TCL_FALLBACK_TEXGEN_0 0x0010 /* texgen, unit 0 */
#define RADEON_TCL_FALLBACK_TEXGEN_1 0x0020 /* texgen, unit 1 */
#define RADEON_TCL_FALLBACK_TEXGEN_2 0x0040 /* texgen, unit 2 */
#define RADEON_TCL_FALLBACK_TEXGEN_3 0x0080 /* texgen, unit 3 */
#define RADEON_TCL_FALLBACK_TEXGEN_4 0x0100 /* texgen, unit 4 */
#define RADEON_TCL_FALLBACK_TEXGEN_5 0x0200 /* texgen, unit 5 */
#define RADEON_TCL_FALLBACK_TCL_DISABLE 0x0400 /* user disable */
#define RADEON_TCL_FALLBACK_BITMAP 0x0800 /* draw bitmap with points */
#define RADEON_TCL_FALLBACK_VERTEX_PROGRAM 0x1000 /* vertex program active */
#if R200_MERGED
#define TCL_FALLBACK( ctx, bit, mode ) radeonTclFallback( ctx, bit, mode )
#else
#define TCL_FALLBACK( ctx, bit, mode ) ;
#endif
struct radeon_dri_mirror {
__DRIcontextPrivate *context; /* DRI context */
__DRIscreenPrivate *screen; /* DRI screen */
__DRIdrawablePrivate *drawable; /* DRI drawable bound to this ctx */
drm_context_t hwContext;
drm_hw_lock_t *hwLock;
int fd;
int drmMinor;
};
/**
* Derived state for internal purposes.
*/
struct radeon_scissor_state {
drm_clip_rect_t rect;
GLboolean enabled;
GLuint numClipRects; /* Cliprects active */
GLuint numAllocedClipRects; /* Cliprects available */
drm_clip_rect_t *pClipRects;
};
struct radeon_colorbuffer_state {
GLuint clear;
GLint drawOffset, drawPitch;
};
struct radeon_pixel_state {
GLint readOffset, readPitch;
};
struct radeon_state {
struct radeon_colorbuffer_state color;
struct radeon_pixel_state pixel;
struct radeon_scissor_state scissor;
};
/**
* Common per-context variables shared by R200 and R300.
* R200- and R300-specific code "derive" their own context from this
* structure.
*/
struct radeon_context {
GLcontext *glCtx; /* Mesa context */
radeonScreenPtr radeonScreen; /* Screen private DRI data */
/* Fallback state */
GLuint Fallback;
GLuint TclFallback;
/* Page flipping */
GLuint doPageFlip;
/* Drawable, cliprect and scissor information */
GLuint numClipRects; /* Cliprects for the draw buffer */
drm_clip_rect_t *pClipRects;
unsigned int lastStamp;
GLboolean lost_context;
drm_radeon_sarea_t *sarea; /* Private SAREA data */
/* Mirrors of some DRI state */
struct radeon_dri_mirror dri;
/* Busy waiting */
GLuint do_usleeps;
GLuint do_irqs;
GLuint irqsEmitted;
drm_radeon_irq_wait_t iw;
/* VBI / buffer swap */
GLuint vbl_seq;
GLuint vblank_flags;
int64_t swap_ust;
int64_t swap_missed_ust;
GLuint swap_count;
GLuint swap_missed_count;
/* Derived state */
struct radeon_state state;
/* Configuration cache
*/
driOptionCache optionCache;
};
#define RADEON_CONTEXT(glctx) ((radeonContextPtr)(ctx->DriverCtx))
extern void radeonSwapBuffers(__DRIdrawablePrivate * dPriv);
extern GLboolean radeonInitContext(radeonContextPtr radeon,
struct dd_function_table* functions,
const __GLcontextModes * glVisual,
__DRIcontextPrivate * driContextPriv,
void *sharedContextPrivate);
extern void radeonCleanupContext(radeonContextPtr radeon);
extern GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
__DRIdrawablePrivate * driDrawPriv,
__DRIdrawablePrivate * driReadPriv);
extern GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv);
/* ================================================================
* Debugging:
*/
#define DO_DEBUG 1
#if DO_DEBUG
extern int RADEON_DEBUG;
#else
#define RADEON_DEBUG 0
#endif
#define DEBUG_TEXTURE 0x0001
#define DEBUG_STATE 0x0002
#define DEBUG_IOCTL 0x0004
#define DEBUG_PRIMS 0x0008
#define DEBUG_VERTS 0x0010
#define DEBUG_FALLBACKS 0x0020
#define DEBUG_VFMT 0x0040
#define DEBUG_CODEGEN 0x0080
#define DEBUG_VERBOSE 0x0100
#define DEBUG_DRI 0x0200
#define DEBUG_DMA 0x0400
#define DEBUG_SANITY 0x0800
#define DEBUG_SYNC 0x1000
#define DEBUG_PIXEL 0x2000
#define DEBUG_MEMORY 0x4000
#endif /* __RADEON_CONTEXT_H__ */
|
